From 006f0a58734aae365a3364ef9fa102750764c9f2 Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Sat, 10 Nov 2018 12:14:58 -0500 Subject: [PATCH] target/mips: Add nanoMIPS CRC32 instruction pool Backports commit ba1e81171fb761aea9a9a4ccadedf808e34eaae2 from qemu --- qemu/target/mips/translate.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index fa3dc789..689efcee 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -17599,6 +17599,16 @@ enum { NM_SOV = 0x7a, }; +/* CRC32 instruction pool */ +enum { + NM_CRC32B = 0x00, + NM_CRC32H = 0x01, + NM_CRC32W = 0x02, + NM_CRC32CB = 0x04, + NM_CRC32CH = 0x05, + NM_CRC32CW = 0x06, +}; + /* POOL32A5 instruction pool */ enum { NM_CMP_EQ_PH = 0x00,