From 00aebd34101fceb1274b078d2a5f8b33b173a6fb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 19 Apr 2021 11:55:30 -0400 Subject: [PATCH] target/mips: Fix TCG temporary leak in gen_cache_operation() Fix a TCG temporary leak when translating CACHE opcode. Fixes: 0d74a222c27 ("make ITC Configuration Tags accessible to the CPU") Backports f4349ba966abfe39f5d98694abd7c7551d5c8c02 --- qemu/target/mips/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index 2020d91e..3c789652 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -13823,6 +13823,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base, TCGv t1 = tcg_temp_new(tcg_ctx); gen_base_offset_addr(ctx, t1, base, offset); gen_helper_cache(tcg_ctx, tcg_ctx->cpu_env, t1, t0); + tcg_temp_free(tcg_ctx, t1); + tcg_temp_free_i32(tcg_ctx, t0); } #if defined(TARGET_MIPS64)