diff --git a/bindings/dotnet/UnicornManaged/Const/Mips.fs b/bindings/dotnet/UnicornManaged/Const/Mips.fs
index 4cc02627..2428202e 100644
--- a/bindings/dotnet/UnicornManaged/Const/Mips.fs
+++ b/bindings/dotnet/UnicornManaged/Const/Mips.fs
@@ -158,7 +158,9 @@ module Mips =
     let UC_MIPS_REG_MPL0 = 134
     let UC_MIPS_REG_MPL1 = 135
     let UC_MIPS_REG_MPL2 = 136
-    let UC_MIPS_REG_ENDING = 137
+    let UC_MIPS_REG_CP0_CONFIG3 = 137
+    let UC_MIPS_REG_CP0_USERLOCAL = 138
+    let UC_MIPS_REG_ENDING = 139
     let UC_MIPS_REG_ZERO = 2
     let UC_MIPS_REG_AT = 3
     let UC_MIPS_REG_V0 = 4
diff --git a/bindings/go/unicorn/mips_const.go b/bindings/go/unicorn/mips_const.go
index c7a8fb2e..df3f2c08 100644
--- a/bindings/go/unicorn/mips_const.go
+++ b/bindings/go/unicorn/mips_const.go
@@ -153,7 +153,9 @@ const (
 	MIPS_REG_MPL0 = 134
 	MIPS_REG_MPL1 = 135
 	MIPS_REG_MPL2 = 136
-	MIPS_REG_ENDING = 137
+	MIPS_REG_CP0_CONFIG3 = 137
+	MIPS_REG_CP0_USERLOCAL = 138
+	MIPS_REG_ENDING = 139
 	MIPS_REG_ZERO = 2
 	MIPS_REG_AT = 3
 	MIPS_REG_V0 = 4
diff --git a/bindings/java/unicorn/MipsConst.java b/bindings/java/unicorn/MipsConst.java
index 9b55cb4e..3b2dd993 100644
--- a/bindings/java/unicorn/MipsConst.java
+++ b/bindings/java/unicorn/MipsConst.java
@@ -155,7 +155,9 @@ public interface MipsConst {
    public static final int UC_MIPS_REG_MPL0 = 134;
    public static final int UC_MIPS_REG_MPL1 = 135;
    public static final int UC_MIPS_REG_MPL2 = 136;
-   public static final int UC_MIPS_REG_ENDING = 137;
+   public static final int UC_MIPS_REG_CP0_CONFIG3 = 137;
+   public static final int UC_MIPS_REG_CP0_USERLOCAL = 138;
+   public static final int UC_MIPS_REG_ENDING = 139;
    public static final int UC_MIPS_REG_ZERO = 2;
    public static final int UC_MIPS_REG_AT = 3;
    public static final int UC_MIPS_REG_V0 = 4;
diff --git a/bindings/pascal/unicorn/MipsConst.pas b/bindings/pascal/unicorn/MipsConst.pas
index 4094eb7f..b4ef27eb 100644
--- a/bindings/pascal/unicorn/MipsConst.pas
+++ b/bindings/pascal/unicorn/MipsConst.pas
@@ -156,7 +156,9 @@ const
   UC_MIPS_REG_MPL0 = 134;
   UC_MIPS_REG_MPL1 = 135;
   UC_MIPS_REG_MPL2 = 136;
-  UC_MIPS_REG_ENDING = 137;
+  UC_MIPS_REG_CP0_CONFIG3 = 137;
+  UC_MIPS_REG_CP0_USERLOCAL = 138;
+  UC_MIPS_REG_ENDING = 139;
   UC_MIPS_REG_ZERO = 2;
   UC_MIPS_REG_AT = 3;
   UC_MIPS_REG_V0 = 4;
diff --git a/bindings/python/unicorn/mips_const.py b/bindings/python/unicorn/mips_const.py
index e53313b0..98e1eccc 100644
--- a/bindings/python/unicorn/mips_const.py
+++ b/bindings/python/unicorn/mips_const.py
@@ -151,7 +151,9 @@ UC_MIPS_REG_P2 = 133
 UC_MIPS_REG_MPL0 = 134
 UC_MIPS_REG_MPL1 = 135
 UC_MIPS_REG_MPL2 = 136
-UC_MIPS_REG_ENDING = 137
+UC_MIPS_REG_CP0_CONFIG3 = 137
+UC_MIPS_REG_CP0_USERLOCAL = 138
+UC_MIPS_REG_ENDING = 139
 UC_MIPS_REG_ZERO = 2
 UC_MIPS_REG_AT = 3
 UC_MIPS_REG_V0 = 4
diff --git a/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb b/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb
index 2c2c727f..9e8d52ef 100644
--- a/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb
+++ b/bindings/ruby/unicorn_gem/lib/unicorn_engine/mips_const.rb
@@ -153,7 +153,9 @@ module UnicornEngine
 	UC_MIPS_REG_MPL0 = 134
 	UC_MIPS_REG_MPL1 = 135
 	UC_MIPS_REG_MPL2 = 136
-	UC_MIPS_REG_ENDING = 137
+	UC_MIPS_REG_CP0_CONFIG3 = 137
+	UC_MIPS_REG_CP0_USERLOCAL = 138
+	UC_MIPS_REG_ENDING = 139
 	UC_MIPS_REG_ZERO = 2
 	UC_MIPS_REG_AT = 3
 	UC_MIPS_REG_V0 = 4
diff --git a/include/unicorn/mips.h b/include/unicorn/mips.h
index 10896289..77fde3c1 100644
--- a/include/unicorn/mips.h
+++ b/include/unicorn/mips.h
@@ -175,6 +175,9 @@ typedef enum UC_MIPS_REG {
     UC_MIPS_REG_MPL1,
     UC_MIPS_REG_MPL2,
 
+    UC_MIPS_REG_CP0_CONFIG3,
+    UC_MIPS_REG_CP0_USERLOCAL,
+
     UC_MIPS_REG_ENDING,	// <-- mark the end of the list or registers
 
     // alias registers
diff --git a/qemu/target/mips/unicorn.c b/qemu/target/mips/unicorn.c
index 8caca8aa..c9f89896 100644
--- a/qemu/target/mips/unicorn.c
+++ b/qemu/target/mips/unicorn.c
@@ -83,6 +83,12 @@ int mips_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int cou
                 case UC_MIPS_REG_PC:
                     *(mipsreg_t *)value = state->active_tc.PC;
                     break;
+                case UC_MIPS_REG_CP0_CONFIG3:
+                    *(mipsreg_t *)value = MIPS_CPU(uc, mycpu)->env.CP0_Config3;
+                    break;
+                case UC_MIPS_REG_CP0_USERLOCAL:
+                    *(mipsreg_t *)value = MIPS_CPU(uc, mycpu)->env.active_tc.CP0_UserLocal;
+                    break;
             }
         }
     }
@@ -110,6 +116,12 @@ int mips_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals,
                     uc->quit_request = true;
                     uc_emu_stop(uc);
                     break;
+                case UC_MIPS_REG_CP0_CONFIG3:
+                    MIPS_CPU(uc, mycpu)->env.CP0_Config3 = *(mipsreg_t *)value;
+                    break;
+                case UC_MIPS_REG_CP0_USERLOCAL:
+                    MIPS_CPU(uc, mycpu)->env.active_tc.CP0_UserLocal = *(mipsreg_t *)value;
+                    break;
             }
         }
     }