From 074865ff9893d1020ba2e7e4a8930e6757ce7851 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 20 Mar 2018 07:17:30 -0400 Subject: [PATCH] cpu: Generify CPU init functions Backports commits 2994fd96d986578a342f2342501b4ad30f6d0a85, 701e3c78ce45fa630ffc6826c4b9a4218954bc7f, and d1853231c60d16af78cf4d1608d043614bfbac0b from qemuu --- qemu/aarch64.h | 1 - qemu/aarch64eb.h | 1 - qemu/arm.h | 1 - qemu/armeb.h | 1 - qemu/header_gen.py | 2 -- qemu/hw/arm/tosa.c | 4 ++-- qemu/hw/arm/virt.c | 2 +- qemu/hw/m68k/dummy_m68k.c | 8 ++++--- qemu/hw/sparc/leon3.c | 4 ++-- qemu/hw/sparc64/sun4u.c | 6 +++-- qemu/m68k.h | 1 - qemu/mips.h | 1 - qemu/mips64.h | 1 - qemu/mips64el.h | 1 - qemu/mipsel.h | 1 - qemu/powerpc.h | 1 - qemu/sparc.h | 2 -- qemu/sparc64.h | 2 -- qemu/target/arm/cpu.h | 11 +-------- qemu/target/arm/helper.c | 5 ---- qemu/target/i386/cpu.c | 37 +++++------------------------- qemu/target/i386/cpu.h | 8 ++++--- qemu/target/m68k/cpu.h | 13 ++++------- qemu/target/m68k/helper.c | 20 ---------------- qemu/target/mips/cpu.h | 4 ++++ qemu/target/sparc/cpu.c | 48 +-------------------------------------- qemu/target/sparc/cpu.h | 13 ++++------- qemu/x86_64.h | 1 - 28 files changed, 39 insertions(+), 161 deletions(-) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index 4e59518b..38964499 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_aarch64 #define cpu_abort cpu_abort_aarch64 #define cpu_address_space_init cpu_address_space_init_aarch64 -#define cpu_arm_init cpu_arm_init_aarch64 #define cpu_breakpoint_insert cpu_breakpoint_insert_aarch64 #define cpu_breakpoint_remove cpu_breakpoint_remove_aarch64 #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 9d5941b0..1b632d17 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_aarch64eb #define cpu_abort cpu_abort_aarch64eb #define cpu_address_space_init cpu_address_space_init_aarch64eb -#define cpu_arm_init cpu_arm_init_aarch64eb #define cpu_breakpoint_insert cpu_breakpoint_insert_aarch64eb #define cpu_breakpoint_remove cpu_breakpoint_remove_aarch64eb #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_aarch64eb diff --git a/qemu/arm.h b/qemu/arm.h index 6e227f09..e9e03acd 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_arm #define cpu_abort cpu_abort_arm #define cpu_address_space_init cpu_address_space_init_arm -#define cpu_arm_init cpu_arm_init_arm #define cpu_breakpoint_insert cpu_breakpoint_insert_arm #define cpu_breakpoint_remove cpu_breakpoint_remove_arm #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index f5572710..ff7b95be 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_armeb #define cpu_abort cpu_abort_armeb #define cpu_address_space_init cpu_address_space_init_armeb -#define cpu_arm_init cpu_arm_init_armeb #define cpu_breakpoint_insert cpu_breakpoint_insert_armeb #define cpu_breakpoint_remove cpu_breakpoint_remove_armeb #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_armeb diff --git a/qemu/header_gen.py b/qemu/header_gen.py index 744a3f2b..31892551 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -262,7 +262,6 @@ symbols = ( 'cptype_valid', 'cpu_abort', 'cpu_address_space_init', - 'cpu_arm_init', 'cpu_breakpoint_insert', 'cpu_breakpoint_remove', 'cpu_breakpoint_remove_all', @@ -4121,7 +4120,6 @@ sparc_symbols = ( 'cpu_raise_exception_ra', 'cpu_set_cwp', 'cpu_sparc_exec', - 'cpu_sparc_init', 'cpu_sparc_set_id', 'dump_mmu', 'helper_check_align', diff --git a/qemu/hw/arm/tosa.c b/qemu/hw/arm/tosa.c index 786b6485..56fd871a 100644 --- a/qemu/hw/arm/tosa.c +++ b/qemu/hw/arm/tosa.c @@ -22,9 +22,9 @@ static int tosa_init(struct uc_struct *uc, MachineState *machine) { if (uc->mode & UC_MODE_MCLASS) { - uc->cpu = (CPUState *)cpu_arm_init(uc, "cortex-m3"); + uc->cpu = cpu_init(uc, "cortex-m3"); } else { - uc->cpu = (CPUState *)cpu_arm_init(uc, "cortex-a15"); + uc->cpu = cpu_init(uc, "cortex-a15"); } return 0; diff --git a/qemu/hw/arm/virt.c b/qemu/hw/arm/virt.c index 24d09650..f4087142 100644 --- a/qemu/hw/arm/virt.c +++ b/qemu/hw/arm/virt.c @@ -79,7 +79,7 @@ static int machvirt_init(struct uc_struct *uc, MachineState *machine) } cpuobj = object_new(uc, object_class_get_name(oc)); - uc->cpu = (CPUState *)cpuobj; + uc->cpu = CPU(cpuobj); object_property_set_bool(uc, cpuobj, true, "realized", NULL); } diff --git a/qemu/hw/m68k/dummy_m68k.c b/qemu/hw/m68k/dummy_m68k.c index f717cf55..0423bafd 100644 --- a/qemu/hw/m68k/dummy_m68k.c +++ b/qemu/hw/m68k/dummy_m68k.c @@ -22,16 +22,18 @@ static int dummy_m68k_init(struct uc_struct *uc, MachineState *machine) const char *cpu_model = machine->cpu_model; CPUM68KState *env; - if (!cpu_model) + if (!cpu_model) { cpu_model = "cfv4e"; + } - env = cpu_init(uc, cpu_model); - if (!env) { + uc->cpu = cpu_init(uc, cpu_model); + if (!uc->cpu) { fprintf(stderr, "Unable to find m68k CPU definition\n"); return -1; } /* Initialize CPU registers. */ + env = uc->cpu->env_ptr; env->vbr = 0; env->pc = 0; diff --git a/qemu/hw/sparc/leon3.c b/qemu/hw/sparc/leon3.c index 3dd6c802..68083974 100644 --- a/qemu/hw/sparc/leon3.c +++ b/qemu/hw/sparc/leon3.c @@ -46,8 +46,8 @@ static int leon3_generic_hw_init(struct uc_struct *uc, MachineState *machine) cpu_model = "LEON3"; } - cpu = cpu_sparc_init(uc, cpu_model); - uc->cpu = CPU(cpu); + uc->cpu = cpu_init(uc, cpu_model); + cpu = SPARC_CPU(uc, uc->cpu); if (cpu == NULL) { fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n"); return -1; diff --git a/qemu/hw/sparc64/sun4u.c b/qemu/hw/sparc64/sun4u.c index ec6bfdfe..7b0246a9 100644 --- a/qemu/hw/sparc64/sun4u.c +++ b/qemu/hw/sparc64/sun4u.c @@ -39,10 +39,12 @@ static int sun4u_init(struct uc_struct *uc, MachineState *machine) const char *cpu_model = machine->cpu_model; SPARCCPU *cpu; - if (cpu_model == NULL) + if (cpu_model == NULL) { cpu_model = "Sun UltraSparc IV"; + } - cpu = cpu_sparc_init(uc, cpu_model); + uc->cpu = cpu_init(uc, cpu_model); + cpu = SPARC_CPU(uc, uc->cpu); if (cpu == NULL) { fprintf(stderr, "Unable to find Sparc CPU definition\n"); return -1; diff --git a/qemu/m68k.h b/qemu/m68k.h index 658451d9..a96f3975 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_m68k #define cpu_abort cpu_abort_m68k #define cpu_address_space_init cpu_address_space_init_m68k -#define cpu_arm_init cpu_arm_init_m68k #define cpu_breakpoint_insert cpu_breakpoint_insert_m68k #define cpu_breakpoint_remove cpu_breakpoint_remove_m68k #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_m68k diff --git a/qemu/mips.h b/qemu/mips.h index da9371c2..ea0cd272 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_mips #define cpu_abort cpu_abort_mips #define cpu_address_space_init cpu_address_space_init_mips -#define cpu_arm_init cpu_arm_init_mips #define cpu_breakpoint_insert cpu_breakpoint_insert_mips #define cpu_breakpoint_remove cpu_breakpoint_remove_mips #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index 0fb07a72..43cb3df8 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_mips64 #define cpu_abort cpu_abort_mips64 #define cpu_address_space_init cpu_address_space_init_mips64 -#define cpu_arm_init cpu_arm_init_mips64 #define cpu_breakpoint_insert cpu_breakpoint_insert_mips64 #define cpu_breakpoint_remove cpu_breakpoint_remove_mips64 #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index 4f80c415..90633409 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_mips64el #define cpu_abort cpu_abort_mips64el #define cpu_address_space_init cpu_address_space_init_mips64el -#define cpu_arm_init cpu_arm_init_mips64el #define cpu_breakpoint_insert cpu_breakpoint_insert_mips64el #define cpu_breakpoint_remove cpu_breakpoint_remove_mips64el #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index 6cf26d43..2ac2bc99 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_mipsel #define cpu_abort cpu_abort_mipsel #define cpu_address_space_init cpu_address_space_init_mipsel -#define cpu_arm_init cpu_arm_init_mipsel #define cpu_breakpoint_insert cpu_breakpoint_insert_mipsel #define cpu_breakpoint_remove cpu_breakpoint_remove_mipsel #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index 2ad22b97..d4a16e55 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_powerpc #define cpu_abort cpu_abort_powerpc #define cpu_address_space_init cpu_address_space_init_powerpc -#define cpu_arm_init cpu_arm_init_powerpc #define cpu_breakpoint_insert cpu_breakpoint_insert_powerpc #define cpu_breakpoint_remove cpu_breakpoint_remove_powerpc #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_powerpc diff --git a/qemu/sparc.h b/qemu/sparc.h index 356a308f..09573bd5 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_sparc #define cpu_abort cpu_abort_sparc #define cpu_address_space_init cpu_address_space_init_sparc -#define cpu_arm_init cpu_arm_init_sparc #define cpu_breakpoint_insert cpu_breakpoint_insert_sparc #define cpu_breakpoint_remove cpu_breakpoint_remove_sparc #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_sparc @@ -3064,7 +3063,6 @@ #define cpu_raise_exception_ra cpu_raise_exception_ra_sparc #define cpu_set_cwp cpu_set_cwp_sparc #define cpu_sparc_exec cpu_sparc_exec_sparc -#define cpu_sparc_init cpu_sparc_init_sparc #define cpu_sparc_set_id cpu_sparc_set_id_sparc #define dump_mmu dump_mmu_sparc #define helper_check_align helper_check_align_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index 742f070d..5e11b8d6 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_sparc64 #define cpu_abort cpu_abort_sparc64 #define cpu_address_space_init cpu_address_space_init_sparc64 -#define cpu_arm_init cpu_arm_init_sparc64 #define cpu_breakpoint_insert cpu_breakpoint_insert_sparc64 #define cpu_breakpoint_remove cpu_breakpoint_remove_sparc64 #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_sparc64 @@ -3064,7 +3063,6 @@ #define cpu_raise_exception_ra cpu_raise_exception_ra_sparc64 #define cpu_set_cwp cpu_set_cwp_sparc64 #define cpu_sparc_exec cpu_sparc_exec_sparc64 -#define cpu_sparc_init cpu_sparc_init_sparc64 #define cpu_sparc_set_id cpu_sparc_set_id_sparc64 #define dump_mmu dump_mmu_sparc64 #define helper_check_align helper_check_align_sparc64 diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 876bb66f..33335d1b 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -840,7 +840,6 @@ bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req); hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); -ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model); target_ulong do_arm_semihosting(CPUARMState *env); void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); @@ -2269,16 +2268,8 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, return unmasked || pstate_unmasked; } -static inline CPUARMState *cpu_init(struct uc_struct *uc, const char *cpu_model) -{ - ARMCPU *cpu = cpu_arm_init(uc, cpu_model); - if (cpu) { - return &cpu->env; - } - return NULL; -} - #ifdef TARGET_ARM +#define cpu_init(uc, cpu_model) cpu_generic_init(uc, TYPE_ARM_CPU, cpu_model) #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index bbe902c2..51a80191 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -4733,11 +4733,6 @@ void register_cp_regs_for_features(ARMCPU *cpu) } } -ARMCPU *cpu_arm_init(struct uc_struct *uc, const char *cpu_model) -{ - return ARM_CPU(uc, cpu_generic_init(uc, TYPE_ARM_CPU, cpu_model)); -} - void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) { #if 0 diff --git a/qemu/target/i386/cpu.c b/qemu/target/i386/cpu.c index a3b75e63..43444e9d 100644 --- a/qemu/target/i386/cpu.c +++ b/qemu/target/i386/cpu.c @@ -3201,37 +3201,6 @@ out: return cpu; } -CPUX86State *cpu_x86_init_user(struct uc_struct *uc, const char *cpu_model) -{ - Error *error = NULL; - X86CPU *cpu; - - cpu = cpu_x86_create(uc, cpu_model, &error); - if (error) { - goto error; - } - - object_property_set_int(uc, OBJECT(cpu), CPU(cpu)->cpu_index, "apic-id", - &error); - if (error) { - goto error; - } - - object_property_set_bool(uc, OBJECT(cpu), true, "realized", &error); - if (error) { - goto error; - } - - return &cpu->env; - -error: - error_free(error); - if (cpu != NULL) { - object_unref(uc, OBJECT(cpu)); - } - return NULL; -} - static void x86_cpu_cpudef_class_init(struct uc_struct *uc, ObjectClass *oc, void *data) { X86CPUDefinition *cpudef = data; @@ -4144,6 +4113,12 @@ static int x86_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err goto out; }*/ + object_property_set_int(uc, OBJECT(cpu), CPU(cpu)->cpu_index, "apic-id", + &local_err); + if (local_err) { + goto out; + } + if (cpu->apic_id == UNASSIGNED_APIC_ID) { error_setg(errp, "apic-id property was not initialized properly"); return -1; diff --git a/qemu/target/i386/cpu.h b/qemu/target/i386/cpu.h index c2380297..d74233c4 100644 --- a/qemu/target/i386/cpu.h +++ b/qemu/target/i386/cpu.h @@ -1520,10 +1520,12 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS) -CPUX86State *cpu_x86_init_user(struct uc_struct *uc, const char *cpu_model); -#define cpu_init cpu_x86_init_user - #ifdef TARGET_I386 +#define cpu_init(uc, cpu_model) cpu_generic_init(uc, TYPE_X86_CPU, cpu_model) + +#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU +#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) + #define cpu_signal_handler cpu_x86_signal_handler #endif diff --git a/qemu/target/m68k/cpu.h b/qemu/target/m68k/cpu.h index d3ccb858..8b725a83 100644 --- a/qemu/target/m68k/cpu.h +++ b/qemu/target/m68k/cpu.h @@ -191,7 +191,6 @@ int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void m68k_tcg_init(struct uc_struct *uc); -M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -522,14 +521,10 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -static inline CPUM68KState *cpu_init(struct uc_struct *uc, const char *cpu_model) -{ - M68kCPU *cpu = cpu_m68k_init(uc, cpu_model); - if (cpu == NULL) { - return NULL; - } - return &cpu->env; -} +#define cpu_init(uc, cpu_model) cpu_generic_init(uc, TYPE_M68K_CPU, cpu_model) + +#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU +#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX #define cpu_signal_handler cpu_m68k_signal_handler #define cpu_list m68k_cpu_list diff --git a/qemu/target/m68k/helper.c b/qemu/target/m68k/helper.c index 60155e90..436dfff9 100644 --- a/qemu/target/m68k/helper.c +++ b/qemu/target/m68k/helper.c @@ -27,26 +27,6 @@ #define SIGNBIT (1u << 31) -M68kCPU *cpu_m68k_init(struct uc_struct *uc, const char *cpu_model) -{ - M68kCPU *cpu; - CPUM68KState *env; - ObjectClass *oc; - - oc = cpu_class_by_name(uc, TYPE_M68K_CPU, cpu_model); - if (oc == NULL) { - return NULL; - } - cpu = M68K_CPU(uc, object_new(uc, object_class_get_name(oc))); - env = &cpu->env; - - register_m68k_insns(env); - - object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) { M68kCPU *cpu = m68k_env_get_cpu(env); diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h index c93f9cff..279382fc 100644 --- a/qemu/target/mips/cpu.h +++ b/qemu/target/mips/cpu.h @@ -744,6 +744,10 @@ enum { #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 #define cpu_init(uc, cpu_model) cpu_generic_init(uc, TYPE_MIPS_CPU, cpu_model) + +#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU +#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX + int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); bool cpu_supports_isa(struct uc_struct *uc, const char *cpu_model, unsigned int isa); bool cpu_supports_cps_smp(struct uc_struct *uc, const char *cpu_type); diff --git a/qemu/target/sparc/cpu.c b/qemu/target/sparc/cpu.c index d17c95a8..73fcdd17 100644 --- a/qemu/target/sparc/cpu.c +++ b/qemu/target/sparc/cpu.c @@ -94,53 +94,6 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -static void sparc_cpu_parse_features(CPUState *cs, char *features, - Error **errp); - -static int cpu_sparc_register(struct uc_struct *uc, SPARCCPU *cpu, const char *cpu_model) -{ - char *s = g_strdup(cpu_model); - char *featurestr = strtok(s, ","); - Error *err = NULL; - - featurestr = strtok(NULL, ","); - sparc_cpu_parse_features(CPU(cpu), featurestr, &err); - g_free(s); - if (err) { - //error_report("%s", error_get_pretty(err)); - error_free(err); - return -1; - } - - return 0; -} - -SPARCCPU *cpu_sparc_init(struct uc_struct *uc, const char *cpu_model) -{ - SPARCCPU *cpu; - ObjectClass *oc; - char *str, *name; - - str = g_strdup(cpu_model); - name = strtok(str, ","); - oc = cpu_class_by_name(uc, TYPE_SPARC_CPU, name); - g_free(str); - if (oc == NULL) { - return NULL; - } - - cpu = SPARC_CPU(uc, object_new(uc, object_class_get_name(oc))); - - if (cpu_sparc_register(uc, cpu, cpu_model) < 0) { - object_unref(uc, OBJECT(cpu)); - return NULL; - } - - object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu) { #if !defined(TARGET_SPARC64) @@ -893,6 +846,7 @@ static void sparc_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *da cc->reset = sparc_cpu_reset; cc->class_by_name = sparc_cpu_class_by_name; + cc->parse_features = sparc_cpu_parse_features; cc->has_work = sparc_cpu_has_work; cc->do_interrupt = sparc_cpu_do_interrupt; cc->cpu_exec_interrupt = sparc_cpu_exec_interrupt; diff --git a/qemu/target/sparc/cpu.h b/qemu/target/sparc/cpu.h index 68bde6ea..4361020b 100644 --- a/qemu/target/sparc/cpu.h +++ b/qemu/target/sparc/cpu.h @@ -568,7 +568,6 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN; #ifndef NO_CPU_IO_DEFS /* cpu_init.c */ -SPARCCPU *cpu_sparc_init(struct uc_struct *uc, const char *cpu_model); void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* mmu_helper.c */ @@ -643,16 +642,12 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #ifndef NO_CPU_IO_DEFS -static inline CPUSPARCState *cpu_init(struct uc_struct *uc, const char *cpu_model) -{ - SPARCCPU *cpu = cpu_sparc_init(uc, cpu_model); - if (cpu == NULL) { - return NULL; - } - return &cpu->env; -} +#define cpu_init(uc, cpu_model) cpu_generic_init(uc, TYPE_SPARC_CPU, cpu_model) #endif +#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU +#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX + #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 65cd96e4..3b12aef7 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -256,7 +256,6 @@ #define cptype_valid cptype_valid_x86_64 #define cpu_abort cpu_abort_x86_64 #define cpu_address_space_init cpu_address_space_init_x86_64 -#define cpu_arm_init cpu_arm_init_x86_64 #define cpu_breakpoint_insert cpu_breakpoint_insert_x86_64 #define cpu_breakpoint_remove cpu_breakpoint_remove_x86_64 #define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_x86_64