From 0c5ebbd096519b037575930e27e98cfb094a124b Mon Sep 17 00:00:00 2001
From: Leon Alrae <leon.alrae@imgtec.com>
Date: Thu, 22 Feb 2018 10:47:52 -0500
Subject: [PATCH] target-mips: check CP0 enabled for CACHE instruction also in
 R6

Backports commit 40d48212f934d4deab40ffe84a0f9c4c553d4742 from qemu
---
 qemu/target-mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qemu/target-mips/translate.c b/qemu/target-mips/translate.c
index fa29b724..1fafc8b6 100644
--- a/qemu/target-mips/translate.c
+++ b/qemu/target-mips/translate.c
@@ -17322,6 +17322,7 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
         /* Treat as NOP. */
         break;
     case R6_OPC_CACHE:
+        check_cp0_enabled(ctx);
         /* Treat as NOP. */
         break;
     case R6_OPC_SC: