From 0c6311f8cc15f25d206bb894e0f87442235e166e Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 3 Jul 2018 19:23:20 -0400 Subject: [PATCH] accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code() In commit 71b9a45330fe220d1 we changed the condition we use to determine whether we need to refill the TLB in get_page_addr_code() to if (unlikely(env->tlb_table[mmu_idx][index].addr_code != (addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)))) { This isn't the right check (it will falsely fail if the input addr happens to have the low bit corresponding to TLB_INVALID_MASK set, for instance). Replace it with a use of the new tlb_hit() function, which is the correct test. Backports commit e4c967a7201400d7f76e5847d5b4c4ac9e2566e0 from qemu --- qemu/accel/tcg/cputlb.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/qemu/accel/tcg/cputlb.c b/qemu/accel/tcg/cputlb.c index ac014929..ca6813bb 100644 --- a/qemu/accel/tcg/cputlb.c +++ b/qemu/accel/tcg/cputlb.c @@ -313,8 +313,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx = cpu_mmu_index(env, true); - if (unlikely(env->tlb_table[mmu_idx][index].addr_code != - (addr & TARGET_PAGE_MASK))) { + if (unlikely(!tlb_hit(env->tlb_table[mmu_idx][index].addr_code, addr))) { cpu_ldub_code(env, addr); //check for NX related error from softmmu if (env->invalid_error == UC_ERR_FETCH_PROT) {