From 0db334c0e4e191a681965a36e7b49b7c51b8c13f Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 1 Mar 2018 22:59:01 -0500 Subject: [PATCH] target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32() To run a VM in 32-bit EL1 our AArch32 interrupt handling code needs to be able to cope with VIRQ and VFIQ exceptions. These behave like IRQ and FIQ except that we don't need to try to route them to Monitor mode. Backports commit 87a4b270348c69a446ebcddc039bfae31b1675cb from qemu --- qemu/target/arm/helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 86c8a4c3..279498b9 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -5647,6 +5647,20 @@ static void arm_cpu_do_interrupt_aarch32_(CPUState *cs) new_mode = ARM_CPU_MODE_MON; } break; + case EXCP_VIRQ: + new_mode = ARM_CPU_MODE_IRQ; + addr = 0x18; + /* Disable IRQ and imprecise data aborts. */ + mask = CPSR_A | CPSR_I; + offset = 4; + break; + case EXCP_VFIQ: + new_mode = ARM_CPU_MODE_FIQ; + addr = 0x1c; + /* Disable FIQ, IRQ and imprecise data aborts. */ + mask = CPSR_A | CPSR_I | CPSR_F; + offset = 4; + break; case EXCP_SMC: new_mode = ARM_CPU_MODE_MON; addr = 0x08;