diff --git a/qemu/target/arm/cpu64.c b/qemu/target/arm/cpu64.c
index 70cd57db..dfb9272f 100644
--- a/qemu/target/arm/cpu64.c
+++ b/qemu/target/arm/cpu64.c
@@ -301,6 +301,7 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque)
 
     t = cpu->isar.id_aa64pfr1;
     t = FIELD_DP64(t, ID_AA64PFR1, BT, 1);
+    t = FIELD_DP64(t, ID_AA64PFR1, SSBS, 2);
     /*
      * Begin with full support for MTE; will be downgraded to MTE=1
      * during realize if the board provides no tag memory.
@@ -349,6 +350,10 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque)
     u = FIELD_DP32(u, ID_PFR0, DIT, 1);
     cpu->isar.id_pfr0 = u;
 
+    u = cpu->isar.id_pfr2;
+    u = FIELD_DP32(u, ID_PFR2, SSBS, 1);
+    cpu->isar.id_pfr2 = u;
+
     u = cpu->isar.id_mmfr3;
     u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */
     cpu->isar.id_mmfr3 = u;