From 11ac98331a6dfd3f5bfb2db1d79724bd6011196f Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Mon, 18 Nov 2019 22:46:45 -0500 Subject: [PATCH] target/mips: Clean up handling of CP0 register 4 Clean up handling of CP0 register 4. Backports commit 020fe379093deb116d72174268335d60133f0e26 from qemu --- qemu/target/mips/cpu.h | 2 ++ qemu/target/mips/translate.c | 36 ++++++++++++++++++++---------------- 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h index 9507c440..37996ece 100644 --- a/qemu/target/mips/cpu.h +++ b/qemu/target/mips/cpu.h @@ -304,7 +304,9 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG03__TCOPT 7 /* CP0 Register 04 */ #define CP0_REG04__CONTEXT 0 +#define CP0_REG04__CONTEXTCONFIG 1 #define CP0_REG04__USERLOCAL 2 +#define CP0_REG04__XCONTEXTCONFIG 3 #define CP0_REG04__DBGCONTEXTID 4 #define CP0_REG00__MMID 5 /* CP0 Register 05 */ diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index 246dd5ef..ba497d19 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -7058,16 +7058,17 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_04: switch (sel) { - case 0: + case CP0_REG04__CONTEXT: tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_Context)); tcg_gen_ext32s_tl(tcg_ctx, arg, arg); register_name = "Context"; break; - case 1: - /* gen_helper_mfc0_contextconfig(arg); - SmartMIPS ASE */ + case CP0_REG04__CONTEXTCONFIG: + /* SmartMIPS ASE */ + /* gen_helper_mfc0_contextconfig(arg); */ register_name = "ContextConfig"; goto cp0_unimplemented; - case 2: + case CP0_REG04__USERLOCAL: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); @@ -7790,15 +7791,16 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_04: switch (sel) { - case 0: + case CP0_REG04__CONTEXT: gen_helper_mtc0_context(tcg_ctx, tcg_ctx->cpu_env, arg); register_name = "Context"; break; - case 1: -// gen_helper_mtc0_contextconfig(tcg_ctx->cpu_env, arg); /* SmartMIPS ASE */ + case CP0_REG04__CONTEXTCONFIG: + /* SmartMIPS ASE */ + /* gen_helper_mtc0_contextconfig(tcg_ctx->cpu_env, arg); */ register_name = "ContextConfig"; goto cp0_unimplemented; - case 2: + case CP0_REG04__USERLOCAL: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); @@ -8530,15 +8532,16 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_04: switch (sel) { - case 0: + case CP0_REG04__CONTEXT: tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_Context)); register_name = "Context"; break; - case 1: -// gen_helper_dmfc0_contextconfig(arg); /* SmartMIPS ASE */ + case CP0_REG04__CONTEXTCONFIG: + /* SmartMIPS ASE */ + /* gen_helper_dmfc0_contextconfig(arg); */ register_name = "ContextConfig"; goto cp0_unimplemented; - case 2: + case CP0_REG04__USERLOCAL: CP0_CHECK(ctx->ulri); tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); @@ -9241,15 +9244,16 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) break; case CP0_REGISTER_04: switch (sel) { - case 0: + case CP0_REG04__CONTEXT: gen_helper_mtc0_context(tcg_ctx, tcg_ctx->cpu_env, arg); register_name = "Context"; break; - case 1: -// gen_helper_mtc0_contextconfig(tcg_ctx->cpu_env, arg); /* SmartMIPS ASE */ + case CP0_REG04__CONTEXTCONFIG: + /* SmartMIPS ASE */ + /* gen_helper_mtc0_contextconfig(tcg_ctx->cpu_env, arg); */ register_name = "ContextConfig"; goto cp0_unimplemented; - case 2: + case CP0_REG04__USERLOCAL: CP0_CHECK(ctx->ulri); tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal));