From 12cad295107dfa50c4eba243435e54269baf3132 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 30 Apr 2020 21:40:01 -0400 Subject: [PATCH] target/arm/cpu: Update coding style to make checkpatch.pl happy We will move this code in the next commit. Clean it up first to avoid checkpatch.pl errors. Backports commit 51c510aa5876a681cd0059ed3bacaa17590dc2d5 from qemu --- qemu/target/arm/cpu.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index d0253167..0ea676c4 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -577,7 +577,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) CPUClass *cc = CPU_GET_CLASS(env->uc, cs); bool ret = false; - /* ARMv7-M interrupt masking works differently than -A or -R. + /* + * ARMv7-M interrupt masking works differently than -A or -R. * There is no FIQ/IRQ distinction. Instead of I and F bits * masking FIQ and IRQ interrupts, an exception is taken only * if it is higher priority than the current execution priority @@ -1154,7 +1155,8 @@ static void arm1026_initfn(struct uc_struct *uc, Object *obj, void *opaque) static void arm1136_r2_initfn(struct uc_struct *uc, Object *obj, void *opaque) { ARMCPU *cpu = ARM_CPU(uc, obj); - /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an + /* + * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an * older core than plain "arm1136". In particular this does not * have the v6K features. * These ID register values are correct for 1136 but may be wrong @@ -1931,7 +1933,8 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm926", .initfn = arm926_initfn }, { .name = "arm946", .initfn = arm946_initfn }, { .name = "arm1026", .initfn = arm1026_initfn }, - /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an + /* + * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an * older core than plain "arm1136". In particular this does not * have the v6K features. */