From 199e2f8a7d3c9d9c151d590ce75d12be715aa2a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 8 Aug 2019 17:48:29 -0400 Subject: [PATCH] target/arm: Restrict semi-hosting to TCG Semihosting hooks either SVC or HLT instructions, and inside KVM both of those go to EL1, ie to the guest, and can't be trapped to KVM. Let check_for_semihosting() return False when not running on TCG. backports commit 91f78c58da9ba78c8ed00f5d822b701765be8499 from qemu --- qemu/target/arm/cpu.h | 7 +++++++ qemu/target/arm/helper.c | 8 +++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 0bad697d..533b8aa8 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -910,7 +910,14 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, { } #endif +#if !defined(CONFIG_TCG) +static inline target_ulong do_arm_semihosting(CPUARMState *env) +{ + g_assert_not_reached(); +} +#else target_ulong do_arm_semihosting(CPUARMState *env); +#endif void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index c3b9652f..4d433cf1 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -18,8 +18,10 @@ #include "qemu/crc32c.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" -#include "arm_ldst.h" #include "qemu/range.h" +#ifdef CONFIG_TCG +#include "arm_ldst.h" +#endif #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ @@ -10214,6 +10216,7 @@ static inline bool check_for_semihosting(CPUState *cs) // Unicorn: ifdefd out #if 0 +#ifdef CONFIG_TCG /* * Check whether this exception is a semihosting call; if so * then handle it and return true; otherwise return false. @@ -10293,6 +10296,9 @@ static inline bool check_for_semihosting(CPUState *cs) env->regs[0] = do_arm_semihosting(env); return true; } +#else + return false; +#endif #endif }