diff --git a/qemu/aarch64.h b/qemu/aarch64.h
index 58b12105..f62d843d 100644
--- a/qemu/aarch64.h
+++ b/qemu/aarch64.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_aarch64
 #define arm_release arm_release_aarch64
 #define arm_tlb_fill arm_tlb_fill_aarch64
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_aarch64
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_aarch64
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_aarch64
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_aarch64
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_aarch64
diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h
index 1f2a8675..53740fd1 100644
--- a/qemu/aarch64eb.h
+++ b/qemu/aarch64eb.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_aarch64eb
 #define arm_release arm_release_aarch64eb
 #define arm_tlb_fill arm_tlb_fill_aarch64eb
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_aarch64eb
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_aarch64eb
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_aarch64eb
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_aarch64eb
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_aarch64eb
diff --git a/qemu/arm.h b/qemu/arm.h
index b67bee1f..2873853e 100644
--- a/qemu/arm.h
+++ b/qemu/arm.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_arm
 #define arm_release arm_release_arm
 #define arm_tlb_fill arm_tlb_fill_arm
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_arm
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_arm
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_arm
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_arm
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_arm
diff --git a/qemu/armeb.h b/qemu/armeb.h
index c780561a..97af51db 100644
--- a/qemu/armeb.h
+++ b/qemu/armeb.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_armeb
 #define arm_release arm_release_armeb
 #define arm_tlb_fill arm_tlb_fill_armeb
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_armeb
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_armeb
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_armeb
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_armeb
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_armeb
diff --git a/qemu/header_gen.py b/qemu/header_gen.py
index 44b5ccc2..8daf6421 100644
--- a/qemu/header_gen.py
+++ b/qemu/header_gen.py
@@ -30,7 +30,7 @@ symbols = (
     'address_space_stq_be',
     'arm_release',
     'arm_tlb_fill',
-    'arm_regime_using_lpae_format',
+    'arm_s1_regime_using_lpae_format',
     'arm_cpu_do_unaligned_access',
     'aarch64_sync_32_to_64',
     'aarch64_sync_64_to_32',
diff --git a/qemu/m68k.h b/qemu/m68k.h
index ebe93e9a..b8c454ff 100644
--- a/qemu/m68k.h
+++ b/qemu/m68k.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_m68k
 #define arm_release arm_release_m68k
 #define arm_tlb_fill arm_tlb_fill_m68k
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_m68k
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_m68k
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_m68k
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_m68k
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_m68k
diff --git a/qemu/mips.h b/qemu/mips.h
index 11f59a22..31cbac48 100644
--- a/qemu/mips.h
+++ b/qemu/mips.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_mips
 #define arm_release arm_release_mips
 #define arm_tlb_fill arm_tlb_fill_mips
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_mips
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_mips
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_mips
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_mips
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_mips
diff --git a/qemu/mips64.h b/qemu/mips64.h
index 81f01afe..779c0eb8 100644
--- a/qemu/mips64.h
+++ b/qemu/mips64.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_mips64
 #define arm_release arm_release_mips64
 #define arm_tlb_fill arm_tlb_fill_mips64
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_mips64
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_mips64
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_mips64
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_mips64
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_mips64
diff --git a/qemu/mips64el.h b/qemu/mips64el.h
index bdc79ea2..4ea7f7ad 100644
--- a/qemu/mips64el.h
+++ b/qemu/mips64el.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_mips64el
 #define arm_release arm_release_mips64el
 #define arm_tlb_fill arm_tlb_fill_mips64el
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_mips64el
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_mips64el
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_mips64el
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_mips64el
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_mips64el
diff --git a/qemu/mipsel.h b/qemu/mipsel.h
index c3ea2d86..c475562c 100644
--- a/qemu/mipsel.h
+++ b/qemu/mipsel.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_mipsel
 #define arm_release arm_release_mipsel
 #define arm_tlb_fill arm_tlb_fill_mipsel
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_mipsel
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_mipsel
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_mipsel
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_mipsel
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_mipsel
diff --git a/qemu/powerpc.h b/qemu/powerpc.h
index b2637eaf..17c721b5 100644
--- a/qemu/powerpc.h
+++ b/qemu/powerpc.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_powerpc
 #define arm_release arm_release_powerpc
 #define arm_tlb_fill arm_tlb_fill_powerpc
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_powerpc
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_powerpc
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_powerpc
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_powerpc
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_powerpc
diff --git a/qemu/sparc.h b/qemu/sparc.h
index 9776b925..34f3fb34 100644
--- a/qemu/sparc.h
+++ b/qemu/sparc.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_sparc
 #define arm_release arm_release_sparc
 #define arm_tlb_fill arm_tlb_fill_sparc
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_sparc
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_sparc
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_sparc
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_sparc
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_sparc
diff --git a/qemu/sparc64.h b/qemu/sparc64.h
index 9f6b2eee..32235ebf 100644
--- a/qemu/sparc64.h
+++ b/qemu/sparc64.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_sparc64
 #define arm_release arm_release_sparc64
 #define arm_tlb_fill arm_tlb_fill_sparc64
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_sparc64
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_sparc64
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_sparc64
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_sparc64
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_sparc64
diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c
index cfab231b..855fbc3f 100644
--- a/qemu/target-arm/helper.c
+++ b/qemu/target-arm/helper.c
@@ -5339,11 +5339,15 @@ static inline bool regime_using_lpae_format(CPUARMState *env,
     return false;
 }
 
-/* Returns true if the translation regime is using LPAE format page tables.
- * Used when raising alignment exceptions, whose FSR changes depending on
- * whether the long or short descriptor format is in use. */
-bool arm_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx)
+/* Returns true if the stage 1 translation regime is using LPAE format page
+ * tables. Used when raising alignment exceptions, whose FSR changes depending
+ * on whether the long or short descriptor format is in use. */
+bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx)
 {
+    if (mmu_idx == ARMMMUIdx_S12NSE0 || mmu_idx == ARMMMUIdx_S12NSE1) {
+        mmu_idx += ARMMMUIdx_S1NSE0;
+    }
+
     return regime_using_lpae_format(env, mmu_idx);
 }
 
diff --git a/qemu/target-arm/internals.h b/qemu/target-arm/internals.h
index c8902e68..5f76b010 100644
--- a/qemu/target-arm/internals.h
+++ b/qemu/target-arm/internals.h
@@ -443,8 +443,9 @@ struct ARMMMUFaultInfo {
 bool arm_tlb_fill(CPUState *cpu, vaddr address, int rw, int mmu_idx,
                   uint32_t *fsr, ARMMMUFaultInfo *fi);
 
-/* Return true if the translation regime is using LPAE format page tables */
-bool arm_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
+/* Return true if the stage 1 translation regime is using LPAE format page
+ * tables */
+bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
 
 /* Raise a data fault alignment exception for the specified virtual address */
 void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
diff --git a/qemu/target-arm/op_helper.c b/qemu/target-arm/op_helper.c
index c43a1ded..1dcc477b 100644
--- a/qemu/target-arm/op_helper.c
+++ b/qemu/target-arm/op_helper.c
@@ -149,7 +149,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write,
     /* the DFSR for an alignment fault depends on whether we're using
      * the LPAE long descriptor format, or the short descriptor format
      */
-    if (arm_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
+    if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
         env->exception.fsr = 0x21;
     } else {
         env->exception.fsr = 0x1;
diff --git a/qemu/x86_64.h b/qemu/x86_64.h
index fa1c1753..59e9518c 100644
--- a/qemu/x86_64.h
+++ b/qemu/x86_64.h
@@ -24,7 +24,7 @@
 #define address_space_stq_be address_space_stq_be_x86_64
 #define arm_release arm_release_x86_64
 #define arm_tlb_fill arm_tlb_fill_x86_64
-#define arm_regime_using_lpae_format arm_regime_using_lpae_format_x86_64
+#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_x86_64
 #define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_x86_64
 #define aarch64_sync_32_to_64 aarch64_sync_32_to_64_x86_64
 #define aarch64_sync_64_to_32 aarch64_sync_64_to_32_x86_64