From 2150745db43c9ad8f193f81a915f2e8310888e7b Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 3 May 2018 14:46:46 -0400 Subject: [PATCH] tcg: Improve TCGv_ptr support Drop TCGV_PTR_TO_NAT and TCGV_NAT_TO_PTR internal macros. Add tcg_temp_local_new_ptr, tcg_gen_brcondi_ptr, tcg_gen_ext_i32_ptr, tcg_gen_trunc_i64_ptr, tcg_gen_extu_ptr_i64, tcg_gen_trunc_ptr_i32. Use inlines instead of macros where possible. Backports commit 5bfa803448638a45542441fd6b7cc1241403ea72 from qemu --- qemu/aarch64.h | 5 --- qemu/aarch64eb.h | 5 --- qemu/arm.h | 5 --- qemu/armeb.h | 5 --- qemu/header_gen.py | 5 --- qemu/m68k.h | 5 --- qemu/mips.h | 5 --- qemu/mips64.h | 5 --- qemu/mips64el.h | 5 --- qemu/mipsel.h | 5 --- qemu/powerpc.h | 5 --- qemu/sparc.h | 5 --- qemu/sparc64.h | 5 --- qemu/tcg/tcg-op.h | 91 +++++++++++++++++++++++++++++++++++----------- qemu/tcg/tcg.c | 31 +--------------- qemu/tcg/tcg.h | 91 +++++++++++++++++++++++++++++----------------- qemu/x86_64.h | 5 --- 17 files changed, 130 insertions(+), 153 deletions(-) diff --git a/qemu/aarch64.h b/qemu/aarch64.h index 2fcfbc92..f5ceefeb 100644 --- a/qemu/aarch64.h +++ b/qemu/aarch64.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_aarch64 #define tcg_tb_alloc tcg_tb_alloc_aarch64 #define tcg_temp_alloc tcg_temp_alloc_aarch64 -#define tcg_temp_free_i32 tcg_temp_free_i32_aarch64 -#define tcg_temp_free_i64 tcg_temp_free_i64_aarch64 -#define tcg_temp_free_vec tcg_temp_free_vec_aarch64 #define tcg_temp_free_internal tcg_temp_free_internal_aarch64 #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_aarch64 #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_aarch64 #define tcg_temp_new_i32 tcg_temp_new_i32_aarch64 #define tcg_temp_new_i64 tcg_temp_new_i64_aarch64 #define tcg_temp_new_internal tcg_temp_new_internal_aarch64 -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_aarch64 -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_aarch64 #define tcg_temp_new_vec tcg_temp_new_vec_aarch64 #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_aarch64 #define tdb_hash tdb_hash_aarch64 diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h index 8cebeeff..54147397 100644 --- a/qemu/aarch64eb.h +++ b/qemu/aarch64eb.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_aarch64eb #define tcg_tb_alloc tcg_tb_alloc_aarch64eb #define tcg_temp_alloc tcg_temp_alloc_aarch64eb -#define tcg_temp_free_i32 tcg_temp_free_i32_aarch64eb -#define tcg_temp_free_i64 tcg_temp_free_i64_aarch64eb -#define tcg_temp_free_vec tcg_temp_free_vec_aarch64eb #define tcg_temp_free_internal tcg_temp_free_internal_aarch64eb #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_aarch64eb #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_aarch64eb #define tcg_temp_new_i32 tcg_temp_new_i32_aarch64eb #define tcg_temp_new_i64 tcg_temp_new_i64_aarch64eb #define tcg_temp_new_internal tcg_temp_new_internal_aarch64eb -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_aarch64eb -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_aarch64eb #define tcg_temp_new_vec tcg_temp_new_vec_aarch64eb #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_aarch64eb #define tdb_hash tdb_hash_aarch64eb diff --git a/qemu/arm.h b/qemu/arm.h index b3f42b54..074f4fdb 100644 --- a/qemu/arm.h +++ b/qemu/arm.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_arm #define tcg_tb_alloc tcg_tb_alloc_arm #define tcg_temp_alloc tcg_temp_alloc_arm -#define tcg_temp_free_i32 tcg_temp_free_i32_arm -#define tcg_temp_free_i64 tcg_temp_free_i64_arm -#define tcg_temp_free_vec tcg_temp_free_vec_arm #define tcg_temp_free_internal tcg_temp_free_internal_arm #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_arm #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_arm #define tcg_temp_new_i32 tcg_temp_new_i32_arm #define tcg_temp_new_i64 tcg_temp_new_i64_arm #define tcg_temp_new_internal tcg_temp_new_internal_arm -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_arm -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_arm #define tcg_temp_new_vec tcg_temp_new_vec_arm #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_arm #define tdb_hash tdb_hash_arm diff --git a/qemu/armeb.h b/qemu/armeb.h index 7a6e098c..f3b64030 100644 --- a/qemu/armeb.h +++ b/qemu/armeb.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_armeb #define tcg_tb_alloc tcg_tb_alloc_armeb #define tcg_temp_alloc tcg_temp_alloc_armeb -#define tcg_temp_free_i32 tcg_temp_free_i32_armeb -#define tcg_temp_free_i64 tcg_temp_free_i64_armeb -#define tcg_temp_free_vec tcg_temp_free_vec_armeb #define tcg_temp_free_internal tcg_temp_free_internal_armeb #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_armeb #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_armeb #define tcg_temp_new_i32 tcg_temp_new_i32_armeb #define tcg_temp_new_i64 tcg_temp_new_i64_armeb #define tcg_temp_new_internal tcg_temp_new_internal_armeb -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_armeb -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_armeb #define tcg_temp_new_vec tcg_temp_new_vec_armeb #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_armeb #define tdb_hash tdb_hash_armeb diff --git a/qemu/header_gen.py b/qemu/header_gen.py index 744eccb3..97b4d932 100644 --- a/qemu/header_gen.py +++ b/qemu/header_gen.py @@ -2901,17 +2901,12 @@ symbols = ( 'tcg_target_reg_alloc_order', 'tcg_tb_alloc', 'tcg_temp_alloc', - 'tcg_temp_free_i32', - 'tcg_temp_free_i64', - 'tcg_temp_free_vec', 'tcg_temp_free_internal', 'tcg_temp_local_new_i32', 'tcg_temp_local_new_i64', 'tcg_temp_new_i32', 'tcg_temp_new_i64', 'tcg_temp_new_internal', - 'tcg_temp_new_internal_i32', - 'tcg_temp_new_internal_i64', 'tcg_temp_new_vec', 'tcg_temp_new_vec_matching', 'tdb_hash', diff --git a/qemu/m68k.h b/qemu/m68k.h index 25de61d1..8363f966 100644 --- a/qemu/m68k.h +++ b/qemu/m68k.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_m68k #define tcg_tb_alloc tcg_tb_alloc_m68k #define tcg_temp_alloc tcg_temp_alloc_m68k -#define tcg_temp_free_i32 tcg_temp_free_i32_m68k -#define tcg_temp_free_i64 tcg_temp_free_i64_m68k -#define tcg_temp_free_vec tcg_temp_free_vec_m68k #define tcg_temp_free_internal tcg_temp_free_internal_m68k #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_m68k #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_m68k #define tcg_temp_new_i32 tcg_temp_new_i32_m68k #define tcg_temp_new_i64 tcg_temp_new_i64_m68k #define tcg_temp_new_internal tcg_temp_new_internal_m68k -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_m68k -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_m68k #define tcg_temp_new_vec tcg_temp_new_vec_m68k #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_m68k #define tdb_hash tdb_hash_m68k diff --git a/qemu/mips.h b/qemu/mips.h index a943b309..1d368131 100644 --- a/qemu/mips.h +++ b/qemu/mips.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_mips #define tcg_tb_alloc tcg_tb_alloc_mips #define tcg_temp_alloc tcg_temp_alloc_mips -#define tcg_temp_free_i32 tcg_temp_free_i32_mips -#define tcg_temp_free_i64 tcg_temp_free_i64_mips -#define tcg_temp_free_vec tcg_temp_free_vec_mips #define tcg_temp_free_internal tcg_temp_free_internal_mips #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_mips #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_mips #define tcg_temp_new_i32 tcg_temp_new_i32_mips #define tcg_temp_new_i64 tcg_temp_new_i64_mips #define tcg_temp_new_internal tcg_temp_new_internal_mips -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_mips -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_mips #define tcg_temp_new_vec tcg_temp_new_vec_mips #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_mips #define tdb_hash tdb_hash_mips diff --git a/qemu/mips64.h b/qemu/mips64.h index 8ca8f55a..5a53b0d0 100644 --- a/qemu/mips64.h +++ b/qemu/mips64.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_mips64 #define tcg_tb_alloc tcg_tb_alloc_mips64 #define tcg_temp_alloc tcg_temp_alloc_mips64 -#define tcg_temp_free_i32 tcg_temp_free_i32_mips64 -#define tcg_temp_free_i64 tcg_temp_free_i64_mips64 -#define tcg_temp_free_vec tcg_temp_free_vec_mips64 #define tcg_temp_free_internal tcg_temp_free_internal_mips64 #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_mips64 #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_mips64 #define tcg_temp_new_i32 tcg_temp_new_i32_mips64 #define tcg_temp_new_i64 tcg_temp_new_i64_mips64 #define tcg_temp_new_internal tcg_temp_new_internal_mips64 -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_mips64 -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_mips64 #define tcg_temp_new_vec tcg_temp_new_vec_mips64 #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_mips64 #define tdb_hash tdb_hash_mips64 diff --git a/qemu/mips64el.h b/qemu/mips64el.h index f64ab3e8..e0547081 100644 --- a/qemu/mips64el.h +++ b/qemu/mips64el.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_mips64el #define tcg_tb_alloc tcg_tb_alloc_mips64el #define tcg_temp_alloc tcg_temp_alloc_mips64el -#define tcg_temp_free_i32 tcg_temp_free_i32_mips64el -#define tcg_temp_free_i64 tcg_temp_free_i64_mips64el -#define tcg_temp_free_vec tcg_temp_free_vec_mips64el #define tcg_temp_free_internal tcg_temp_free_internal_mips64el #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_mips64el #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_mips64el #define tcg_temp_new_i32 tcg_temp_new_i32_mips64el #define tcg_temp_new_i64 tcg_temp_new_i64_mips64el #define tcg_temp_new_internal tcg_temp_new_internal_mips64el -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_mips64el -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_mips64el #define tcg_temp_new_vec tcg_temp_new_vec_mips64el #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_mips64el #define tdb_hash tdb_hash_mips64el diff --git a/qemu/mipsel.h b/qemu/mipsel.h index b2b86e55..0b24b8d3 100644 --- a/qemu/mipsel.h +++ b/qemu/mipsel.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_mipsel #define tcg_tb_alloc tcg_tb_alloc_mipsel #define tcg_temp_alloc tcg_temp_alloc_mipsel -#define tcg_temp_free_i32 tcg_temp_free_i32_mipsel -#define tcg_temp_free_i64 tcg_temp_free_i64_mipsel -#define tcg_temp_free_vec tcg_temp_free_vec_mipsel #define tcg_temp_free_internal tcg_temp_free_internal_mipsel #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_mipsel #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_mipsel #define tcg_temp_new_i32 tcg_temp_new_i32_mipsel #define tcg_temp_new_i64 tcg_temp_new_i64_mipsel #define tcg_temp_new_internal tcg_temp_new_internal_mipsel -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_mipsel -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_mipsel #define tcg_temp_new_vec tcg_temp_new_vec_mipsel #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_mipsel #define tdb_hash tdb_hash_mipsel diff --git a/qemu/powerpc.h b/qemu/powerpc.h index 487bbb83..ff11ce00 100644 --- a/qemu/powerpc.h +++ b/qemu/powerpc.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_powerpc #define tcg_tb_alloc tcg_tb_alloc_powerpc #define tcg_temp_alloc tcg_temp_alloc_powerpc -#define tcg_temp_free_i32 tcg_temp_free_i32_powerpc -#define tcg_temp_free_i64 tcg_temp_free_i64_powerpc -#define tcg_temp_free_vec tcg_temp_free_vec_powerpc #define tcg_temp_free_internal tcg_temp_free_internal_powerpc #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_powerpc #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_powerpc #define tcg_temp_new_i32 tcg_temp_new_i32_powerpc #define tcg_temp_new_i64 tcg_temp_new_i64_powerpc #define tcg_temp_new_internal tcg_temp_new_internal_powerpc -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_powerpc -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_powerpc #define tcg_temp_new_vec tcg_temp_new_vec_powerpc #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_powerpc #define tdb_hash tdb_hash_powerpc diff --git a/qemu/sparc.h b/qemu/sparc.h index 25ca7e54..289f5077 100644 --- a/qemu/sparc.h +++ b/qemu/sparc.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_sparc #define tcg_tb_alloc tcg_tb_alloc_sparc #define tcg_temp_alloc tcg_temp_alloc_sparc -#define tcg_temp_free_i32 tcg_temp_free_i32_sparc -#define tcg_temp_free_i64 tcg_temp_free_i64_sparc -#define tcg_temp_free_vec tcg_temp_free_vec_sparc #define tcg_temp_free_internal tcg_temp_free_internal_sparc #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_sparc #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_sparc #define tcg_temp_new_i32 tcg_temp_new_i32_sparc #define tcg_temp_new_i64 tcg_temp_new_i64_sparc #define tcg_temp_new_internal tcg_temp_new_internal_sparc -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_sparc -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_sparc #define tcg_temp_new_vec tcg_temp_new_vec_sparc #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_sparc #define tdb_hash tdb_hash_sparc diff --git a/qemu/sparc64.h b/qemu/sparc64.h index 2bea55ae..e18d1140 100644 --- a/qemu/sparc64.h +++ b/qemu/sparc64.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_sparc64 #define tcg_tb_alloc tcg_tb_alloc_sparc64 #define tcg_temp_alloc tcg_temp_alloc_sparc64 -#define tcg_temp_free_i32 tcg_temp_free_i32_sparc64 -#define tcg_temp_free_i64 tcg_temp_free_i64_sparc64 -#define tcg_temp_free_vec tcg_temp_free_vec_sparc64 #define tcg_temp_free_internal tcg_temp_free_internal_sparc64 #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_sparc64 #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_sparc64 #define tcg_temp_new_i32 tcg_temp_new_i32_sparc64 #define tcg_temp_new_i64 tcg_temp_new_i64_sparc64 #define tcg_temp_new_internal tcg_temp_new_internal_sparc64 -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_sparc64 -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_sparc64 #define tcg_temp_new_vec tcg_temp_new_vec_sparc64 #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_sparc64 #define tdb_hash tdb_hash_sparc64 diff --git a/qemu/tcg/tcg-op.h b/qemu/tcg/tcg-op.h index 71841f79..f91f6f5e 100644 --- a/qemu/tcg/tcg-op.h +++ b/qemu/tcg/tcg-op.h @@ -1145,25 +1145,74 @@ void tcg_gen_stl_vec(TCGContext *, TCGv_vec r, TCGv_ptr base, TCGArg offset, TCG #endif #if UINTPTR_MAX == UINT32_MAX -# define tcg_gen_ld_ptr(S, R, A, O) \ - tcg_gen_ld_i32(S, TCGV_PTR_TO_NAT(R), (A), (O)) -# define tcg_gen_discard_ptr(A) \ - tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A)) -# define tcg_gen_add_ptr(S, R, A, B) \ - tcg_gen_add_i32(S, TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B)) -# define tcg_gen_addi_ptr(S, R, A, B) \ - tcg_gen_addi_i32(S, TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B)) -# define tcg_gen_ext_i32_ptr(S, R, A) \ - tcg_gen_mov_i32(S, TCGV_PTR_TO_NAT(R), (A)) +# define PTR i32 +# define NAT TCGv_i32 #else -# define tcg_gen_ld_ptr(S, R, A, O) \ - tcg_gen_ld_i64(S, TCGV_PTR_TO_NAT(R), (A), (O)) -# define tcg_gen_discard_ptr(A) \ - tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A)) -# define tcg_gen_add_ptr(S, R, A, B) \ - tcg_gen_add_i64(S, TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B)) -# define tcg_gen_addi_ptr(S, R, A, B) \ - tcg_gen_addi_i64(S, TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B)) -# define tcg_gen_ext_i32_ptr(S, R, A) \ - tcg_gen_ext_i32_i64(S, TCGV_PTR_TO_NAT(R), (A)) -#endif /* UINTPTR_MAX == UINT32_MAX */ +# define PTR i64 +# define NAT TCGv_i64 +#endif + +static inline void tcg_gen_ld_ptr(TCGContext *s, TCGv_ptr r, TCGv_ptr a, intptr_t o) +{ + glue(tcg_gen_ld_,PTR)(s, (NAT)r, a, o); +} + +static inline void tcg_gen_discard_ptr(TCGContext *s, TCGv_ptr a) +{ + glue(tcg_gen_discard_,PTR)(s, (NAT)a); +} + +static inline void tcg_gen_add_ptr(TCGContext *s, TCGv_ptr r, TCGv_ptr a, TCGv_ptr b) +{ + glue(tcg_gen_add_,PTR)(s, (NAT)r, (NAT)a, (NAT)b); +} + +static inline void tcg_gen_addi_ptr(TCGContext *s, TCGv_ptr r, TCGv_ptr a, intptr_t b) +{ + glue(tcg_gen_addi_,PTR)(s, (NAT)r, (NAT)a, b); +} + +static inline void tcg_gen_brcondi_ptr(TCGContext *s, TCGCond cond, TCGv_ptr a, + intptr_t b, TCGLabel *label) +{ + glue(tcg_gen_brcondi_,PTR)(s, cond, (NAT)a, b, label); +} + +static inline void tcg_gen_ext_i32_ptr(TCGContext *s, TCGv_ptr r, TCGv_i32 a) +{ +#if UINTPTR_MAX == UINT32_MAX + tcg_gen_mov_i32(s, (NAT)r, a); +#else + tcg_gen_ext_i32_i64(s, (NAT)r, a); +#endif +} + +static inline void tcg_gen_trunc_i64_ptr(TCGContext *s, TCGv_ptr r, TCGv_i64 a) +{ +#if UINTPTR_MAX == UINT32_MAX + tcg_gen_extrl_i64_i32(s, (NAT)r, a); +#else + tcg_gen_mov_i64(s, (NAT)r, a); +#endif +} + +static inline void tcg_gen_extu_ptr_i64(TCGContext *s, TCGv_i64 r, TCGv_ptr a) +{ +#if UINTPTR_MAX == UINT32_MAX + tcg_gen_extu_i32_i64(s, r, (NAT)a); +#else + tcg_gen_mov_i64(s, r, (NAT)a); +#endif +} + +static inline void tcg_gen_trunc_ptr_i32(TCGContext *s, TCGv_i32 r, TCGv_ptr a) +{ +#if UINTPTR_MAX == UINT32_MAX + tcg_gen_mov_i32(s, r, (NAT)a); +#else + tcg_gen_extrl_i64_i32(s, r, (NAT)a); +#endif +} + +#undef PTR +#undef NAT diff --git a/qemu/tcg/tcg.c b/qemu/tcg/tcg.c index 58779c56..1c432efe 100644 --- a/qemu/tcg/tcg.c +++ b/qemu/tcg/tcg.c @@ -640,7 +640,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base, return ts; } -static TCGTemp *tcg_temp_new_internal(TCGContext *s, TCGType type, int temp_local) +TCGTemp *tcg_temp_new_internal(TCGContext *s, TCGType type, bool temp_local) { TCGTemp *ts; int idx, k; @@ -684,18 +684,6 @@ static TCGTemp *tcg_temp_new_internal(TCGContext *s, TCGType type, int temp_loca return ts; } -TCGv_i32 tcg_temp_new_internal_i32(TCGContext *s, int temp_local) -{ - TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I32, temp_local); - return temp_tcgv_i32(s, t); -} - -TCGv_i64 tcg_temp_new_internal_i64(TCGContext *s, int temp_local) -{ - TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I64, temp_local); - return temp_tcgv_i64(s, t); -} - TCGv_vec tcg_temp_new_vec(TCGContext *s, TCGType type) { TCGTemp *t; @@ -731,7 +719,7 @@ TCGv_vec tcg_temp_new_vec_matching(TCGContext *s, TCGv_vec match) return temp_tcgv_vec(s, t); } -static void tcg_temp_free_internal(TCGContext *s, TCGTemp *ts) +void tcg_temp_free_internal(TCGContext *s, TCGTemp *ts) { int k, idx; @@ -751,21 +739,6 @@ static void tcg_temp_free_internal(TCGContext *s, TCGTemp *ts) set_bit(idx, s->free_temps[k].l); } -void tcg_temp_free_i32(TCGContext *s, TCGv_i32 arg) -{ - tcg_temp_free_internal(s, tcgv_i32_temp(s, arg)); -} - -void tcg_temp_free_i64(TCGContext *s, TCGv_i64 arg) -{ - tcg_temp_free_internal(s, tcgv_i64_temp(s, arg)); -} - -void tcg_temp_free_vec(TCGContext *s, TCGv_vec arg) -{ - tcg_temp_free_internal(s, tcgv_vec_temp(s, arg)); -} - TCGv_i32 tcg_const_i32(TCGContext *s, int32_t val) { TCGv_i32 t0; diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index 603ed76d..7444a6dd 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -1064,14 +1064,30 @@ TCGTemp *tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base, TCGv_i32 tcg_global_reg_new_i32(TCGContext *s, TCGReg reg, const char *name); TCGv_i64 tcg_global_reg_new_i64(TCGContext *s, TCGReg reg, const char *name); -TCGv_i32 tcg_temp_new_internal_i32(TCGContext *s, int temp_local); -TCGv_i64 tcg_temp_new_internal_i64(TCGContext *s, int temp_local); +TCGTemp *tcg_temp_new_internal(TCGContext *s, TCGType, bool); +void tcg_temp_free_internal(TCGContext *s, TCGTemp *); TCGv_vec tcg_temp_new_vec(TCGContext *s, TCGType type); TCGv_vec tcg_temp_new_vec_matching(TCGContext *s, TCGv_vec match); -void tcg_temp_free_i32(TCGContext *s, TCGv_i32 arg); -void tcg_temp_free_i64(TCGContext *s, TCGv_i64 arg); -void tcg_temp_free_vec(TCGContext *s, TCGv_vec arg); +static inline void tcg_temp_free_i32(TCGContext *s, TCGv_i32 arg) +{ + tcg_temp_free_internal(s, tcgv_i32_temp(s, arg)); +} + +static inline void tcg_temp_free_i64(TCGContext *s, TCGv_i64 arg) +{ + tcg_temp_free_internal(s, tcgv_i64_temp(s, arg)); +} + +static inline void tcg_temp_free_ptr(TCGContext *s, TCGv_ptr arg) +{ + tcg_temp_free_internal(s, tcgv_ptr_temp(s, arg)); +} + +static inline void tcg_temp_free_vec(TCGContext *s, TCGv_vec arg) +{ + tcg_temp_free_internal(s, tcgv_vec_temp(s, arg)); +} static inline TCGv_i32 tcg_global_mem_new_i32(TCGContext *s, TCGv_ptr reg, intptr_t offset, const char *name) @@ -1082,12 +1098,14 @@ static inline TCGv_i32 tcg_global_mem_new_i32(TCGContext *s, TCGv_ptr reg, static inline TCGv_i32 tcg_temp_new_i32(TCGContext *s) { - return tcg_temp_new_internal_i32(s, 0); + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I32, false); + return temp_tcgv_i32(s, t); } static inline TCGv_i32 tcg_temp_local_new_i32(TCGContext *s) { - return tcg_temp_new_internal_i32(s, 1); + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I32, true); + return temp_tcgv_i32(s, t); } static inline TCGv_i64 tcg_global_mem_new_i64(TCGContext *s, TCGv_ptr reg, @@ -1099,12 +1117,33 @@ static inline TCGv_i64 tcg_global_mem_new_i64(TCGContext *s, TCGv_ptr reg, static inline TCGv_i64 tcg_temp_new_i64(TCGContext *s) { - return tcg_temp_new_internal_i64(s, 0); + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I64, false); + return temp_tcgv_i64(s, t); } static inline TCGv_i64 tcg_temp_local_new_i64(TCGContext *s) { - return tcg_temp_new_internal_i64(s, 1); + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_I64, true); + return temp_tcgv_i64(s, t); +} + +static inline TCGv_ptr tcg_global_mem_new_ptr(TCGContext *s, TCGv_ptr reg, intptr_t offset, + const char *name) +{ + TCGTemp *t = tcg_global_mem_new_internal(s, TCG_TYPE_PTR, reg, offset, name); + return temp_tcgv_ptr(s, t); +} + +static inline TCGv_ptr tcg_temp_new_ptr(TCGContext* s) +{ + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_PTR, false); + return temp_tcgv_ptr(s, t); +} + +static inline TCGv_ptr tcg_temp_local_new_ptr(TCGContext *s) +{ + TCGTemp *t = tcg_temp_new_internal(s, TCG_TYPE_PTR, true); + return temp_tcgv_ptr(s, t); } // UNICORN: Added @@ -1122,30 +1161,6 @@ do {\ abort();\ } while (0) -#if UINTPTR_MAX == UINT32_MAX -static inline TCGv_ptr TCGV_NAT_TO_PTR(TCGv_i32 n) { return (TCGv_ptr)n; } -static inline TCGv_i32 TCGV_PTR_TO_NAT(TCGv_ptr n) { return (TCGv_i32)n; } - -#define tcg_const_ptr(t, V) TCGV_NAT_TO_PTR(tcg_const_i32(t, (intptr_t)(V))) -#define tcg_global_reg_new_ptr(U, R, N) \ - TCGV_NAT_TO_PTR(tcg_global_reg_new_i32(U, (R), (N))) -#define tcg_global_mem_new_ptr(t, R, O, N) \ - TCGV_NAT_TO_PTR(tcg_global_mem_new_i32(t, (R), (O), (N))) -#define tcg_temp_new_ptr(s) TCGV_NAT_TO_PTR(tcg_temp_new_i32(s)) -#define tcg_temp_free_ptr(s, T) tcg_temp_free_i32(s, TCGV_PTR_TO_NAT(T)) -#else -static inline TCGv_ptr TCGV_NAT_TO_PTR(TCGv_i64 n) { return (TCGv_ptr)n; } -static inline TCGv_i64 TCGV_PTR_TO_NAT(TCGv_ptr n) { return (TCGv_i64)n; } - -#define tcg_const_ptr(t, V) TCGV_NAT_TO_PTR(tcg_const_i64(t, (intptr_t)(V))) -#define tcg_global_reg_new_ptr(U, R, N) \ - TCGV_NAT_TO_PTR(tcg_global_reg_new_i64(U, (R), (N))) -#define tcg_global_mem_new_ptr(t, R, O, N) \ - TCGV_NAT_TO_PTR(tcg_global_mem_new_i64(t, (R), (O), (N))) -#define tcg_temp_new_ptr(s) TCGV_NAT_TO_PTR(tcg_temp_new_i64(s)) -#define tcg_temp_free_ptr(s, T) tcg_temp_free_i64(s, TCGV_PTR_TO_NAT(T)) -#endif - bool tcg_op_supported(TCGOpcode op); void tcg_gen_callN(TCGContext *s, void *func, TCGTemp *ret, int nargs, TCGTemp **args); @@ -1187,6 +1202,16 @@ TCGv_vec tcg_const_ones_vec(TCGContext *s, TCGType); TCGv_vec tcg_const_zeros_vec_matching(TCGContext *s, TCGv_vec); TCGv_vec tcg_const_ones_vec_matching(TCGContext *s, TCGv_vec); +#if UINTPTR_MAX == UINT32_MAX +# define tcg_const_ptr(t, x) ((TCGv_ptr)tcg_const_i32((t), (intptr_t)(x))) +# define tcg_const_local_ptr(t, x) ((TCGv_ptr)tcg_const_local_i32((t), (intptr_t)(x))) +# define tcg_global_reg_new_ptr(U, R, N) ((TCGv_ptr)tcg_global_reg_new_i32((U), (R), (N))) +#else +# define tcg_const_ptr(t, x) ((TCGv_ptr)tcg_const_i64((t), (intptr_t)(x))) +# define tcg_const_local_ptr(t, x) ((TCGv_ptr)tcg_const_local_i64((t), (intptr_t)(x))) +# define tcg_global_reg_new_ptr(U, R, N) ((TCGv_ptr)tcg_global_reg_new_i64((U), (R), (N))) +#endif + TCGLabel *gen_new_label(TCGContext* s); /** diff --git a/qemu/x86_64.h b/qemu/x86_64.h index 9461f5e4..af7ddeb9 100644 --- a/qemu/x86_64.h +++ b/qemu/x86_64.h @@ -2895,17 +2895,12 @@ #define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_x86_64 #define tcg_tb_alloc tcg_tb_alloc_x86_64 #define tcg_temp_alloc tcg_temp_alloc_x86_64 -#define tcg_temp_free_i32 tcg_temp_free_i32_x86_64 -#define tcg_temp_free_i64 tcg_temp_free_i64_x86_64 -#define tcg_temp_free_vec tcg_temp_free_vec_x86_64 #define tcg_temp_free_internal tcg_temp_free_internal_x86_64 #define tcg_temp_local_new_i32 tcg_temp_local_new_i32_x86_64 #define tcg_temp_local_new_i64 tcg_temp_local_new_i64_x86_64 #define tcg_temp_new_i32 tcg_temp_new_i32_x86_64 #define tcg_temp_new_i64 tcg_temp_new_i64_x86_64 #define tcg_temp_new_internal tcg_temp_new_internal_x86_64 -#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_x86_64 -#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_x86_64 #define tcg_temp_new_vec tcg_temp_new_vec_x86_64 #define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_x86_64 #define tdb_hash tdb_hash_x86_64