diff --git a/qemu/include/exec/gen-icount.h b/qemu/include/exec/gen-icount.h
index a34e5faa..eb83ecf6 100644
--- a/qemu/include/exec/gen-icount.h
+++ b/qemu/include/exec/gen-icount.h
@@ -6,7 +6,8 @@
 /* Helpers for instruction counting code generation.  */
 
 //static TCGArg *icount_arg;
-//static int icount_label;
+//static TCGLabel *icount_label;
+//static TCGLabel *exitreq_label;
 
 static inline void gen_tb_start(TCGContext *tcg_ctx)
 {
diff --git a/qemu/target-arm/translate-a64.c b/qemu/target-arm/translate-a64.c
index 9c456e96..6fefffce 100644
--- a/qemu/target-arm/translate-a64.c
+++ b/qemu/target-arm/translate-a64.c
@@ -1095,7 +1095,7 @@ static void disas_comp_b_imm(DisasContext *s, uint32_t insn)
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     unsigned int sf, op, rt;
     uint64_t addr;
-    int label_match;
+    TCGLabel *label_match;
     TCGv_i64 tcg_cmp;
 
     sf = extract32(insn, 31, 1);
@@ -1125,7 +1125,7 @@ static void disas_test_b_imm(DisasContext *s, uint32_t insn)
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     unsigned int bit_pos, op, rt;
     uint64_t addr;
-    int label_match;
+    TCGLabel *label_match;
     TCGv_i64 tcg_cmp;
 
     bit_pos = (extract32(insn, 31, 1) << 5) | extract32(insn, 19, 5);
@@ -1165,7 +1165,7 @@ static void disas_cond_b_imm(DisasContext *s, uint32_t insn)
 
     if (cond < 0x0e) {
         /* genuinely conditional branches */
-        int label_match = gen_new_label(tcg_ctx);
+        TCGLabel *label_match = gen_new_label(tcg_ctx);
         arm_gen_test_cc(tcg_ctx, cond, label_match);
         gen_goto_tb(s, 0, s->pc);
         gen_set_label(tcg_ctx, label_match);
@@ -1711,8 +1711,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
      * }
      * env->exclusive_addr = -1;
      */
-    int fail_label = gen_new_label(tcg_ctx);
-    int done_label = gen_new_label(tcg_ctx);
+    TCGLabel *fail_label = gen_new_label(tcg_ctx);
+    TCGLabel *done_label = gen_new_label(tcg_ctx);
     TCGv_i64 addr = tcg_temp_local_new_i64(tcg_ctx);
     TCGv_i64 tmp;
 
@@ -3546,7 +3546,7 @@ static void disas_cc(DisasContext *s, uint32_t insn)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     unsigned int sf, op, y, cond, rn, nzcv, is_imm;
-    int label_continue = -1;
+    TCGLabel *label_continue = NULL;
     TCGv_i64 tcg_tmp, tcg_y, tcg_rn;
 
     if (!extract32(insn, 29, 1)) {
@@ -3566,7 +3566,7 @@ static void disas_cc(DisasContext *s, uint32_t insn)
     nzcv = extract32(insn, 0, 4);
 
     if (cond < 0x0e) { /* not always */
-        int label_match = gen_new_label(tcg_ctx);
+        TCGLabel *label_match = gen_new_label(tcg_ctx);
         label_continue = gen_new_label(tcg_ctx);
         arm_gen_test_cc(tcg_ctx, cond, label_match);
         /* nomatch: */
@@ -3640,8 +3640,8 @@ static void disas_cond_select(DisasContext *s, uint32_t insn)
         /* OPTME: we could use movcond here, at the cost of duplicating
          * a lot of the arm_gen_test_cc() logic.
          */
-        int label_match = gen_new_label(tcg_ctx);
-        int label_continue = gen_new_label(tcg_ctx);
+        TCGLabel *label_match = gen_new_label(tcg_ctx);
+        TCGLabel *label_continue = gen_new_label(tcg_ctx);
 
         arm_gen_test_cc(tcg_ctx, cond, label_match);
         /* nomatch: */
@@ -4114,7 +4114,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     unsigned int mos, type, rm, cond, rn, op, nzcv;
     TCGv_i64 tcg_flags;
-    int label_continue = -1;
+    TCGLabel *label_continue = NULL;
 
     mos = extract32(insn, 29, 3);
     type = extract32(insn, 22, 2); /* 0 = single, 1 = double */
@@ -4134,7 +4134,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
     }
 
     if (cond < 0x0e) { /* not always */
-        int label_match = gen_new_label(tcg_ctx);
+        TCGLabel *label_match = gen_new_label(tcg_ctx);
         label_continue = gen_new_label(tcg_ctx);
         arm_gen_test_cc(tcg_ctx, cond, label_match);
         /* nomatch: */
@@ -4177,7 +4177,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     unsigned int mos, type, rm, cond, rn, rd;
-    int label_continue = -1;
+    TCGLabel *label_continue = NULL;
 
     mos = extract32(insn, 29, 3);
     type = extract32(insn, 22, 2); /* 0 = single, 1 = double */
@@ -4196,7 +4196,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn)
     }
 
     if (cond < 0x0e) { /* not always */
-        int label_match = gen_new_label(tcg_ctx);
+        TCGLabel *label_match = gen_new_label(tcg_ctx);
         label_continue = gen_new_label(tcg_ctx);
         arm_gen_test_cc(tcg_ctx, cond, label_match);
         /* nomatch: */
diff --git a/qemu/target-arm/translate.c b/qemu/target-arm/translate.c
index b07fc0a5..1f04649a 100644
--- a/qemu/target-arm/translate.c
+++ b/qemu/target-arm/translate.c
@@ -739,10 +739,10 @@ static void gen_thumb2_parallel_addsub(DisasContext *s, int op1, int op2, TCGv_i
  * generate a conditional branch based on ARM condition code cc.
  * This is common between ARM and Aarch64 targets.
  */
-void arm_gen_test_cc(TCGContext *tcg_ctx, int cc, int label)
+void arm_gen_test_cc(TCGContext *tcg_ctx, int cc, TCGLabel *label)
 {
     TCGv_i32 tmp;
-    int inv;
+    TCGLabel *inv;
 
     switch (cc) {
     case 0: /* eq: Z */
@@ -7543,8 +7543,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     TCGv_i32 tmp;
     TCGv_i64 val64, extaddr;
-    int done_label;
-    int fail_label;
+    TCGLabel *done_label;
+    TCGLabel *fail_label;
 
     /* if (env->exclusive_addr == addr && env->exclusive_val == [addr]) {
          [addr] = {Rt};
diff --git a/qemu/target-arm/translate.h b/qemu/target-arm/translate.h
index 44b160f1..e0c9ddf0 100644
--- a/qemu/target-arm/translate.h
+++ b/qemu/target-arm/translate.h
@@ -9,7 +9,7 @@ typedef struct DisasContext {
     /* Nonzero if this instruction has been conditionally skipped.  */
     int condjmp;
     /* The label that will be jumped to when the instruction is skipped.  */
-    int condlabel;
+    TCGLabel *condlabel;
     /* Thumb-2 conditional execution bits.  */
     int condexec_mask;
     int condexec_cond;
@@ -111,6 +111,6 @@ static inline void gen_a64_set_pc_im(uint64_t val)
 }
 #endif
 
-void arm_gen_test_cc(TCGContext *tcg_ctx, int cc, int label);
+void arm_gen_test_cc(TCGContext *tcg_ctx, int cc, TCGLabel *label);
 
 #endif /* TARGET_ARM_TRANSLATE_H */
diff --git a/qemu/target-i386/translate.c b/qemu/target-i386/translate.c
index 576356a8..51b08667 100644
--- a/qemu/target-i386/translate.c
+++ b/qemu/target-i386/translate.c
@@ -736,7 +736,7 @@ static void gen_exts(TCGContext *s, TCGMemOp ot, TCGv reg)
     gen_ext_tl(s, reg, reg, ot, true);
 }
 
-static inline void gen_op_jnz_ecx(TCGContext *s, TCGMemOp size, int label1)
+static inline void gen_op_jnz_ecx(TCGContext *s, TCGMemOp size, TCGLabel *label1)
 {
     TCGv cpu_tmp0 = *(TCGv *)s->cpu_tmp0;
     TCGv **cpu_regs = (TCGv **)s->cpu_regs;
@@ -746,7 +746,7 @@ static inline void gen_op_jnz_ecx(TCGContext *s, TCGMemOp size, int label1)
     tcg_gen_brcondi_tl(s, TCG_COND_NE, cpu_tmp0, 0, label1);
 }
 
-static inline void gen_op_jz_ecx(TCGContext *s, TCGMemOp size, int label1)
+static inline void gen_op_jz_ecx(TCGContext *s, TCGMemOp size, TCGLabel *label1)
 {
     TCGv cpu_tmp0 = *(TCGv *)s->cpu_tmp0;
     TCGv **cpu_regs = (TCGv **)s->cpu_regs;
@@ -1262,7 +1262,7 @@ static inline void gen_compute_eflags_c(DisasContext *s, TCGv reg)
 
 /* generate a conditional jump to label 'l1' according to jump opcode
    value 'b'. In the fast case, T0 is guaranted not to be used. */
-static inline void gen_jcc1_noeob(DisasContext *s, int b, int l1)
+static inline void gen_jcc1_noeob(DisasContext *s, int b, TCGLabel *l1)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     TCGv **cpu_T = (TCGv **)tcg_ctx->cpu_T;
@@ -1282,7 +1282,7 @@ static inline void gen_jcc1_noeob(DisasContext *s, int b, int l1)
 /* Generate a conditional jump to label 'l1' according to jump opcode
    value 'b'. In the fast case, T0 is guaranted not to be used.
    A translation block must end soon.  */
-static inline void gen_jcc1(DisasContext *s, int b, int l1)
+static inline void gen_jcc1(DisasContext *s, int b, TCGLabel *l1)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     TCGv **cpu_T = (TCGv **)tcg_ctx->cpu_T;
@@ -1303,13 +1303,12 @@ static inline void gen_jcc1(DisasContext *s, int b, int l1)
 
 /* XXX: does not work with gdbstub "ice" single step - not a
    serious problem */
-static int gen_jz_ecx_string(DisasContext *s, target_ulong next_eip)
+static TCGLabel *gen_jz_ecx_string(DisasContext *s, target_ulong next_eip)
 {
-    int l1, l2;
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
 
-    l1 = gen_new_label(tcg_ctx);
-    l2 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l2 = gen_new_label(tcg_ctx);
     gen_op_jnz_ecx(tcg_ctx, s->aflag, l1);
     gen_set_label(tcg_ctx, l2);
     gen_jmp_tb(s, next_eip, 1);
@@ -1419,7 +1418,7 @@ static inline void gen_outs(DisasContext *s, TCGMemOp ot)
 static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot,              \
                                  target_ulong cur_eip, target_ulong next_eip) \
 {                                                                             \
-    int l2;\
+    TCGLabel *l2;                                                             \
     gen_update_cc_op(s);                                                      \
     l2 = gen_jz_ecx_string(s, next_eip);                                      \
     gen_ ## op(s, ot);                                                        \
@@ -1437,7 +1436,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot,              \
                                    target_ulong next_eip,                     \
                                    int nz)                                    \
 {                                                                             \
-    int l2;\
+    TCGLabel *l2;                                                             \
     gen_update_cc_op(s);                                                      \
     l2 = gen_jz_ecx_string(s, next_eip);                                      \
     gen_ ## op(s, ot);                                                        \
@@ -2505,7 +2504,7 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip)
 static inline void gen_jcc(DisasContext *s, int b,
                            target_ulong val, target_ulong next_eip)
 {
-    int l1, l2;
+    TCGLabel *l1, *l2;
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
 
     if (s->jmp_opt) {
@@ -5787,7 +5786,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
     case 0x1b0:
     case 0x1b1: /* cmpxchg Ev, Gv */
         {
-            int label1, label2;
+            TCGLabel *label1, *label2;
             TCGv t0, t1, t2, a0;
 
             ot = mo_b_d(b, dflag);
@@ -6865,7 +6864,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             case 0x10: case 0x11: case 0x12: case 0x13: /* fcmovxx */
             case 0x18: case 0x19: case 0x1a: case 0x1b:
                 {
-                    int op1, l1;
+                    int op1;
+                    TCGLabel *l1;
                     static const uint8_t fcmov_cc[8] = {
                         (JCC_B << 1),
                         (JCC_Z << 1),
@@ -7662,7 +7662,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
     case 0xe2: /* loop */
     case 0xe3: /* jecxz */
         {
-            int l1, l2, l3;
+            TCGLabel *l1, *l2, *l3;
 
             tval = (int8_t)insn_get(env, s, MO_8);
             next_eip = s->pc - s->cs_base;
@@ -8147,7 +8147,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
         } else
 #endif
         {
-            int label1;
+            TCGLabel *label1;
             TCGv t0, t1, t2, a0;
 
             if (!s->pe || s->vm86)
@@ -8196,7 +8196,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
     case 0x102: /* lar */
     case 0x103: /* lsl */
         {
-            int label1;
+            TCGLabel *label1;
             TCGv t0;
             if (!s->pe || s->vm86)
                 goto illegal_op;
diff --git a/qemu/target-m68k/translate.c b/qemu/target-m68k/translate.c
index 35e80a64..d4c9ee3b 100644
--- a/qemu/target-m68k/translate.c
+++ b/qemu/target-m68k/translate.c
@@ -676,7 +676,7 @@ static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn,
 }
 
 /* This generates a conditional branch, clobbering all temporaries.  */
-static void gen_jmpcc(DisasContext *s, int cond, int l1)
+static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     TCGv tmp;
@@ -783,7 +783,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1)
 DISAS_INSN(scc)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
-    int l1;
+    TCGLabel *l1;
     int cond;
     TCGv reg;
 
@@ -1696,7 +1696,7 @@ DISAS_INSN(branch)
     int32_t offset;
     uint32_t base;
     int op;
-    int l1;
+    TCGLabel *l1;
 
     base = s->pc;
     op = (insn >> 8) & 0xf;
@@ -2454,7 +2454,7 @@ DISAS_INSN(fbcc)
     uint32_t offset;
     uint32_t addr;
     TCGv flag;
-    int l1;
+    TCGLabel *l1;
 
     addr = s->pc;
     offset = cpu_ldsw_code(env, s->pc);
diff --git a/qemu/target-mips/translate.c b/qemu/target-mips/translate.c
index cf381a3c..b331c234 100644
--- a/qemu/target-mips/translate.c
+++ b/qemu/target-mips/translate.c
@@ -2005,8 +2005,8 @@ static inline void op_st_##insn(DisasContext *s, TCGv arg1, TCGv arg2, int rt, D
 {                                                                            \
     TCGContext *tcg_ctx = s->uc->tcg_ctx; \
     TCGv t0 = tcg_temp_new(tcg_ctx);                                                \
-    int l1 = gen_new_label(tcg_ctx);                                                \
-    int l2 = gen_new_label(tcg_ctx);                                                \
+    TCGLabel *l1 = gen_new_label(tcg_ctx);                                                \
+    TCGLabel *l2 = gen_new_label(tcg_ctx);                                                \
                                                                              \
     tcg_gen_andi_tl(tcg_ctx, t0, arg2, almask);                                       \
     tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_EQ, t0, 0, l1);                              \
@@ -2436,7 +2436,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             tcg_gen_addi_tl(tcg_ctx, t0, t1, uimm);
@@ -2472,7 +2472,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             tcg_gen_addi_tl(tcg_ctx, t0, t1, uimm);
@@ -2710,7 +2710,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             gen_load_gpr(ctx, t2, rt);
@@ -2748,7 +2748,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             gen_load_gpr(ctx, t2, rt);
@@ -2788,7 +2788,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             gen_load_gpr(ctx, t2, rt);
@@ -2824,7 +2824,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv t1 = tcg_temp_new(tcg_ctx);
             TCGv t2 = tcg_temp_new(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t1, rs);
             gen_load_gpr(ctx, t2, rt);
@@ -3887,9 +3887,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DIV_G_2E:
     case OPC_DIV_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
-            int l3 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l3 = gen_new_label(tcg_ctx);
             tcg_gen_ext32s_tl(tcg_ctx, t0, t0);
             tcg_gen_ext32s_tl(tcg_ctx, t1, t1);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
@@ -3910,8 +3910,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DIVU_G_2E:
     case OPC_DIVU_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
             tcg_gen_ext32u_tl(tcg_ctx, t0, t0);
             tcg_gen_ext32u_tl(tcg_ctx, t1, t1);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
@@ -3927,9 +3927,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_MOD_G_2E:
     case OPC_MOD_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
-            int l3 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l3 = gen_new_label(tcg_ctx);
             tcg_gen_ext32u_tl(tcg_ctx, t0, t0);
             tcg_gen_ext32u_tl(tcg_ctx, t1, t1);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_EQ, t1, 0, l1);
@@ -3948,8 +3948,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_MODU_G_2E:
     case OPC_MODU_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
             tcg_gen_ext32u_tl(tcg_ctx, t0, t0);
             tcg_gen_ext32u_tl(tcg_ctx, t1, t1);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
@@ -3976,9 +3976,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DDIV_G_2E:
     case OPC_DDIV_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
-            int l3 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l3 = gen_new_label(tcg_ctx);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
             tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rd], 0);
             tcg_gen_br(tcg_ctx, l3);
@@ -3996,8 +3996,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DDIVU_G_2E:
     case OPC_DDIVU_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
             tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rd], 0);
             tcg_gen_br(tcg_ctx, l2);
@@ -4010,9 +4010,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DMOD_G_2E:
     case OPC_DMOD_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
-            int l3 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l3 = gen_new_label(tcg_ctx);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_EQ, t1, 0, l1);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t0, -1LL << 63, l2);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, -1LL, l2);
@@ -4028,8 +4028,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
     case OPC_DMODU_G_2E:
     case OPC_DMODU_G_2F:
         {
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
             tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, t1, 0, l1);
             tcg_gen_movi_tl(tcg_ctx, *cpu_gpr[rd], 0);
             tcg_gen_br(tcg_ctx, l2);
@@ -4246,7 +4246,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
     case OPC_DADD_CP2:
         {
             TCGv_i64 t2 = tcg_temp_new_i64(tcg_ctx);
-            int lab = gen_new_label(tcg_ctx);
+            TCGLabel *lab = gen_new_label(tcg_ctx);
 
             tcg_gen_mov_i64(tcg_ctx, t2, t0);
             tcg_gen_add_i64(tcg_ctx, t0, t1, t2);
@@ -4269,7 +4269,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
     case OPC_DSUB_CP2:
         {
             TCGv_i64 t2 = tcg_temp_new_i64(tcg_ctx);
-            int lab = gen_new_label(tcg_ctx);
+            TCGLabel *lab = gen_new_label(tcg_ctx);
 
             tcg_gen_mov_i64(tcg_ctx, t2, t0);
             tcg_gen_sub_i64(tcg_ctx, t0, t1, t2);
@@ -4381,7 +4381,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc,
             break;
         }
     } else {
-        int l1 = gen_new_label(tcg_ctx);
+        TCGLabel *l1 = gen_new_label(tcg_ctx);
 
         switch (opc) {
         case OPC_TEQ:
@@ -8489,7 +8489,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
 {
     TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
     TCGv **cpu_gpr = (TCGv **)tcg_ctx->cpu_gpr;
-    int l1;
+    TCGLabel *l1;
     TCGCond cond;
     TCGv_i32 t0;
 
@@ -8521,7 +8521,7 @@ static inline void gen_movcf_s (DisasContext *ctx, int fs, int fd, int cc, int t
     TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32(tcg_ctx);
-    int l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
 
     if (tf)
         cond = TCG_COND_EQ;
@@ -8542,7 +8542,7 @@ static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32(tcg_ctx);
     TCGv_i64 fp0;
-    int l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
 
     if (tf)
         cond = TCG_COND_EQ;
@@ -8565,8 +8565,8 @@ static inline void gen_movcf_ps(DisasContext *ctx, int fs, int fd,
     TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
     int cond;
     TCGv_i32 t0 = tcg_temp_new_i32(tcg_ctx);
-    int l1 = gen_new_label(tcg_ctx);
-    int l2 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l2 = gen_new_label(tcg_ctx);
 
     if (tf)
         cond = TCG_COND_EQ;
@@ -8935,7 +8935,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVZ_S:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i32 fp0;
 
             if (ft != 0) {
@@ -8952,7 +8952,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVN_S:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i32 fp0;
 
             if (ft != 0) {
@@ -9480,7 +9480,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVZ_D:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i64 fp0;
 
             if (ft != 0) {
@@ -9497,7 +9497,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVN_D:
         check_insn_opc_removed(ctx, ISA_MIPS32R6);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i64 fp0;
 
             if (ft != 0) {
@@ -9918,7 +9918,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVZ_PS:
         check_cp1_64bitmode(ctx);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i64 fp0;
 
             if (ft != 0)
@@ -9934,7 +9934,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
     case OPC_MOVN_PS:
         check_cp1_64bitmode(ctx);
         {
-            int l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
             TCGv_i64 fp0;
 
             if (ft != 0) {
@@ -10281,8 +10281,8 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc,
             TCGv t0 = tcg_temp_local_new(tcg_ctx);
             TCGv_i32 fp = tcg_temp_new_i32(tcg_ctx);
             TCGv_i32 fph = tcg_temp_new_i32(tcg_ctx);
-            int l1 = gen_new_label(tcg_ctx);
-            int l2 = gen_new_label(tcg_ctx);
+            TCGLabel *l1 = gen_new_label(tcg_ctx);
+            TCGLabel *l2 = gen_new_label(tcg_ctx);
 
             gen_load_gpr(ctx, t0, fr);
             tcg_gen_andi_tl(tcg_ctx, t0, t0, 0x7);
@@ -10633,7 +10633,7 @@ static void gen_branch(DisasContext *ctx, int insn_bytes)
             /* Conditional branch */
             MIPS_DEBUG("conditional branch");
             {
-                int l1 = gen_new_label(tcg_ctx);
+                TCGLabel *l1 = gen_new_label(tcg_ctx);
 
                 tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, *(TCGv *)tcg_ctx->bcond, 0, l1);
                 gen_goto_tb(ctx, 1, ctx->pc + insn_bytes);
@@ -16048,7 +16048,7 @@ static void gen_compute_compact_branch(DisasContext *ctx, uint32_t opc,
         gen_branch(ctx, 4);
     } else {
         /* Conditional compact branch */
-        int fs = gen_new_label(tcg_ctx);
+        TCGLabel *fs = gen_new_label(tcg_ctx);
         save_cpu_state(ctx, 0);
 
         switch (opc) {
@@ -18530,7 +18530,7 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pa
 
     /* Handle blikely not taken case */
     if ((ctx->hflags & MIPS_HFLAG_BMASK_BASE) == MIPS_HFLAG_BL) {
-        int l1 = gen_new_label(tcg_ctx);
+        TCGLabel *l1 = gen_new_label(tcg_ctx);
 
         MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4);
         tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_NE, *(TCGv *)tcg_ctx->bcond, 0, l1);
diff --git a/qemu/target-sparc/translate.c b/qemu/target-sparc/translate.c
index 2ec36fc6..b6ad8360 100644
--- a/qemu/target-sparc/translate.c
+++ b/qemu/target-sparc/translate.c
@@ -1012,9 +1012,7 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
                                target_ulong pc2, TCGv r_cond)
 {
     TCGContext *tcg_ctx = dc->uc->tcg_ctx;
-    int l1;
-
-    l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
 
     tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_EQ, r_cond, 0, l1);
 
@@ -1028,9 +1026,7 @@ static inline void gen_branch_a(DisasContext *dc, target_ulong pc1,
                                 target_ulong pc2, TCGv r_cond)
 {
     TCGContext *tcg_ctx = dc->uc->tcg_ctx;
-    int l1;
-
-    l1 = gen_new_label(tcg_ctx);
+    TCGLabel *l1 = gen_new_label(tcg_ctx);
 
     tcg_gen_brcondi_tl(tcg_ctx, TCG_COND_EQ, r_cond, 0, l1);
 
@@ -2752,7 +2748,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
             if (xop == 0x3a) {  /* generate trap */
                 int cond = GET_FIELD(insn, 3, 6);
                 TCGv_i32 trap;
-                int l1 = -1, mask;
+                TCGLabel *l1 = NULL;
+                int mask;
 
                 if (cond == 0) {
                     /* Trap never.  */
diff --git a/qemu/tcg/i386/tcg-target.c b/qemu/tcg/i386/tcg-target.c
index 7ffad8e9..bd03aa01 100644
--- a/qemu/tcg/i386/tcg-target.c
+++ b/qemu/tcg/i386/tcg-target.c
@@ -962,8 +962,8 @@ static void tcg_out_brcond64(TCGContext *s, TCGCond cond,
 static void tcg_out_brcond2(TCGContext *s, const TCGArg *args,
                             const int *const_args, int smallflag)
 {
-    int label_next;
-    label_next = gen_new_label(s);
+    int label_next = label_arg(s, gen_new_label(s));
+
     switch(args[4]) {
     case TCG_COND_EQ:
         tcg_out_brcond32(s, TCG_COND_NE, args[0], args[2], const_args[2],
@@ -1070,8 +1070,8 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args,
         || (!const_args[4] && args[0] == args[4])) {
         /* When the destination overlaps with one of the argument
            registers, don't do anything tricky.  */
-        label_true = gen_new_label(s);
-        label_over = gen_new_label(s);
+        label_true = label_arg(s, gen_new_label(s));
+        label_over = label_arg(s, gen_new_label(s));
 
         new_args[5] = label_true;
         tcg_out_brcond2(s, new_args, const_args+1, 1);
@@ -1089,7 +1089,7 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args,
 
         tcg_out_movi(s, TCG_TYPE_I32, args[0], 0);
 
-        label_over = gen_new_label(s);
+        label_over = label_arg(s, gen_new_label(s));
         new_args[4] = tcg_invert_cond(new_args[4]);
         new_args[5] = label_over;
         tcg_out_brcond2(s, new_args, const_args+1, 1);
@@ -1108,7 +1108,7 @@ static void tcg_out_movcond32(TCGContext *s, TCGCond cond, TCGArg dest,
     if (have_cmov) {
         tcg_out_modrm(s, OPC_CMOVCC | tcg_cond_to_jcc[cond], dest, v1);
     } else {
-        int over = gen_new_label(s);
+        int over = label_arg(s, gen_new_label(s));
         tcg_out_jxx(s, tcg_cond_to_jcc[tcg_invert_cond(cond)], over, 1);
         tcg_out_mov(s, TCG_TYPE_I32, dest, v1);
         tcg_out_label(s, over, s->code_ptr);
diff --git a/qemu/tcg/tcg-op.c b/qemu/tcg/tcg-op.c
index 9a31cd3b..22dc20de 100644
--- a/qemu/tcg/tcg-op.c
+++ b/qemu/tcg/tcg-op.c
@@ -276,19 +276,19 @@ void tcg_gen_sari_i32(TCGContext *s, TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2)
     }
 }
 
-void tcg_gen_brcond_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label)
+void tcg_gen_brcond_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *l)
 {
     if (cond == TCG_COND_ALWAYS) {
-        tcg_gen_br(s, label);
+        tcg_gen_br(s, l);
     } else if (cond != TCG_COND_NEVER) {
-        tcg_gen_op4ii_i32(s, INDEX_op_brcond_i32, arg1, arg2, cond, label);
+        tcg_gen_op4ii_i32(s, INDEX_op_brcond_i32, arg1, arg2, cond, label_arg(s, l));
     }
 }
 
-void tcg_gen_brcondi_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, int32_t arg2, int label)
+void tcg_gen_brcondi_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *l)
 {
     TCGv_i32 t0 = tcg_const_i32(s, arg2);
-    tcg_gen_brcond_i32(s, cond, arg1, t0, label);
+    tcg_gen_brcond_i32(s, cond, arg1, t0, l);
     tcg_temp_free_i32(s, t0);
 }
 
@@ -1085,28 +1085,29 @@ void tcg_gen_sari_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2)
     }
 }
 
-void tcg_gen_brcond_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, int label)
+void tcg_gen_brcond_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
 {
     if (cond == TCG_COND_ALWAYS) {
-        tcg_gen_br(s, label);
+        tcg_gen_br(s, l);
     } else if (cond != TCG_COND_NEVER) {
         if (TCG_TARGET_REG_BITS == 32) {
             tcg_gen_op6ii_i32(s, INDEX_op_brcond2_i32, TCGV_LOW(arg1),
                               TCGV_HIGH(arg1), TCGV_LOW(arg2),
-                              TCGV_HIGH(arg2), cond, label);
+                              TCGV_HIGH(arg2), cond, label_arg(s, l));
         } else {
-            tcg_gen_op4ii_i64(s, INDEX_op_brcond_i64, arg1, arg2, cond, label);
+            tcg_gen_op4ii_i64(s, INDEX_op_brcond_i64, arg1, arg2, cond,
+                              label_arg(s, l));
         }
     }
 }
 
-void tcg_gen_brcondi_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, int64_t arg2, int label)
+void tcg_gen_brcondi_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l)
 {
     if (cond == TCG_COND_ALWAYS) {
-        tcg_gen_br(s, label);
+        tcg_gen_br(s, l);
     } else if (cond != TCG_COND_NEVER) {
         TCGv_i64 t0 = tcg_const_i64(s, arg2);
-        tcg_gen_brcond_i64(s, cond, arg1, t0, label);
+        tcg_gen_brcond_i64(s, cond, arg1, t0, l);
         tcg_temp_free_i64(s, t0);
     }
 }
diff --git a/qemu/tcg/tcg-op.h b/qemu/tcg/tcg-op.h
index 3d49221b..3c94baed 100644
--- a/qemu/tcg/tcg-op.h
+++ b/qemu/tcg/tcg-op.h
@@ -259,16 +259,14 @@ static inline void tcg_gen_op6ii_i64(TCGContext *s, TCGOpcode opc, TCGv_i64 a1,
 
 /* Generic ops.  */
 
-int gen_new_label(TCGContext *s);
-
-static inline void gen_set_label(TCGContext *s, int n)
+static inline void gen_set_label(TCGContext *s, TCGLabel *l)
 {
-    tcg_gen_op1(s, INDEX_op_set_label, n);
+    tcg_gen_op1(s, INDEX_op_set_label, label_arg(s, l));
 }
 
-static inline void tcg_gen_br(TCGContext *s, int label)
+static inline void tcg_gen_br(TCGContext *s, TCGLabel *l)
 {
-    tcg_gen_op1(s, INDEX_op_br, label);
+    tcg_gen_op1(s, INDEX_op_br, label_arg(s, l));
 }
 
 /* Helper calls. */
@@ -300,8 +298,8 @@ void tcg_gen_rotr_i32(TCGContext *s, TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 void tcg_gen_rotri_i32(TCGContext *s, TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 void tcg_gen_deposit_i32(TCGContext *s, TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
                          unsigned int ofs, unsigned int len);
-void tcg_gen_brcond_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label);
-void tcg_gen_brcondi_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, int32_t arg2, int label);
+void tcg_gen_brcond_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *l);
+void tcg_gen_brcondi_i32(TCGContext *s, TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *l);
 void tcg_gen_setcond_i32(TCGContext *s, TCGCond cond, TCGv_i32 ret,
                          TCGv_i32 arg1, TCGv_i32 arg2);
 void tcg_gen_setcondi_i32(TCGContext *s, TCGCond cond, TCGv_i32 ret,
@@ -468,8 +466,8 @@ void tcg_gen_rotr_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 void tcg_gen_rotri_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 void tcg_gen_deposit_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
                          unsigned int ofs, unsigned int len);
-void tcg_gen_brcond_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, int label);
-void tcg_gen_brcondi_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, int64_t arg2, int label);
+void tcg_gen_brcond_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l);
+void tcg_gen_brcondi_i64(TCGContext *s, TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l);
 void tcg_gen_setcond_i64(TCGContext *s, TCGCond cond, TCGv_i64 ret,
                          TCGv_i64 arg1, TCGv_i64 arg2);
 void tcg_gen_setcondi_i64(TCGContext *s, TCGCond cond, TCGv_i64 ret,
diff --git a/qemu/tcg/tcg.c b/qemu/tcg/tcg.c
index 749a1296..165783b6 100644
--- a/qemu/tcg/tcg.c
+++ b/qemu/tcg/tcg.c
@@ -239,7 +239,7 @@ static void tcg_out_label(TCGContext *s, int label_index, tcg_insn_unit *ptr)
     l->u.value_ptr = ptr;
 }
 
-int gen_new_label(TCGContext *s)
+TCGLabel *gen_new_label(TCGContext *s)
 {
     int idx;
     TCGLabel *l;
@@ -250,7 +250,7 @@ int gen_new_label(TCGContext *s)
     l = &s->labels[idx];
     l->has_value = 0;
     l->u.first_reloc = NULL;
-    return idx;
+    return l;
 }
 
 #include "tcg-target.c"
diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h
index cb2126ab..b0fdd5b2 100644
--- a/qemu/tcg/tcg.h
+++ b/qemu/tcg/tcg.h
@@ -802,7 +802,7 @@ struct TCGContext {
     void *cpu_hintp, *cpu_htba, *cpu_hver, *cpu_ssr, *cpu_ver;
     void *cpu_wim;
 
-    int exitreq_label;  // gen_tb_start()
+    TCGLabel *exitreq_label;  // gen_tb_start()
 };
 
 /* The number of opcodes emitted so far.  */
@@ -892,6 +892,36 @@ TCGv_i64 tcg_const_i64(TCGContext *s, int64_t val);
 TCGv_i32 tcg_const_local_i32(TCGContext *s, int32_t val);
 TCGv_i64 tcg_const_local_i64(TCGContext *s, int64_t val);
 
+TCGLabel *gen_new_label(TCGContext* s);
+
+/**
+ * label_arg
+ * @l: label
+ *
+ * Encode a label for storage in the TCG opcode stream.
+ */
+
+static inline TCGArg label_arg(TCGContext *tcg_ctx, TCGLabel *l)
+{
+    ptrdiff_t idx = l - tcg_ctx->labels;
+    tcg_debug_assert(idx >= 0 && idx < tcg_ctx->nb_labels);
+    return idx;
+}
+
+/**
+ * arg_label
+ * @i: value
+ *
+ * The opposite of label_arg.  Retrieve a label from the
+ * encoding of the TCG opcode stream.
+ */
+
+static inline TCGLabel *arg_label(TCGContext *tcg_ctx, TCGArg idx)
+{
+    tcg_debug_assert(idx < tcg_ctx->nb_labels);
+    return &tcg_ctx->labels[idx];
+}
+
 /**
  * tcg_ptr_byte_diff
  * @a, @b: addresses to be differenced