From 2b4c03224b6c6626667c1e5912628413dc7de63e Mon Sep 17 00:00:00 2001
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Date: Thu, 15 Feb 2018 12:44:40 -0500
Subject: [PATCH] target-arm: Break out mpidr_read_val()
Break out mpidr_read_val() to allow future sharing of the
code that conditionally sets the M and U bits of MPIDR.
No functional changes.
Backports commit 06a7e6477c129ceaa72bd400cf281d44c456be43 from qemu
---
qemu/target-arm/helper.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c
index 2f56376d..77d494a9 100644
--- a/qemu/target-arm/helper.c
+++ b/qemu/target-arm/helper.c
@@ -2148,7 +2148,7 @@ static uint64_t midr_read(CPUARMState *env, const ARMCPRegInfo *ri)
return raw_read(env, ri);
}
-static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
+static uint64_t mpidr_read_val(CPUARMState *env)
{
ARMCPU *cpu = ARM_CPU(env->uc, arm_env_get_cpu(env));
uint64_t mpidr = cpu->mp_affinity;
@@ -2166,6 +2166,11 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
return mpidr;
}
+static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
+{
+ return mpidr_read_val(env);
+}
+
static const ARMCPRegInfo mpidr_cp_reginfo[] = {
{ "MPIDR", 0,0,0, 3,0,5, ARM_CP_STATE_BOTH,
ARM_CP_NO_RAW, PL1_R, 0, NULL, 0, 0, {0, 0},