From 2beea0db0dac9fd47b4268587214da4355369840 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 21 Feb 2018 01:39:15 -0500 Subject: [PATCH] tcg: Make cpu_ssr a TCGv --- qemu/target-sparc/translate.c | 7 +++---- qemu/tcg/tcg.h | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/qemu/target-sparc/translate.c b/qemu/target-sparc/translate.c index e83fecab..e1bbe0ab 100644 --- a/qemu/target-sparc/translate.c +++ b/qemu/target-sparc/translate.c @@ -3066,7 +3066,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; - tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, *(TCGv *)tcg_ctx->cpu_ssr); + tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_ssr); break; case 31: // ver tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, *(TCGv *)tcg_ctx->cpu_ver); @@ -4021,7 +4021,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; - tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_ssr, cpu_tmp0); + tcg_gen_mov_tl(tcg_ctx, tcg_ctx->cpu_ssr, cpu_tmp0); break; default: goto illegal_insn; @@ -5557,8 +5557,7 @@ void gen_intermediate_code_init(CPUSPARCState *env) tcg_ctx->cpu_hver = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, hver), "hver"); - tcg_ctx->cpu_ssr = g_malloc0(sizeof(TCGv)); - *(TCGv *)tcg_ctx->cpu_ssr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, + tcg_ctx->cpu_ssr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, ssr), "ssr"); tcg_ctx->cpu_ver = g_malloc0(sizeof(TCGv)); diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index 93adb7c1..ba0ef542 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -846,7 +846,7 @@ struct TCGContext { TCGv cpu_hintp; TCGv cpu_htba; TCGv cpu_hver; - void *cpu_ssr; + TCGv cpu_ssr; void *cpu_ver; void *cpu_wim;