From 2eaf79bfd39369ae9883b406b6426e94759953ad Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 19 Feb 2018 00:32:56 -0500 Subject: [PATCH] fpu: Replace int8 typedef with int8_t Replace the int8 softfloat-specific typedef with int8_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint8\b/int8_t/g' together with manual removal of the typedef definition, and manual undoing of various mis-hits. Backports commit 8f506c709adb7d3bed4ebefefe9487c156192a64 from qemu --- qemu/fpu/softfloat-macros.h | 26 ++++++++--------- qemu/fpu/softfloat-specialize.h | 2 +- qemu/fpu/softfloat.c | 50 ++++++++++++++++----------------- qemu/include/fpu/softfloat.h | 3 +- 4 files changed, 40 insertions(+), 41 deletions(-) diff --git a/qemu/fpu/softfloat-macros.h b/qemu/fpu/softfloat-macros.h index 313f53a2..ca217b4b 100644 --- a/qemu/fpu/softfloat-macros.h +++ b/qemu/fpu/softfloat-macros.h @@ -164,7 +164,7 @@ static inline void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -201,7 +201,7 @@ static inline void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -236,7 +236,7 @@ static inline void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -294,7 +294,7 @@ static inline void ) { uint64_t z0, z1, z2; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z2 = a2; @@ -371,7 +371,7 @@ static inline void ) { uint64_t z0, z1, z2; - int8 negCount; + int8_t negCount; z2 = a2<>27 ) & 15; @@ -669,7 +669,7 @@ static uint32_t estimateSqrt32(int_fast16_t aExp, uint32_t a) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( uint32_t a ) +static int8_t countLeadingZeros32( uint32_t a ) { #if SOFTFLOAT_GNUC_PREREQ(3, 4) if (a) { @@ -678,7 +678,7 @@ static int8 countLeadingZeros32( uint32_t a ) return 32; } #else - static const int8 countLeadingZerosHigh[] = { + static const int8_t countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -696,7 +696,7 @@ static int8 countLeadingZeros32( uint32_t a ) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < 0x10000 ) { @@ -717,7 +717,7 @@ static int8 countLeadingZeros32( uint32_t a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( uint64_t a ) +static int8_t countLeadingZeros64( uint64_t a ) { #if SOFTFLOAT_GNUC_PREREQ(3, 4) if (a) { @@ -726,7 +726,7 @@ static int8 countLeadingZeros64( uint64_t a ) return 64; } #else - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < ( (uint64_t) 1 )<<32 ) { diff --git a/qemu/fpu/softfloat-specialize.h b/qemu/fpu/softfloat-specialize.h index 04ba31b2..e22adee5 100644 --- a/qemu/fpu/softfloat-specialize.h +++ b/qemu/fpu/softfloat-specialize.h @@ -170,7 +170,7 @@ const float128 float128_default_nan | should be simply `float_exception_flags |= flags;'. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags, float_status *status) +void float_raise( int8_t flags, float_status *status) { status->float_exception_flags |= flags; } diff --git a/qemu/fpu/softfloat.c b/qemu/fpu/softfloat.c index ae370f08..baaf9cd8 100644 --- a/qemu/fpu/softfloat.c +++ b/qemu/fpu/softfloat.c @@ -146,9 +146,9 @@ static inline flag extractFloat16Sign(float16 a) static int32_t roundAndPackInt32( flag zSign, uint64_t absZ, float_status *status) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; + int8_t roundIncrement, roundBits; int32_t z; roundingMode = status->float_rounding_mode; @@ -198,7 +198,7 @@ static int32_t roundAndPackInt32( flag zSign, uint64_t absZ, float_status *statu static int64_t roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment; int64_t z; @@ -253,7 +253,7 @@ static int64_t roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1, fl static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment; roundingMode = status->float_rounding_mode; @@ -353,7 +353,7 @@ float32 float32_squash_input_denormal(float32 a, float_status *status) static void normalizeFloat32Subnormal(uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( aSig ) - 8; *zSigPtr = aSig<float_rounding_mode; @@ -475,7 +475,7 @@ static float32 roundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig, static float32 normalizeRoundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig, float_status *status) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( zSig ) - 1; return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<float_rounding_mode; @@ -1220,7 +1220,7 @@ static float128 normalizeRoundAndPackFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { - int8 shiftCount; + int8_t shiftCount; uint64_t zSig2; if ( zSig0 == 0 ) { @@ -1269,7 +1269,7 @@ float64 int32_to_float64(int32_t a, float_status *status) { flag zSign; uint32_t absA; - int8 shiftCount; + int8_t shiftCount; uint64_t zSig; if ( a == 0 ) return float64_zero; @@ -1292,7 +1292,7 @@ floatx80 int32_to_floatx80(int32_t a, float_status *status) { flag zSign; uint32_t absA; - int8 shiftCount; + int8_t shiftCount; uint64_t zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); @@ -1314,7 +1314,7 @@ float128 int32_to_float128(int32_t a, float_status *status) { flag zSign; uint32_t absA; - int8 shiftCount; + int8_t shiftCount; uint64_t zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1336,7 +1336,7 @@ float32 int64_to_float32(int64_t a, float_status *status) { flag zSign; uint64_t absA; - int8 shiftCount; + int8_t shiftCount; if ( a == 0 ) return float32_zero; zSign = ( a < 0 ); @@ -1388,7 +1388,7 @@ floatx80 int64_to_floatx80(int64_t a, float_status *status) { flag zSign; uint64_t absA; - int8 shiftCount; + int8_t shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1408,7 +1408,7 @@ float128 int64_to_float128(int64_t a, float_status *status) { flag zSign; uint64_t absA; - int8 shiftCount; + int8_t shiftCount; int32_t zExp; uint64_t zSig0, zSig1; diff --git a/qemu/include/fpu/softfloat.h b/qemu/include/fpu/softfloat.h index cd54af16..eea9367e 100644 --- a/qemu/include/fpu/softfloat.h +++ b/qemu/include/fpu/softfloat.h @@ -100,7 +100,6 @@ this code that are retained. *----------------------------------------------------------------------------*/ typedef uint8_t flag; typedef uint8_t uint8; -typedef int8_t int8; #define LIT64( a ) a##LL @@ -282,7 +281,7 @@ static inline flag get_default_nan_mode(float_status *status) | Routine to raise any or all of the software IEC/IEEE floating-point | exception flags. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags, float_status *status); +void float_raise( int8_t flags, float_status *status); /*---------------------------------------------------------------------------- | If `a' is denormal and we are in flush-to-zero mode then set the