commit 344d0161048147e48297a0e5a011bde3ad23f951 Author: Nguyen Anh Quynh Date: Fri Aug 21 15:04:50 2015 +0800 import diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..271960ff --- /dev/null +++ b/.gitignore @@ -0,0 +1,81 @@ +.DS_Store +*.swp +*.d +*.o +*.a + +qemu/config-all-devices.mak + +i386-softmmu/ +arm-softmmu/ +aarch64-softmmu/ +mips-softmmu/ +mips64-softmmu/ +mipsel-softmmu/ +mips64el-softmmu/ +sparc-softmmu/ +sparc64-softmmu/ +m68k-softmmu/ + +qapi-types.h +qapi-visit.h +x86_64-softmmu/ +tags +qemu/config-host.ld +qemu/config.log +qemu/config.status +qemu/config-host.h +qemu/config-host.h-timestamp +qemu/config-host.mak +qemu/qapi-types.c +qemu/qapi-visit.c + +sample_x86 +sample_x86.exe +sample_x86.static +sample_arm +sample_arm.exe +sample_arm.static +sample_arm64 +sample_arm64.exe +sample_arm64.static +sample_mips +sample_mips.exe +sample_mips.static +sample_sparc +sample_sparc.exe +sample_sparc.static +shellcode +shellcode.exe +shellcode.static +sample_m68k +sample_m68k.exe +sample_m68k.static + +libunicorn*.dll +libunicorn*.so +libunicorn*.dylib + +unicorn.pc + +unicorn.lib +unicorn.dll +unicorn_*.lib +unicorn_*.dll + + +docs/paper/*.dvi +docs/paper/*.ps +docs/paper/*.pdf +docs/paper/*.htm +docs/paper/*.log + +*.tgz +*.zip +*.pyc +_*.txt +_*.diff +tmp/ + +bindings/python/build/ +config.log diff --git a/AUTHORS.TXT b/AUTHORS.TXT new file mode 100644 index 00000000..5d4ea772 --- /dev/null +++ b/AUTHORS.TXT @@ -0,0 +1,2 @@ +Nguyen Anh Quynh +Dang Hoang Vu diff --git a/COMPILE.TXT b/COMPILE.TXT new file mode 100644 index 00000000..6e646547 --- /dev/null +++ b/COMPILE.TXT @@ -0,0 +1,218 @@ +This documentation explains how to compile, install & run Unicorn on MacOSX, +Linux, *BSD & Solaris. We also show steps to cross-compile for Microsoft Windows. + + *-*-*-*-*-* + +[0] Dependencies + +Unicorn requires few dependent packages as followings + +- For Mac OS X, "pkg-config" is needed. + Brew users can install "pkg-config" with: + + $ brew install pkg-config + +- For Linux, glib2-dev is needed. + Ubuntu/Debian users can install this with: + + $ sudo apt-get install libglib2.0-dev + +- For Windows, cross-compile using Mingw. Mingw-glib2 is needed. + + On Ubuntu 14.04 64-bit, do: + + 1. Download DEB packages for Mingw64 from https://launchpad.net/~greg-hellings/+archive/ubuntu/mingw-libs/+build/2924251 + + 2. To cross-compile for Windows 32-bit, install Mingw with (ignore all the warnings): + + $ sudo dpkg -i --force-depends mingw64-x86-glib2_2.31.0_all.deb + + To cross-compile for Windows 64-bit, install Mingw with: + + $ sudo dpkg -i --force-depends mingw64-x64-glib2_2.31.0_all.deb + + + +[1] Tailor Unicorn to your need. + + Out of 8 archtitectures supported by Unicorn (Arm, Arm64, Mips, PPC, Sparc, + SystemZ, XCore & X86), if you just need several selected archs, choose which + ones you want to compile in by editing "config.mk" before going to next steps. + + By default, all 8 architectures are compiled. + + The other way of customize Unicorn without having to edit config.mk is to + pass the desired options on the commandline to ./make.sh. Currently, + Unicorn supports 3 options, as followings. + + - UNICORN_ARCHS: specify list of architectures to compiled in. + - UNICORN_STATIC: build static library. + - UNICORN_SHARED: build dynamic (shared) library. + + To avoid editing config.mk for these customization, we can pass their values to + make.sh, as followings. + + $ UNICORN_ARCHS="arm aarch64 x86" ./make.sh + + NOTE: on commandline, put these values in front of ./make.sh, not after it. + + For each option, refer to docs/README for more details. + + + +[2] Compile from source + + On *nix (such as MacOSX, Linux, *BSD, Solaris): + + - To compile for current platform, run: + + $ ./make.sh + + - On 64-bit OS, run the command below to cross-compile Unicorn for 32-bit binary: + + $ ./make.sh nix32 + + + +[3] Install Unicorn on *nix (such as MacOSX, Linux, *BSD, Solaris) + + To install Unicorn, run: + + $ sudo ./make.sh install + + For FreeBSD/OpenBSD, where sudo is unavailable, run: + + $ su; ./make.sh install + + Users are then required to enter root password to copy Unicorn into machine + system directories. + + Afterwards, run ./tests/test* to see the tests disassembling sample code. + + + NOTE: The core framework installed by "./make.sh install" consist of + following files: + + /usr/include/unicorn/unicorn.h + /usr/include/unicorn/x86.h + /usr/include/unicorn/arm.h + /usr/include/unicorn/arm64.h + /usr/include/unicorn/mips.h + /usr/include/unicorn/ppc.h + /usr/include/unicorn/sparc.h + /usr/include/unicorn/m68k.h + /usr/include/unicorn/platform.h + /usr/lib/libunicorn.so (for Linux/*nix), or /usr/lib/libunicorn.dylib (OSX) + /usr/lib/libunicorn.a + + + +[4] Cross-compile for Windows from *nix + + To cross-compile for Windows, Linux & gcc-mingw-w64-i686 (and also gcc-mingw-w64-x86-64 + for 64-bit binaries) are required. + + - To cross-compile Windows 32-bit binary, simply run: + + $ ./make.sh cross-win32 + + - To cross-compile Windows 64-bit binary, run: + + $ ./make.sh cross-win64 + + Resulted files libunicorn.dll, libunicorn.dll.a & tests/test*.exe can then + be used on Windows machine. + + To run sample_x86.exe on Windows 32-bit, you need the following files: + + - unicorn.dll + - /usr/i686-w64-mingw32/sys-root/mingw/bin/libglib-2.0-0.dll + - /usr/lib/gcc/i686-w64-mingw32/4.8/libgcc_s_sjlj-1.dll + - /usr/i686-w64-mingw32/lib/libwinpthread-1.dll + + To run sample_x86.exe on Windows 64-bit, you need the following files: + - unicorn.dll + - /usr/x86_64-w64-mingw32/sys-root/mingw/bin/libglib-2.0-0.dll + - /usr/lib/gcc/x86_64-w64-mingw32/4.8/libgcc_s_sjlj-1.dll + - /usr/x86_64-w64-mingw32/lib/libwinpthread-1.dll + + Then run either "sample_x86.exe -32" or "sample_x86.exe -64" to test emulators for X86 32-bit or X86 64-bit. + For other architectures, run "sample_xxx.exe" found in the same directory. + + + +[5] Cross-compile for iOS from Mac OSX. + + To cross-compile for iOS (iPhone/iPad/iPod), Mac OSX with XCode installed is required. + + - To cross-compile for ArmV7 (iPod 4, iPad 1/2/3, iPhone4, iPhone4S), run: + $ ./make.sh ios_armv7 + + - To cross-compile for ArmV7s (iPad 4, iPhone 5C, iPad mini), run: + $ ./make.sh ios_armv7s + + - To cross-compile for Arm64 (iPhone 5S, iPad mini Retina, iPad Air), run: + $ ./make.sh ios_arm64 + + - To cross-compile for all iDevices (armv7 + armv7s + arm64), run: + $ ./make.sh ios + + Resulted files libunicorn.dylib, libunicorn.a & tests/test* can then + be used on iOS devices. + + + +[6] Cross-compile for Android + + To cross-compile for Android (smartphone/tablet), Android NDK is required. + NOTE: Only ARM and ARM64 are currently supported. + + $ NDK=/android/android-ndk-r10e ./make.sh cross-android arm + or + $ NDK=/android/android-ndk-r10e ./make.sh cross-android arm64 + + Resulted files libunicorn.so, libunicorn.a & tests/test* can then + be used on Android devices. + + + +[7] Compile on Windows with Cygwin + + To compile under Cygwin gcc-mingw-w64-i686 or x86_64-w64-mingw32 run: + + - To compile Windows 32-bit binary under Cygwin, run: + + $ ./make.sh cygwin-mingw32 + + - To compile Windows 64-bit binary under Cygwin, run: + + $ ./make.sh cygwin-mingw64 + + Resulted files libunicorn.dll, libunicorn.dll.a & tests/test*.exe can then + be used on Windows machine. + + + +[8] By default, "cc" (default C compiler on the system) is used as compiler. + + - To use "clang" compiler instead, run the command below: + + $ ./make.sh clang + + - To use "gcc" compiler instead, run: + + $ ./make.sh gcc + + + +[9] To uninstall Unicorn, run the command below: + + $ sudo ./make.sh uninstall + + + +[10] Language bindings + + So far, only Python is supported by bindings in the main code. + Look for the bindings under directory bindings/, and refer to README file + of corresponding languages. diff --git a/COPYING b/COPYING new file mode 100644 index 00000000..00ccfbb6 --- /dev/null +++ b/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/CREDITS.TXT b/CREDITS.TXT new file mode 100644 index 00000000..203fdcbb --- /dev/null +++ b/CREDITS.TXT @@ -0,0 +1,42 @@ +This file credits all the contributors of the Unicorn engine project. + + +Key developers +============== +Nguyen Anh Quynh +Dang Hoang Vu + + +Beta testers (in no particular order) +============================== +Nguyen Tan Cong +Loi Anh Tuan +Edgar Barbosa +Joxean Koret +Chris Eagle +Jay Little, Trail of Bits +Jeong Wook Oh +Luis Miras +Yan Shoshitaishvili, Shellphish & UC Santa Barbara +Erik Fischer +Darel Griffin, NCC Group +Anton Cherepanov +Mohamed Saher (halsten) +Tyler Colgan +Jonathon Reinhart, jonathon.reinhart at gmail.com +Blue Skeye +Chris Maixner +Pancake "radare" +Ryan Hileman +Tim "diff" Strazzere +WanderingGlitch of the Zero Day Initiative +Sascha Schirra +François Serman + + +Contributors (in no particular order) +===================================== +(Please let us know if you want to have your name here) + +Nguyen Tan Cong +Loi Anh Tuan diff --git a/LEAK_VALGRIND b/LEAK_VALGRIND new file mode 100644 index 00000000..f734affe --- /dev/null +++ b/LEAK_VALGRIND @@ -0,0 +1,237 @@ +==25446== Memcheck, a memory error detector +==25446== Copyright (C) 2002-2013, and GNU GPL'd, by Julian Seward et al. +==25446== Using Valgrind-3.10.1 and LibVEX; rerun with -h for copyright info +==25446== Command: ./samples/sample_x86.static -32 +==25446== +==25446== Warning: set address range perms: large range [0xe30000, 0x14e30000) (defined) +==25446== Conditional jump or move depends on uninitialised value(s) +==25446== at 0x4379C1: tcg_target_init_x86_64 (tcg-target.c:2280) +==25446== by 0x437F8F: tcg_context_init_x86_64 (tcg.c:372) +==25446== by 0x4481A8: cpu_gen_init_x86_64 (translate-all.c:132) +==25446== by 0x448953: tcg_exec_init_x86_64 (translate-all.c:709) +==25446== by 0x40D390: tcg_init (accel.c:44) +==25446== by 0x40D5E5: accel_init_machine (accel.c:114) +==25446== by 0x40D3D5: configure_accelerator (accel.c:71) +==25446== by 0x40D8B6: machine_initialize (vl.c:128) +==25446== by 0x404F95: uc_open (uc.c:245) +==25446== by 0x403637: test_i386 (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== by 0x404A90: main (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== +==25446== Conditional jump or move depends on uninitialised value(s) +==25446== at 0x4379F3: tcg_target_init_x86_64 (tcg-target.c:2295) +==25446== by 0x437F8F: tcg_context_init_x86_64 (tcg.c:372) +==25446== by 0x4481A8: cpu_gen_init_x86_64 (translate-all.c:132) +==25446== by 0x448953: tcg_exec_init_x86_64 (translate-all.c:709) +==25446== by 0x40D390: tcg_init (accel.c:44) +==25446== by 0x40D5E5: accel_init_machine (accel.c:114) +==25446== by 0x40D3D5: configure_accelerator (accel.c:71) +==25446== by 0x40D8B6: machine_initialize (vl.c:128) +==25446== by 0x404F95: uc_open (uc.c:245) +==25446== by 0x403637: test_i386 (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== by 0x404A90: main (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== +==25446== Thread 2: +==25446== Conditional jump or move depends on uninitialised value(s) +==25446== at 0x4849B2: disas_insn (translate.c:4748) +==25446== by 0x492DC2: gen_intermediate_code_internal_x86_64 (translate.c:8382) +==25446== by 0x492FF7: gen_intermediate_code_x86_64 (translate.c:8429) +==25446== by 0x448288: cpu_x86_gen_code (translate-all.c:175) +==25446== by 0x4494F2: tb_gen_code_x86_64 (translate-all.c:1087) +==25446== by 0x43310D: tb_find_slow_x86_64 (cpu-exec.c:356) +==25446== by 0x433290: tb_find_fast_x86_64 (cpu-exec.c:384) +==25446== by 0x432C68: cpu_x86_exec (cpu-exec.c:203) +==25446== by 0x40C49A: tcg_cpu_exec_x86_64 (cpus.c:178) +==25446== by 0x40C515: tcg_exec_all_x86_64 (cpus.c:199) +==25446== by 0x40C2F5: qemu_tcg_cpu_thread_fn_x86_64 (cpus.c:132) +==25446== by 0x15C6D353: start_thread (in /usr/lib/libpthread-2.21.so) +==25446== +==25446== +==25446== HEAP SUMMARY: +==25446== in use at exit: 8,062 bytes in 156 blocks +==25446== total heap usage: 583 allocs, 427 frees, 32,993,443 bytes allocated +==25446== +==25446== Thread 1: +==25446== 7 bytes in 1 blocks are definitely lost in loss record 50 of 150 +==25446== at 0x15A59F90: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D6559: g_malloc (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x161EEDFE: g_strdup (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x445132: memory_region_init_x86_64 (memory.c:898) +==25446== by 0x445BEC: memory_region_init_ram_x86_64 (memory.c:1152) +==25446== by 0x4422A3: memory_map_x86_64 (memory.c:36) +==25446== by 0x4057C1: uc_mem_map (uc.c:552) +==25446== by 0x40366F: test_i386 (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== by 0x404A90: main (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== +==25446== 8 bytes in 1 blocks are definitely lost in loss record 52 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40C362: qemu_tcg_init_vcpu_x86_64 (cpus.c:155) +==25446== by 0x40C223: qemu_init_vcpu_x86_64 (cpus.c:95) +==25446== by 0x456C07: x86_cpu_realizefn (cpu.c:2292) +==25446== by 0x4129EF: device_set_realized (qdev.c:184) +==25446== by 0x411AAD: property_set_bool (object.c:1504) +==25446== by 0x410234: object_property_set (object.c:829) +==25446== by 0x4122BB: object_property_set_qobject (qom-qobject.c:24) +==25446== by 0x4104E4: object_property_set_bool (object.c:897) +==25446== by 0x45072A: pc_new_cpu (pc.c:105) +==25446== by 0x4507E3: pc_cpus_init (pc.c:130) +==25446== +==25446== 48 bytes in 1 blocks are definitely lost in loss record 102 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40C377: qemu_tcg_init_vcpu_x86_64 (cpus.c:156) +==25446== by 0x40C223: qemu_init_vcpu_x86_64 (cpus.c:95) +==25446== by 0x456C07: x86_cpu_realizefn (cpu.c:2292) +==25446== by 0x4129EF: device_set_realized (qdev.c:184) +==25446== by 0x411AAD: property_set_bool (object.c:1504) +==25446== by 0x410234: object_property_set (object.c:829) +==25446== by 0x4122BB: object_property_set_qobject (qom-qobject.c:24) +==25446== by 0x4104E4: object_property_set_bool (object.c:897) +==25446== by 0x45072A: pc_new_cpu (pc.c:105) +==25446== by 0x4507E3: pc_cpus_init (pc.c:130) +==25446== +==25446== 144 bytes in 1 blocks are definitely lost in loss record 139 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x44BBB7: tcg_cpu_address_space_init_x86_64 (exec.c:403) +==25446== by 0x40C347: qemu_tcg_init_vcpu_x86_64 (cpus.c:150) +==25446== by 0x40C223: qemu_init_vcpu_x86_64 (cpus.c:95) +==25446== by 0x456C07: x86_cpu_realizefn (cpu.c:2292) +==25446== by 0x4129EF: device_set_realized (qdev.c:184) +==25446== by 0x411AAD: property_set_bool (object.c:1504) +==25446== by 0x410234: object_property_set (object.c:829) +==25446== by 0x4122BB: object_property_set_qobject (qom-qobject.c:24) +==25446== by 0x4104E4: object_property_set_bool (object.c:897) +==25446== by 0x45072A: pc_new_cpu (pc.c:105) +==25446== +==25446== 320 bytes in 1 blocks are definitely lost in loss record 140 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x44D669: qemu_ram_alloc_from_ptr_x86_64 (exec.c:1092) +==25446== by 0x44D752: qemu_ram_alloc_x86_64 (exec.c:1111) +==25446== by 0x445C28: memory_region_init_ram_x86_64 (memory.c:1156) +==25446== by 0x4422A3: memory_map_x86_64 (memory.c:36) +==25446== by 0x4057C1: uc_mem_map (uc.c:552) +==25446== by 0x40366F: test_i386 (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== by 0x404A90: main (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== +==25446== 360 (96 direct, 264 indirect) bytes in 1 blocks are definitely lost in loss record 141 of 150 +==25446== at 0x15A59F90: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D6559: g_malloc (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40F68E: object_new_with_type (object.c:425) +==25446== by 0x40F6FD: object_new (object.c:436) +==25446== by 0x40D851: machine_initialize (vl.c:119) +==25446== by 0x404F95: uc_open (uc.c:245) +==25446== by 0x403637: test_i386 (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== by 0x404A90: main (in /home/w00d/Workspace/unicorn/samples/sample_x86.static) +==25446== +==25446== 601 (80 direct, 521 indirect) bytes in 1 blocks are definitely lost in loss record 142 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F6AE: object_new_with_type (object.c:426) +==25446== by 0x40F6FD: object_new (object.c:436) +==25446== by 0x410A57: object_get_root (object.c:1041) +==25446== by 0x412CF4: qdev_get_machine (qdev.c:278) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 143 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x44E837: memory_map_init_x86_64 (exec.c:1572) +==25446== by 0x44E88D: cpu_exec_init_all_x86_64 (exec.c:1580) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 144 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x445B7B: memory_region_init_io_x86_64 (memory.c:1139) +==25446== by 0x44E20D: io_mem_init (exec.c:1421) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 145 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x445B7B: memory_region_init_io_x86_64 (memory.c:1139) +==25446== by 0x44E249: io_mem_init (exec.c:1422) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 146 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x445B7B: memory_region_init_io_x86_64 (memory.c:1139) +==25446== by 0x44E282: io_mem_init (exec.c:1424) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 147 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x445BEC: memory_region_init_ram_x86_64 (memory.c:1152) +==25446== by 0x4422A3: memory_map_x86_64 (memory.c:36) +==25446== +==25446== 616 (80 direct, 536 indirect) bytes in 1 blocks are definitely lost in loss record 148 of 150 +==25446== at 0x15A5C080: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) +==25446== by 0x161D65B1: g_malloc0 (in /usr/lib/libglib-2.0.so.0.4400.1) +==25446== by 0x40FEFE: object_property_add (object.c:755) +==25446== by 0x411957: object_property_add_str (object.c:1464) +==25446== by 0x412219: object_instance_init (object.c:1699) +==25446== by 0x40F117: object_init_with_type (object.c:310) +==25446== by 0x40F0ED: object_init_with_type (object.c:306) +==25446== by 0x40F2EB: object_initialize_with_type (object.c:340) +==25446== by 0x40F34C: object_initialize (object.c:348) +==25446== by 0x4450E7: memory_region_init_x86_64 (memory.c:892) +==25446== by 0x445B7B: memory_region_init_io_x86_64 (memory.c:1139) +==25446== by 0x44E2FE: subpage_init_x86_64 (exec.c:1438) +==25446== +==25446== LEAK SUMMARY: +==25446== definitely lost: 1,183 bytes in 13 blocks +==25446== indirectly lost: 4,001 bytes in 140 blocks +==25446== possibly lost: 0 bytes in 0 blocks +==25446== still reachable: 2,878 bytes in 3 blocks +==25446== suppressed: 0 bytes in 0 blocks +==25446== Reachable blocks (those to which a pointer was found) are not shown. +==25446== To see them, rerun with: --leak-check=full --show-leak-kinds=all +==25446== +==25446== For counts of detected and suppressed errors, rerun with: -v +==25446== Use --track-origins=yes to see where uninitialised values come from +==25446== ERROR SUMMARY: 16 errors from 16 contexts (suppressed: 0 from 0) diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..eb36d2b8 --- /dev/null +++ b/Makefile @@ -0,0 +1,326 @@ +# Unicorn Emulator Engine +# By Dang Hoang Vu , 2015 + + +.PHONY: all clean install uninstall dist header + +include config.mk +include pkgconfig.mk # package version + +LIBNAME = unicorn + +GENOBJ = $(shell find qemu/$(1) -name "*.o" 2>/dev/null) $(wildcard qemu/util/*.o) $(wildcard qemu/*.o) $(wildcard qemu/qom/*.o)\ + $(wildcard qemu/hw/core/*.o) $(wildcard qemu/qapi/*.o) $(wildcard qemu/qobject/*.o) + +ifneq (,$(findstring x86,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,x86_64-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_X86 + UNICORN_TARGETS += x86_64-softmmu, +endif +ifneq (,$(findstring arm,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,arm-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_ARM + UNICORN_TARGETS += arm-softmmu, +endif +ifneq (,$(findstring m68k,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,m68k-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_M68K + UNICORN_TARGETS += m68k-softmmu, +endif +ifneq (,$(findstring aarch64,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,aarch64-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_ARM64 + UNICORN_TARGETS += aarch64-softmmu, +endif +ifneq (,$(findstring mips,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,mips-softmmu) + UC_TARGET_OBJ += $(call GENOBJ,mipsel-softmmu) + UC_TARGET_OBJ += $(call GENOBJ,mips64-softmmu) + UC_TARGET_OBJ += $(call GENOBJ,mips64el-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_MIPS + UNICORN_CFLAGS += -DUNICORN_HAS_MIPSEL + UNICORN_CFLAGS += -DUNICORN_HAS_MIPS64 + UNICORN_CFLAGS += -DUNICORN_HAS_MIPS64EL + UNICORN_TARGETS += mips-softmmu, + UNICORN_TARGETS += mipsel-softmmu, + UNICORN_TARGETS += mips64-softmmu, + UNICORN_TARGETS += mips64el-softmmu, +endif +ifneq (,$(findstring sparc,$(UNICORN_ARCHS))) + UC_TARGET_OBJ += $(call GENOBJ,sparc-softmmu) + UC_TARGET_OBJ += $(call GENOBJ,sparc64-softmmu) + UNICORN_CFLAGS += -DUNICORN_HAS_SPARC + UNICORN_TARGETS += sparc-softmmu,sparc64-softmmu, +endif + +UNICORN_CFLAGS += -fPIC + +# Verbose output? +V ?= 0 + +ifeq ($(UNICORN_DEBUG),yes) +CFLAGS += -O3 +else +CFLAGS += -g +endif + +ifeq ($(CROSS),) +CC ?= cc +AR ?= ar +RANLIB ?= ranlib +STRIP ?= strip +else +CC ?= $(CROSS)-gcc +AR ?= $(CROSS)-ar +RANLIB ?= $(CROSS)-ranlib +STRIP ?= $(CROSS)-strip +GLIB="-L/usr/$(CROSS)/lib/ -lglib-2.0" +endif + +# Find GLIB +ifndef GLIB +GLIB = `pkg-config --libs glib-2.0` +endif + +ifeq ($(PKG_EXTRA),) +PKG_VERSION = $(PKG_MAJOR).$(PKG_MINOR) +else +PKG_VERSION = $(PKG_MAJOR).$(PKG_MINOR).$(PKG_EXTRA) +endif + +API_MAJOR=$(shell echo `grep -e UC_API_MAJOR include/unicorn/unicorn.h | grep -v = | awk '{print $$3}'` | awk '{print $$1}') +VERSION_EXT = + +BIN_EXT = + +IS_APPLE := $(shell $(CC) -dM -E - < /dev/null | grep __apple_build_version__ | wc -l | tr -d " ") +ifeq ($(IS_APPLE),1) +EXT = dylib +VERSION_EXT = $(API_MAJOR).$(EXT) +AR_EXT = a +UNICORN_CFLAGS += -fvisibility=hidden +else +# Cygwin? +IS_CYGWIN := $(shell $(CC) -dumpmachine | grep -i cygwin | wc -l) +ifeq ($(IS_CYGWIN),1) +EXT = dll +AR_EXT = lib +BIN_EXT = .exe +else +# mingw? +IS_MINGW := $(shell $(CC) --version | grep -i mingw | wc -l) +ifeq ($(IS_MINGW),1) +EXT = dll +AR_EXT = lib +BIN_EXT = .exe +else +# Linux, *BSD +EXT = so +VERSION_EXT = $(EXT).$(API_MAJOR) +AR_EXT = a +UNICORN_CFLAGS += -fvisibility=hidden +endif +endif +endif + +ifeq ($(UNICORN_SHARED),yes) +ifeq ($(IS_MINGW),1) +LIBRARY = $(BLDIR)/$(LIBNAME).$(EXT) +else ifeq ($(IS_CYGWIN),1) +LIBRARY = $(BLDIR)/$(LIBNAME).$(EXT) +else # *nix +LIBRARY = $(BLDIR)/lib$(LIBNAME).$(EXT) +endif +endif + +ifeq ($(UNICORN_STATIC),yes) +ifeq ($(IS_MINGW),1) +ARCHIVE = $(BLDIR)/$(LIBNAME).$(AR_EXT) +else ifeq ($(IS_CYGWIN),1) +ARCHIVE = $(BLDIR)/$(LIBNAME).$(AR_EXT) +else +ARCHIVE = $(BLDIR)/lib$(LIBNAME).$(AR_EXT) +endif +endif + +INSTALL_BIN ?= install +INSTALL_DATA ?= $(INSTALL_BIN) -m0644 +INSTALL_LIB ?= $(INSTALL_BIN) -m0755 +PKGCFGF = $(LIBNAME).pc +PREFIX ?= /usr +DESTDIR ?= +BLDIR = . +OBJDIR = . +UNAME_S := $(shell uname -s) + +LIBDIRARCH ?= lib +# Uncomment the below line to installs x86_64 libs to lib64/ directory. +# Or better, pass 'LIBDIRARCH=lib64' to 'make install/uninstall' via 'make.sh'. +#LIBDIRARCH ?= lib64 + +LIBDIR ?= $(DESTDIR)$(PREFIX)/$(LIBDIRARCH) +INCDIR ?= $(DESTDIR)$(PREFIX)/include + +LIBDATADIR ?= $(LIBDIR) + +# Don't redefine $LIBDATADIR when global environment variable +# USE_GENERIC_LIBDATADIR is set. This is used by the pkgsrc framework. + +ifndef USE_GENERIC_LIBDATADIR +ifeq ($(UNAME_S), FreeBSD) +LIBDATADIR = $(DESTDIR)$(PREFIX)/libdata +endif +ifeq ($(UNAME_S), DragonFly) +LIBDATADIR = $(DESTDIR)$(PREFIX)/libdata +endif +endif + +ifeq ($(PKG_EXTRA),) +PKGCFGDIR = $(LIBDATADIR)/pkgconfig +else +PKGCFGDIR ?= $(LIBDATADIR)/pkgconfig +endif + +all: compile_lib +ifeq (,$(findstring yes,$(UNICORN_BUILD_CORE_ONLY))) +ifeq ($(UNICORN_SHARED),yes) +ifeq ($(V),0) + @$(INSTALL_DATA) $(LIBRARY) $(BLDIR)/samples/ +else + $(INSTALL_DATA) $(LIBRARY) $(BLDIR)/samples/ +endif +endif + +ifndef BUILDDIR + @cd samples && $(MAKE) +else + @cd samples && $(MAKE) BUILDDIR=$(BLDIR) +endif +endif + +config: + if [ "$(UNICORN_ARCHS)" != "`cat config.log`" ]; then $(MAKE) clean; fi + +qemu/config-host.h-timestamp: +ifeq ($(UNICORN_DEBUG),yes) + cd qemu && \ + ./configure --extra-cflags="$(UNICORN_CFLAGS)" --target-list="$(UNICORN_TARGETS)" + printf "$(UNICORN_ARCHS)" > config.log +else + cd qemu && \ + ./configure --disable-debug-info --extra-cflags="$(UNICORN_CFLAGS)" --target-list="$(UNICORN_TARGETS)" + printf "$(UNICORN_ARCHS)" > config.log +endif + +compile_lib: config qemu/config-host.h-timestamp + rm -rf lib$(LIBNAME)* $(LIBNAME)*.lib $(LIBNAME)*.dll && cd qemu && $(MAKE) -j 8 + $(MAKE) unicorn + cd samples && $(MAKE) clean + +unicorn: $(LIBRARY) $(ARCHIVE) + +$(LIBRARY): $(UC_TARGET_OBJ) uc.o hook.o +ifeq ($(UNICORN_SHARED),yes) +ifeq ($(V),0) + $(call log,GEN,$(LIBRARY)) + @$(CC) $(CFLAGS) -shared $^ -o $(LIBRARY) $(GLIB) -lm +else + $(CC) $(CFLAGS) -shared $^ -o $(LIBRARY) $(GLIB) -lm +endif +endif + +$(ARCHIVE): $(UC_TARGET_OBJ) uc.o hook.o +ifeq ($(UNICORN_STATIC),yes) +ifeq ($(V),0) + $(call log,GEN,$(ARCHIVE)) + @$(create-archive) +else + $(create-archive) +endif +endif + + +$(PKGCFGF): +ifeq ($(V),0) + $(call log,GEN,$(@:$(BLDIR)/%=%)) + @$(generate-pkgcfg) +else + $(generate-pkgcfg) +endif + + +install: compile_lib $(PKGCFGF) + mkdir -p $(LIBDIR) +ifeq ($(UNICORN_SHARED),yes) + $(INSTALL_LIB) $(LIBRARY) $(LIBDIR) +ifneq ($(VERSION_EXT),) + cd $(LIBDIR) && \ + mv lib$(LIBNAME).$(EXT) lib$(LIBNAME).$(VERSION_EXT) && \ + ln -s lib$(LIBNAME).$(VERSION_EXT) lib$(LIBNAME).$(EXT) +endif +endif +ifeq ($(UNICORN_STATIC),yes) + $(INSTALL_DATA) $(ARCHIVE) $(LIBDIR) +endif + mkdir -p $(INCDIR)/$(LIBNAME) + $(INSTALL_DATA) include/unicorn/*.h $(INCDIR)/$(LIBNAME) + mkdir -p $(PKGCFGDIR) + $(INSTALL_DATA) $(PKGCFGF) $(PKGCFGDIR)/ + + +TAG ?= HEAD +ifeq ($(TAG), HEAD) +DIST_VERSION = latest +else +DIST_VERSION = $(TAG) +endif + +dist: + git archive --format=tar.gz --prefix=unicorn-$(DIST_VERSION)/ $(TAG) > unicorn-$(DIST_VERSION).tgz + git archive --format=zip --prefix=unicorn-$(DIST_VERSION)/ $(TAG) > unicorn-$(DIST_VERSION).zip + + +header: FORCE + $(eval TARGETS := m68k arm aarch64 mips mipsel mips64 mips64el\ + powerpc sparc sparc64 x86_64) + $(foreach var,$(TARGETS),\ + $(shell python qemu/header_gen.py $(var) > qemu/$(var).h;)) + @echo "Generated headers for $(TARGETS)." + +clean: + $(MAKE) -C qemu clean + rm -rf *.d *.o + rm -rf lib$(LIBNAME)* $(LIBNAME)*.lib $(LIBNAME)*.dll +ifeq (,$(findstring yes,$(UNICORN_BUILD_CORE_ONLY))) + cd samples && $(MAKE) clean + rm -f $(BLDIR)/samples/lib$(LIBNAME).$(EXT) +endif + +ifdef BUILDDIR + rm -rf $(BUILDDIR) +endif + + +define generate-pkgcfg + echo 'Name: unicorn' > $(PKGCFGF) + echo 'Description: Unicorn emulator engine' >> $(PKGCFGF) + echo 'Version: $(PKG_VERSION)' >> $(PKGCFGF) + echo 'libdir=$(LIBDIR)' >> $(PKGCFGF) + echo 'includedir=$(INCDIR)' >> $(PKGCFGF) + echo 'archive=$${libdir}/libunicorn.a' >> $(PKGCFGF) + echo 'Libs: -L$${libdir} -lunicorn' >> $(PKGCFGF) + echo 'Cflags: -I$${includedir}' >> $(PKGCFGF) +endef + + +define log + @printf " %-7s %s\n" "$(1)" "$(2)" +endef + + +define create-archive + $(AR) q $(ARCHIVE) $^ + $(RANLIB) $(ARCHIVE) +endef + +FORCE: diff --git a/README b/README new file mode 100644 index 00000000..6d68358a --- /dev/null +++ b/README @@ -0,0 +1,23 @@ +Unicorn is a lightweight multi-platform, multi-architecture CPU emulator framework. +Unicorn offers some unparalleled features: + +- Multi-architectures: Arm, Arm64 (Armv8), M68K, Mips, Sparc, & X86 (include X86_64). +- Clean/simple/lightweight/intuitive architecture-neutral API. +- Implemented in pure C language, with bindings for Python available. +- Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed). +- High performace by using Just-In-Time compiler technique. +- Support fine-grained instrumentation at various levels. +- Thread-safe by design. +- Distributed under open source license GPL. + +Further information is available at http://www.unicorn-engine.org + + +[Compile] + +See COMPILE.TXT file for how to compile and install Unicorn. + + +[License] + +This project is released under the GPL license. diff --git a/bindings/Makefile b/bindings/Makefile new file mode 100644 index 00000000..98cdbf16 --- /dev/null +++ b/bindings/Makefile @@ -0,0 +1,58 @@ +# Unicorn Engine +# By Nguyen Anh Quynh & Dang Hoang Vu, 2015 +TMPDIR = /tmp/unicorn_sample + +DIFF = diff -u -w + +SAMPLE_ARM = $(TMPDIR)/sample_arm +SAMPLE_ARM64 = $(TMPDIR)/sample_arm64 +SAMPLE_MIPS = $(TMPDIR)/sample_mips +SAMPLE_M68K = $(TMPDIR)/sample_m68k +SAMPLE_SPARC = $(TMPDIR)/sample_sparc +SAMPLE_X86 = $(TMPDIR)/sample_x86 + +.PHONY: all expected python + +all: + cd python && $(MAKE) gen_const + +samples: expected python + +sample_python: expected python + +expected: + cd ../samples && $(MAKE) + mkdir -p $(TMPDIR) + ../samples/sample_arm > $(SAMPLE_ARM)_e + ../samples/sample_arm64 > $(SAMPLE_ARM64)_e + ../samples/sample_mips > $(SAMPLE_MIPS)_e + ../samples/sample_sparc > $(SAMPLE_SPARC)_e + ../samples/sample_m68k > $(SAMPLE_M68K)_e + ../samples/sample_x86 > $(SAMPLE_X86)_e + +python: FORCE + cd python && $(MAKE) + python python/sample_arm.py > $(SAMPLE_ARM)_o + python python/sample_arm64.py > $(SAMPLE_ARM64)_o + python python/sample_mips.py > $(SAMPLE_MIPS)_o + python python/sample_sparc.py > $(SAMPLE_SPARC)_o + python python/sample_m68k.py > $(SAMPLE_M68K)_o + python python/sample_x86.py > $(SAMPLE_X86)_o + $(MAKE) sample_diff + +sample_diff: FORCE + $(DIFF) $(SAMPLE_ARM)_e $(SAMPLE_ARM)_o + $(DIFF) $(SAMPLE_ARM64)_e $(SAMPLE_ARM64)_o + $(DIFF) $(SAMPLE_MIPS)_e $(SAMPLE_MIPS)_o + $(DIFF) $(SAMPLE_SPARC)_e $(SAMPLE_SPARC)_o + $(DIFF) $(SAMPLE_M68K)_e $(SAMPLE_M68K)_o + $(DIFF) $(SAMPLE_X86)_e $(SAMPLE_X86)_o + +clean: + rm -rf $(TMPDIR) + cd python && $(MAKE) clean + +check: + make -C python check + +FORCE: diff --git a/bindings/const_generator.py b/bindings/const_generator.py new file mode 100644 index 00000000..a734e178 --- /dev/null +++ b/bindings/const_generator.py @@ -0,0 +1,100 @@ +# Unicorn Engine +# By Dang Hoang Vu, 2013 +from __future__ import print_function +import sys, re + +INCL_DIR = '../include/unicorn/' + +include = [ 'arm.h', 'arm64.h', 'mips.h', 'x86.h', 'sparc.h', 'm68k.h' ] + +template = { + 'python': { + 'header': "# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.py]\n", + 'footer': "", + 'line_format': '%s = %s\n', + 'out_file': './python/unicorn/%s_const.py', + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'm68k.h': 'm68k', + 'comment_open': '#', + 'comment_close': '', + }, +} + +# markup for comments to be added to autogen files +MARKUP = '//>' + +def gen(lang): + global include, INCL_DIR + templ = template[lang] + for target in include: + prefix = templ[target] + outfile = open(templ['out_file'] %(prefix), 'w') + outfile.write(templ['header'] % (prefix)) + + lines = open(INCL_DIR + target).readlines() + + count = 0 + for line in lines: + line = line.strip() + + if line.startswith(MARKUP): # markup for comments + outfile.write("\n%s%s%s\n" %(templ['comment_open'], \ + line.replace(MARKUP, ''), templ['comment_close'])) + continue + + if line == '' or line.startswith('//'): + continue + + if not line.startswith(prefix.upper()): + continue + + tmp = line.strip().split(',') + for t in tmp: + t = t.strip() + if not t or t.startswith('//'): continue + f = re.split('\s+', t) + + if f[0].startswith(prefix.upper()): + if len(f) > 1 and f[1] not in '//=': + print("Error: Unable to convert %s" % f) + continue + elif len(f) > 1 and f[1] == '=': + rhs = ''.join(f[2:]) + else: + rhs = str(count) + count += 1 + + try: + count = int(rhs) + 1 + if (count == 1): + outfile.write("\n") + except ValueError: + if lang == 'ocaml': + # ocaml uses lsl for '<<', lor for '|' + rhs = rhs.replace('<<', ' lsl ') + rhs = rhs.replace('|', ' lor ') + # ocaml variable has _ as prefix + if rhs[0].isalpha(): + rhs = '_' + rhs + + outfile.write(templ['line_format'] %(f[0].strip(), rhs)) + + outfile.write(templ['footer']) + outfile.close() + +def main(): + try: + gen(sys.argv[1]) + except: + raise RuntimeError("Unsupported binding %s" % sys.argv[1]) + +if __name__ == "__main__": + if len(sys.argv) < 2: + print("Usage:", sys.argv[0], " ") + sys.exit(1) + main() diff --git a/bindings/python/MANIFEST.in b/bindings/python/MANIFEST.in new file mode 100644 index 00000000..0197892a --- /dev/null +++ b/bindings/python/MANIFEST.in @@ -0,0 +1,4 @@ +recursive-include src * +recursive-include prebuilt * +include LICENSE.TXT +include README diff --git a/bindings/python/Makefile b/bindings/python/Makefile new file mode 100644 index 00000000..cc6c7c6d --- /dev/null +++ b/bindings/python/Makefile @@ -0,0 +1,82 @@ +# Python binding for Unicorn engine. Nguyen Anh Quynh + +ifndef BUILDDIR +OBJDIR = ./build +else +OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/python +endif + +.PHONY: gen_const install install3 clean + +gen_const: + cd .. && python const_generator.py python + +install: + rm -rf $(OBJDIR) src/ + rm -rf prebuilt/win64/unicorn.dll + rm -rf prebuilt/win32/unicorn.dll + if test -n "${DESTDIR}"; then \ + python setup.py build -b $(OBJDIR) install --root="${DESTDIR}"; \ + else \ + python setup.py build -b $(OBJDIR) install; \ + fi + +install3: + rm -rf $(OBJDIR) src/ + rm -rf prebuilt/win64/unicorn.dll + rm -rf prebuilt/win32/unicorn.dll + if test -n "${DESTDIR}"; then \ + python3 setup.py build -b $(OBJDIR) install --root="${DESTDIR}"; \ + else \ + python3 setup.py build -b $(OBJDIR) install; \ + fi + +# build & upload PyPi package with source code of the core +sdist: + rm -rf src/ dist/ + rm -rf prebuilt/win64/unicorn.dll + rm -rf prebuilt/win32/unicorn.dll + cp README.pypi-src README + cp PKG-INFO.src PKG-INFO + python setup.py sdist register upload + +# build & upload PyPi package with source code of the core +sdist3: + rm -rf src/ dist/ + rm -rf prebuilt/win64/unicorn.dll + rm -rf prebuilt/win32/unicorn.dll + cp README.pypi-src README + cp PKG-INFO.src PKG-INFO + python3 setup.py sdist register upload + +# build & upload PyPi package with prebuilt core +# NOTE: be sure to have precompiled core under prebuilt/win*/ beforehand +sdist_win: + rm -rf src/ dist/ + cp README.pypi-win README + cp PKG-INFO.win PKG-INFO + python setup.py sdist register upload + +# build & upload PyPi package with prebuilt core +# NOTE: be sure to have precompiled core under prebuilt/win*/ beforehand +sdist3_win: + rm -rf src/ dist/ + cp README.pypi-win README + cp PKG-INFO.win PKG-INFO + python3 setup.py sdist register upload + +clean: + rm -rf $(OBJDIR) src/ dist/ README + rm -f unicorn/*.so + rm -rf prebuilt/win64/unicorn.dll + rm -rf prebuilt/win32/unicorn.dll + + +SAMPLES = sample_arm.py sample_arm64.py sample_mips.py +SAMPLES += sample_sparc.py sample_m68k.py sample_x86.py +check: + @for t in $(SAMPLES); do \ + echo Check $$t ... ; \ + ./$$t > /dev/null && echo OK || echo FAILED; \ + done + diff --git a/bindings/python/README.TXT b/bindings/python/README.TXT new file mode 100644 index 00000000..710a3f26 --- /dev/null +++ b/bindings/python/README.TXT @@ -0,0 +1,63 @@ +This documentation explains how to install Python binding for Unicorn +from source. If you want to install it from PyPi package, see the below +docs instead: + + - README.pypi-src: How to compile the Unicorn core & install binding + at the same time from PyPi package "unicorn" + + - README.pypi-win: How to install binding for Windows from PyPi package + "unicorn-windows". Note that this package already has prebuilt core + inside, so no compilation is needed. + + +0. Install the core engine as dependency + + Follow README in the root directory to compile & install the core. + + On *nix, this can simply done by: + + $ sudo ./make.sh install + + +1. To install pure Python binding on *nix, run the command below: + + $ sudo make install + + To install Python3 binding package, run the command below: + (Note: this requires python3 installed in your machine) + + $ sudo make install3 + + + +This directory contains some sample code to show how to use Unicorn API. + +- sample_.py + These code show how to access architecture-specific information for each + architecture. + +- shellcode.py + This shows how to analyze a Linux shellcode. + + +2. To install Python binding on Windows: + +Recommended method: + + Use the Python module installer for 32/64 bit Windows from: + + http://www.unicorn-engine.org/download.html + + +Manual method: + + If the module installer fails to locate your Python install, or if you have + additional Python installs (e.g. Anaconda / virtualenv), run the following + command in command prompt: + + C:\> C:\location_to_python\python.exe setup.py install + + Next, copy unicorn.dll from the 'Core engine for Windows' package available + on the same Unicorn download page and paste it in the path: + + C:\location_to_python\Lib\site-packages\unicorn\ diff --git a/bindings/python/sample_arm.py b/bindings/python/sample_arm.py new file mode 100755 index 00000000..4d7586d4 --- /dev/null +++ b/bindings/python/sample_arm.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python +# Sample code for ARM of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.arm_const import * + + +# code to be emulated +ARM_CODE = "\x37\x00\xa0\xe3\x03\x10\x42\xe0" # mov r0, #0x37; sub r1, r2, r3 +THUMB_CODE = "\x83\xb0" # sub sp, #0xc +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + + +# Test ARM +def test_arm(): + print("Emulate ARM code") + try: + # Initialize emulator in ARM mode + mu = Uc(UC_ARCH_ARM, UC_MODE_ARM) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, ARM_CODE) + + # initialize machine registers + mu.reg_write(ARM_REG_R0, 0x1234) + mu.reg_write(ARM_REG_R2, 0x6789) + mu.reg_write(ARM_REG_R3, 0x3333) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(ARM_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r0 = mu.reg_read(ARM_REG_R0) + r1 = mu.reg_read(ARM_REG_R1) + print(">>> R0 = 0x%x" %r0) + print(">>> R1 = 0x%x" %r1) + + except UcError as e: + print("ERROR: %s" % e) + + +def test_thumb(): + print("Emulate THUMB code") + try: + # Initialize emulator in thumb mode + mu = Uc(UC_ARCH_ARM, UC_MODE_THUMB) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, THUMB_CODE) + + # initialize machine registers + mu.reg_write(ARM_REG_SP, 0x1234) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(THUMB_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + sp = mu.reg_read(ARM_REG_SP) + print(">>> SP = 0x%x" %sp) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_arm() + print("=" * 20) + test_thumb() diff --git a/bindings/python/sample_arm64.py b/bindings/python/sample_arm64.py new file mode 100755 index 00000000..6d589439 --- /dev/null +++ b/bindings/python/sample_arm64.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python +# Sample code for ARM64 of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.arm64_const import * + + +# code to be emulated +ARM64_CODE = "\xab\x01\x0f\x8b" #add x11, x13, x15 + +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + + +# Test ARM64 +def test_arm64(): + print("Emulate ARM64 code") + try: + # Initialize emulator in ARM mode + mu = Uc(UC_ARCH_ARM64, UC_MODE_ARM) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, ARM64_CODE) + + # initialize machine registers + mu.reg_write(ARM64_REG_X11, 0x1234) + mu.reg_write(ARM64_REG_X13, 0x6789) + mu.reg_write(ARM64_REG_X15, 0x3333) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(ARM64_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + x11 = mu.reg_read(ARM64_REG_X11) + x13 = mu.reg_read(ARM64_REG_X13) + x15 = mu.reg_read(ARM64_REG_X15) + print(">>> X11 = 0x%x" %x11) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_arm64() diff --git a/bindings/python/sample_m68k.py b/bindings/python/sample_m68k.py new file mode 100755 index 00000000..6f05dd4b --- /dev/null +++ b/bindings/python/sample_m68k.py @@ -0,0 +1,62 @@ +#!/usr/bin/env python +# Sample code for ARM of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.m68k_const import * + + +# code to be emulated +M68K_CODE = "\x76\xed" # movq #-19, %d3 +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + + +# Test ARM +def test_m68k(): + print("Emulate M68K code") + try: + # Initialize emulator in ARM mode + mu = Uc(UC_ARCH_M68K, UC_MODE_BIG_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, M68K_CODE) + + # initialize machine registers + mu.reg_write(M68K_REG_D3, 0x1234) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(M68K_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + d3 = mu.reg_read(M68K_REG_D3) + print(">>> D3 = 0x%x" %d3) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_m68k() diff --git a/bindings/python/sample_mips.py b/bindings/python/sample_mips.py new file mode 100755 index 00000000..6b49c183 --- /dev/null +++ b/bindings/python/sample_mips.py @@ -0,0 +1,101 @@ +#!/usr/bin/env python +# Sample code for MIPS of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.mips_const import * + + +# code to be emulated +MIPS_CODE_EB = "\x34\x21\x34\x56" # ori $at, $at, 0x3456; +MIPS_CODE_EL = "\x56\x34\x21\x34" # ori $at, $at, 0x3456; + +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + + +# Test MIPS EB +def test_mips_eb(): + print("Emulate MIPS code (big-endian)") + try: + # Initialize emulator in MIPS32 + EB mode + mu = Uc(UC_ARCH_MIPS, UC_MODE_MIPS32 + UC_MODE_BIG_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, MIPS_CODE_EB) + + # initialize machine registers + mu.reg_write(MIPS_REG_1, 0x6789) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(MIPS_CODE_EB)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r1 = mu.reg_read(MIPS_REG_1) + print(">>> r1 = 0x%x" %r1) + + except UcError as e: + print("ERROR: %s" % e) + + +# Test MIPS EL +def test_mips_el(): + print("Emulate MIPS code (little-endian)") + try: + # Initialize emulator in MIPS32 + EL mode + mu = Uc(UC_ARCH_MIPS, UC_MODE_MIPS32 + UC_MODE_LITTLE_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, MIPS_CODE_EL) + + # initialize machine registers + mu.reg_write(MIPS_REG_1, 0x6789) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(MIPS_CODE_EL)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r1 = mu.reg_read(MIPS_REG_1) + print(">>> r1 = 0x%x" %r1) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_mips_eb() + print("=" * 20) + test_mips_el() diff --git a/bindings/python/sample_network_auditing.py b/bindings/python/sample_network_auditing.py new file mode 100755 index 00000000..26998215 --- /dev/null +++ b/bindings/python/sample_network_auditing.py @@ -0,0 +1,380 @@ +#!/usr/bin/env python +# Unicorn sample for auditing network connection and file handling in shellcode. +# Nguyen Tan Cong + +from __future__ import print_function +from unicorn import * +from unicorn.x86_const import * +import struct +import uuid +import random + +SIZE_REG = 4 +SOCKETCALL_MAX_ARGS = 6 +FILENAME_MAX_LEN = 128 + +SOCKET_TYPES = { + 1: "SOCK_STREAM", + 2: "SOCK_DGRAM", + 3: "SOCK_RAW", + 4: "SOCK_RDM", + 5: "SOCK_SEQPACKET", + 10: "SOCK_PACKET" +} + +ADDR_FAMILY = { + 0: "AF_UNSPEC", + 1: "AF_UNIX", + 2: "AF_INET", + 3: "AF_AX25", + 4: "AF_IPX", + 5: "AF_APPLETALK", + 6: "AF_NETROM", + 7: "AF_BRIDGE", + 8: "AF_AAL5", + 9: "AF_X25", + 10: "AF_INET6", + 12: "AF_MAX" +} + +# http://shell-storm.org/shellcode/files/shellcode-861.php +X86_SEND_ETCPASSWD = b"\x6a\x66\x58\x31\xdb\x43\x31\xd2\x52\x6a\x01\x6a\x02\x89\xe1\xcd\x80\x89\xc6\x6a\x66\x58\x43\x68\x7f\x01\x01\x01\x66\x68\x30\x39\x66\x53\x89\xe1\x6a\x10\x51\x56\x89\xe1\x43\xcd\x80\x89\xc6\x6a\x01\x59\xb0\x3f\xcd\x80\xeb\x27\x6a\x05\x58\x5b\x31\xc9\xcd\x80\x89\xc3\xb0\x03\x89\xe7\x89\xf9\x31\xd2\xb6\xff\xb2\xff\xcd\x80\x89\xc2\x6a\x04\x58\xb3\x01\xcd\x80\x6a\x01\x58\x43\xcd\x80\xe8\xd4\xff\xff\xff\x2f\x65\x74\x63\x2f\x70\x61\x73\x73\x77\x64" + +# http://shell-storm.org/shellcode/files/shellcode-882.php +X86_BIND_TCP = b"\x6a\x66\x58\x6a\x01\x5b\x31\xf6\x56\x53\x6a\x02\x89\xe1\xcd\x80\x5f\x97\x93\xb0\x66\x56\x66\x68\x05\x39\x66\x53\x89\xe1\x6a\x10\x51\x57\x89\xe1\xcd\x80\xb0\x66\xb3\x04\x56\x57\x89\xe1\xcd\x80\xb0\x66\x43\x56\x56\x57\x89\xe1\xcd\x80\x59\x59\xb1\x02\x93\xb0\x3f\xcd\x80\x49\x79\xf9\xb0\x0b\x68\x2f\x2f\x73\x68\x68\x2f\x62\x69\x6e\x89\xe3\x41\x89\xca\xcd\x80" + +# http://shell-storm.org/shellcode/files/shellcode-883.php +X86_REVERSE_TCP = b"\x6a\x66\x58\x6a\x01\x5b\x31\xd2\x52\x53\x6a\x02\x89\xe1\xcd\x80\x92\xb0\x66\x68\x7f\x01\x01\x01\x66\x68\x05\x39\x43\x66\x53\x89\xe1\x6a\x10\x51\x52\x89\xe1\x43\xcd\x80\x6a\x02\x59\x87\xda\xb0\x3f\xcd\x80\x49\x79\xf9\xb0\x0b\x41\x89\xca\x52\x68\x2f\x2f\x73\x68\x68\x2f\x62\x69\x6e\x89\xe3\xcd\x80" + +# http://shell-storm.org/shellcode/files/shellcode-849.php +X86_REVERSE_TCP_2 = b"\x31\xc0\x31\xdb\x31\xc9\x31\xd2\xb0\x66\xb3\x01\x51\x6a\x06\x6a\x01\x6a\x02\x89\xe1\xcd\x80\x89\xc6\xb0\x66\x31\xdb\xb3\x02\x68\xc0\xa8\x01\x0a\x66\x68\x7a\x69\x66\x53\xfe\xc3\x89\xe1\x6a\x10\x51\x56\x89\xe1\xcd\x80\x31\xc9\xb1\x03\xfe\xc9\xb0\x3f\xcd\x80\x75\xf8\x31\xc0\x52\x68\x6e\x2f\x73\x68\x68\x2f\x2f\x62\x69\x89\xe3\x52\x53\x89\xe1\x52\x89\xe2\xb0\x0b\xcd\x80" + +# memory address where emulation starts +ADDRESS = 0x1000000 + +# supported classes +class IdGenerator: + def __init__(self): + self.__next_id = 3 # exclude sdtin, stdout, stderr + + def next(self): + next_id = self.__next_id + + self.__next_id += 1 + + return next_id + +class LogChain: + def __init__(self): + self.__chains = {} + self.__linking_fds = {} + + def clean(self): + self.__chains = {} + self.__linking_fds = {} + + def create_chain(self, id): + if not self.__chains.has_key(id): + self.__chains[id] = [] + else: + print("LogChain: id %d existed" % id) + + def add_log(self, id, msg): + fd = self.get_original_fd(id) + + if fd is not None: + self.__chains[fd].append(msg) + else: + print("LogChain: id %d doesn't exist" % id) + + def link_fd(self, from_fd, to_fd): + if not self.__linking_fds.has_key(to_fd): + self.__linking_fds[to_fd] = [] + + self.__linking_fds[to_fd].append(from_fd) + + def get_original_fd(self, fd): + if self.__chains.has_key(fd): + return fd + + for orig_fd, links in self.__linking_fds.iteritems(): + if fd in links: + return orig_fd + + return None + + def print_report(self): + print(""" +---------------- +| START REPORT | +---------------- +""") + for id, logs in self.__chains.iteritems(): + print("---- START FD(%d) ----" % id) + print("\n".join(logs)) + print("---- END FD(%d) ----" % id) + + print(""" +-------------- +| END REPORT | +-------------- +""") + +# end supported classes + +id_gen = IdGenerator() +fd_chains = LogChain() + +# utilities +def bin_to_ipv4(ip): + return "%d.%d.%d.%d" % ( + (ip & 0xff000000) >> 24, + (ip & 0xff0000) >> 16, + (ip & 0xff00) >> 8, + (ip & 0xff)) + +def bytearray_to_string(ba): + ret = "" + + i = 0 + while i < len(ba) and ba[i] != 0x0: + ret += chr(ba[i]) + + i += 1 + + return ret + +def parse_sock_address(sock_addr): + sin_family, = struct.unpack("HI", sock_addr[2:8]) + return "%s:%d" % (bin_to_ipv4(host), port) + elif sin_family == 6: # AF_INET6 + return "" + +def print_sockcall(msg): + print(">>> SOCKCALL %s" % msg) +# end utilities + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = 0x%x" %(address, size)) + # read this instruction code from memory + tmp = uc.mem_read(address, size) + print(">>> Instruction code at [0x%x] =" %(address), end="") + for i in tmp: + print(" %x" %i, end="") + print("") + +# callback for tracing Linux interrupt +def hook_intr(uc, intno, user_data): + # only handle Linux syscall + if intno != 0x80: + return + + eax = uc.reg_read(X86_REG_EAX) + ebx = uc.reg_read(X86_REG_EBX) + ecx = uc.reg_read(X86_REG_ECX) + edx = uc.reg_read(X86_REG_EDX) + eip = uc.reg_read(X86_REG_EIP) + + # print(">>> INTERRUPT %d" % eax) + + if eax == 1: # sys_exit + print(">>> SYS_EXIT") + uc.emu_stop() + elif eax == 3: # sys_read + fd = ebx + buf = ecx + count = edx + + dummy_content = str(uuid.uuid1()) + if len(dummy_content) > count: + dummy_content = dummy_content[:count] + + uc.mem_write(buf, dummy_content) + + msg = "read %d bytes from fd(%d) with dummy_content(%s)" % (count, fd, dummy_content) + + fd_chains.add_log(fd, msg) + print(">>> %s" % msg) + elif eax == 4: # sys_write + fd = ebx + buf = ecx + count = edx + + content = uc.mem_read(buf, count) + + msg = "write data=%s count=%d to fd(%d)" % (bytearray_to_string(content), count, fd) + + print(">>> %s" % msg) + fd_chains.add_log(fd, msg) + elif eax == 5: # sys_open + filename_addr = ebx + flags = ecx + mode = edx + filename = uc.mem_read(filename_addr, FILENAME_MAX_LEN) + + dummy_fd = id_gen.next() + uc.reg_write(X86_REG_EAX, dummy_fd) + + msg = "open file (filename=%s flags=%d mode=%d) with fd(%d)" % (bytearray_to_string(filename), flags, mode, dummy_fd) + + fd_chains.create_chain(dummy_fd) + fd_chains.add_log(dummy_fd, msg) + print(">>> %s" % msg) + elif eax == 11: # sys_execv + # print(">>> ebx=0x%x, ecx=0x%x, edx=0x%x" % (ebx, ecx, edx)) + filename = uc.mem_read(ebx, FILENAME_MAX_LEN) + + print(">>> SYS_EXECV filename=%s" % bytearray_to_string(filename)) + elif eax == 63: # sys_dup2 + fd_chains.link_fd(ecx, ebx) + print(">>> SYS_DUP2 oldfd=%d newfd=%d" % (ebx, ecx)) + elif eax == 102: # sys_socketcall + # ref: http://www.skyfree.org/linux/kernel_network/socket.html + call = uc.reg_read(X86_REG_EBX) + args = uc.reg_read(X86_REG_ECX) + + buf = uc.mem_read(args, SOCKETCALL_MAX_ARGS*SIZE_REG) + args = struct.unpack("<" + "I"*SOCKETCALL_MAX_ARGS, buf) + + # int sys_socketcall(int call, unsigned long *args) + if call == 1: # sys_socket + # err = sys_socket(a0,a1,a[2]) + # int sys_socket(int family, int type, int protocol) + family = args[0] + sock_type = args[1] + protocol = args[2] + + dummy_fd = id_gen.next() + uc.reg_write(X86_REG_EAX, dummy_fd) + + if family == 2: # AF_INET + + msg = "create socket (%s, %s) with fd(%d)" % (ADDR_FAMILY[family], SOCKET_TYPES[sock_type], dummy_fd) + fd_chains.create_chain(dummy_fd) + fd_chains.add_log(dummy_fd, msg) + print_sockcall(msg) + elif family == 3: # AF_INET6 + pass + + elif call == 2: # sys_bind + fd = args[0] + umyaddr = args[1] + addrlen = args[2] + + sock_addr = uc.mem_read(umyaddr, addrlen) + + msg = "fd(%d) bind to %s" % (fd, parse_sock_address(sock_addr)) + fd_chains.add_log(fd, msg) + print_sockcall(msg) + + elif call == 3: # sys_connect + # err = sys_connect(a0, (struct sockaddr *)a1, a[2]) + # int sys_connect(int fd, struct sockaddr *uservaddr, int addrlen) + fd = args[0] + uservaddr = args[1] + addrlen = args[2] + + sock_addr = uc.mem_read(uservaddr, addrlen) + msg = "fd(%d) connect to %s" % (fd, parse_sock_address(sock_addr)) + fd_chains.add_log(fd, msg) + print_sockcall(msg) + + elif call == 4: # sys_listen + fd = args[0] + backlog = args[1] + + msg = "fd(%d) listened with backlog=%d" % (fd, backlog) + fd_chains.add_log(fd, msg) + print_sockcall(msg) + + elif call == 5: # sys_accept + fd = args[0] + upeer_sockaddr = args[1] + upeer_addrlen = args[2] + + # print(">>> upeer_sockaddr=0x%x, upeer_addrlen=%d" % (upeer_sockaddr, upeer_addrlen)) + + if upeer_sockaddr == 0x0: + print_sockcall("fd(%d) accept client" % fd) + else: + upeer_len, = struct.unpack(">> Emulation done") + + except UcError as e: + print("ERROR: %s" % e) + + fd_chains.print_report() + +if __name__ == '__main__': + test_i386(X86_SEND_ETCPASSWD) + test_i386(X86_BIND_TCP) + test_i386(X86_REVERSE_TCP) + test_i386(X86_REVERSE_TCP_2) + diff --git a/bindings/python/sample_sparc.py b/bindings/python/sample_sparc.py new file mode 100755 index 00000000..5fd2e7e2 --- /dev/null +++ b/bindings/python/sample_sparc.py @@ -0,0 +1,64 @@ +#!/usr/bin/env python +# Sample code for SPARC of Unicorn. Nguyen Anh Quynh +# Python sample ported by Loi Anh Tuan + +from __future__ import print_function +from unicorn import * +from unicorn.sparc_const import * + + +# code to be emulated +SPARC_CODE = "\x86\x00\x40\x02" # add %g1, %g2, %g3; +# memory address where emulation starts +ADDRESS = 0x10000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + + +# Test SPARC +def test_sparc(): + print("Emulate SPARC code") + try: + # Initialize emulator in SPARC EB mode + mu = Uc(UC_ARCH_SPARC, UC_MODE_BIG_ENDIAN) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, SPARC_CODE) + + # initialize machine registers + mu.reg_write(SPARC_REG_G1, 0x1230) + mu.reg_write(SPARC_REG_G2, 0x6789) + mu.reg_write(SPARC_REG_G3, 0x5555) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(SPARC_CODE)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + g3 = mu.reg_read(SPARC_REG_G3) + print(">>> G3 = 0x%x" %g3) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_sparc() diff --git a/bindings/python/sample_x86.py b/bindings/python/sample_x86.py new file mode 100755 index 00000000..efbf6375 --- /dev/null +++ b/bindings/python/sample_x86.py @@ -0,0 +1,409 @@ +#!/usr/bin/env python +# Sample code for X86 of Unicorn. Nguyen Anh Quynh + +from __future__ import print_function +from unicorn import * +from unicorn.x86_const import * + + +X86_CODE32 = b"\x41\x4a" # INC ecx; DEC dex +X86_CODE32_LOOP = b"\x41\x4a\xeb\xfe" # INC ecx; DEC dex; JMP self-loop +X86_CODE32_MEM_READ = b"\x8B\x0D\xAA\xAA\xAA\xAA\x41\x4a" # mov ecx,[0xaaaaaaaa]; INC ecx; DEC dex +X86_CODE32_MEM_WRITE = b"\x89\x0D\xAA\xAA\xAA\xAA\x41\x4a" # mov [0xaaaaaaaa], ecx; INC ecx; dec edx +X86_CODE64 = b"\x41\xBC\x3B\xB0\x28\x2A\x49\x0F\xC9\x90\x4D\x0F\xAD\xCF\x49\x87\xFD\x90\x48\x81\xD2\x8A\xCE\x77\x35\x48\xF7\xD9\x4D\x29\xF4\x49\x81\xC9\xF6\x8A\xC6\x53\x4D\x87\xED\x48\x0F\xAD\xD2\x49\xF7\xD4\x48\xF7\xE1\x4D\x19\xC5\x4D\x89\xC5\x48\xF7\xD6\x41\xB8\x4F\x8D\x6B\x59\x4D\x87\xD0\x68\x6A\x1E\x09\x3C\x59" +X86_CODE32_INOUT = b"\x41\xE4\x3F\x4a\xE6\x46\x43" # INC ecx; IN AL, 0x3f; DEC edx; OUT 0x46, AL; INC ebx + +# memory address where emulation starts +ADDRESS = 0x1000000 + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = %u" %(address, size)) + #eip = uc.reg_read(X86_REG_EIP) + #print(">>> EIP = 0x%x" %(eip)) + + +# callback for tracing invalid memory access (READ or WRITE) +def hook_mem_invalid(uc, access, address, size, value, user_data): + if access == UC_MEM_WRITE: + print(">>> Missing memory is being WRITE at 0x%x, data size = %u, data value = 0x%x" \ + %(address, size, value)) + # map this memory in with 2MB in size + uc.mem_map(0xaaaa0000, 2 * 1024*1024) + # return True to indicate we want to continue emulation + return True + else: + # return False to indicate we want to stop emulation + return False + + +# callback for tracing memory access (READ or WRITE) +def hook_mem_access(uc, access, address, size, value, user_data): + if access == UC_MEM_WRITE: + print(">>> Memory is being WRITE at 0x%x, data size = %u, data value = 0x%x" \ + %(address, size, value)) + else: # READ + print(">>> Memory is being READ at 0x%x, data size = %u" \ + %(address, size)) + + +# callback for IN instruction +def hook_in(uc, port, size, user_data): + eip = uc.reg_read(X86_REG_EIP) + print("--- reading from port 0x%x, size: %u, address: 0x%x" %(port, size, eip)) + if size == 1: + # read 1 byte to AL + return 0xf1 + if size == 2: + # read 2 byte to AX + return 0xf2 + if size == 4: + # read 4 byte to EAX + return 0xf4 + # we should never reach here + return 0 + + +# callback for OUT instruction +def hook_out(uc, port, size, value, user_data): + eip = uc.reg_read(X86_REG_EIP) + print("--- writing to port 0x%x, size: %u, value: 0x%x, address: 0x%x" %(port, size, value, eip)) + + # confirm that value is indeed the value of AL/AX/EAX + v = 0 + if size == 1: + # read 1 byte in AL + v = uc.reg_read(X86_REG_AL) + if size == 2: + # read 2 bytes in AX + v = uc.reg_read(X86_REG_AX) + if size == 4: + # read 4 bytes in EAX + v = uc.reg_read(X86_REG_EAX) + + print("--- register value = 0x%x" %v) + + +# Test X86 32 bit +def test_i386(): + print("Emulate i386 code") + try: + # Initialize emulator in X86-32bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_32) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE32) + + # initialize machine registers + mu.reg_write(X86_REG_ECX, 0x1234) + mu.reg_write(X86_REG_EDX, 0x7890) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE32)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r_ecx = mu.reg_read(X86_REG_ECX) + r_edx = mu.reg_read(X86_REG_EDX) + print(">>> ECX = 0x%x" %r_ecx) + print(">>> EDX = 0x%x" %r_edx) + + # read from memory + tmp = mu.mem_read(ADDRESS, 2) + print(">>> Read 2 bytes from [0x%x] =" %(ADDRESS), end="") + for i in tmp: + print(" 0x%x" %i, end="") + print("") + + except UcError as e: + print("ERROR: %s" % e) + + +def test_i386_loop(): + print("Emulate i386 code with infinite loop - wait for 2 seconds then stop emulation") + try: + # Initialize emulator in X86-32bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_32) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE32_LOOP) + + # initialize machine registers + mu.reg_write(X86_REG_ECX, 0x1234) + mu.reg_write(X86_REG_EDX, 0x7890) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE32_LOOP), 2 * UC_SECOND_SCALE) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r_ecx = mu.reg_read(X86_REG_ECX) + r_edx = mu.reg_read(X86_REG_EDX) + print(">>> ECX = 0x%x" %r_ecx) + print(">>> EDX = 0x%x" %r_edx) + + except UcError as e: + print("ERROR: %s" % e) + + +def test_i386_invalid_mem_read(): + print("Emulate i386 code that read from invalid memory") + try: + # Initialize emulator in X86-32bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_32) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE32_MEM_READ) + + # initialize machine registers + mu.reg_write(X86_REG_ECX, 0x1234) + mu.reg_write(X86_REG_EDX, 0x7890) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + try: + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE32_MEM_READ)) + except UcError as e: + print("ERROR: %s" % e) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r_ecx = mu.reg_read(X86_REG_ECX) + r_edx = mu.reg_read(X86_REG_EDX) + print(">>> ECX = 0x%x" %r_ecx) + print(">>> EDX = 0x%x" %r_edx) + + except UcError as e: + print("ERROR: %s" % e) + + +def test_i386_invalid_mem_write(): + print("Emulate i386 code that write to invalid memory") + try: + # Initialize emulator in X86-32bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_32) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE32_MEM_WRITE) + + # initialize machine registers + mu.reg_write(X86_REG_ECX, 0x1234) + mu.reg_write(X86_REG_EDX, 0x7890) + + # tracing all basic blocks with customized callback + #mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + #mu.hook_add(UC_HOOK_CODE, hook_code) + + # intercept invalid memory events + mu.hook_add(UC_HOOK_MEM_INVALID, hook_mem_invalid) + + try: + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE32_MEM_WRITE)) + except UcError as e: + print("ERROR: %s" % e) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r_ecx = mu.reg_read(X86_REG_ECX) + r_edx = mu.reg_read(X86_REG_EDX) + print(">>> ECX = 0x%x" %r_ecx) + print(">>> EDX = 0x%x" %r_edx) + + try: + # read from memory + print(">>> Read 4 bytes from [0x%x] = " %(0xaaaaaaaa), end="") + tmp = mu.mem_read(0xaaaaaaaa, 4) + for i in tmp: + print(" 0x%x" %i, end="") + print("") + + print(">>> Read 4 bytes from [0x%x] = " %(0xffffffaa), end="") + tmp = mu.mem_read(0xffffffaa, 4) + for i in tmp: + print(" 0x%x" %i, end="") + print("") + except UcError as e: + print("ERROR: %s" % e) + + except UcError as e: + print("ERROR: %s" % e) + + +# Test X86 32 bit with IN/OUT instruction +def test_i386_inout(): + print("Emulate i386 code with IN/OUT instructions") + try: + # Initialize emulator in X86-32bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_32) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE32_INOUT) + + # initialize machine registers + mu.reg_write(X86_REG_EAX, 0x1234) + mu.reg_write(X86_REG_ECX, 0x6789) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # handle IN & OUT instruction + mu.hook_add(UC_HOOK_INSN, hook_in, None, X86_INS_IN) + mu.hook_add(UC_HOOK_INSN, hook_out, None, X86_INS_OUT) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE32_INOUT)) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + r_ecx = mu.reg_read(X86_REG_ECX) + r_eax = mu.reg_read(X86_REG_EAX) + print(">>> EAX = 0x%x" %r_eax) + print(">>> ECX = 0x%x" %r_ecx) + except UcError as e: + print("ERROR: %s" % e) + + +def test_x86_64(): + print("Emulate x86_64 code") + try: + # Initialize emulator in X86-64bit mode + mu = Uc(UC_ARCH_X86, UC_MODE_64) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, X86_CODE64) + + # initialize machine registers + mu.reg_write(X86_REG_RAX, 0x71f3029efd49d41d) + mu.reg_write(X86_REG_RBX, 0xd87b45277f133ddb) + mu.reg_write(X86_REG_RCX, 0xab40d1ffd8afc461) + mu.reg_write(X86_REG_RDX, 0x919317b4a733f01) + mu.reg_write(X86_REG_RSI, 0x4c24e753a17ea358) + mu.reg_write(X86_REG_RDI, 0xe509a57d2571ce96) + mu.reg_write(X86_REG_R8, 0xea5b108cc2b9ab1f) + mu.reg_write(X86_REG_R9, 0x19ec097c8eb618c1) + mu.reg_write(X86_REG_R10, 0xec45774f00c5f682) + mu.reg_write(X86_REG_R11, 0xe17e9dbec8c074aa) + mu.reg_write(X86_REG_R12, 0x80f86a8dc0f6d457) + mu.reg_write(X86_REG_R13, 0x48288ca5671c5492) + mu.reg_write(X86_REG_R14, 0x595f72f6e4017f6e) + mu.reg_write(X86_REG_R15, 0x1efd97aea331cccc) + + # setup stack + mu.reg_write(X86_REG_RSP, ADDRESS + 0x200000) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions in range [ADDRESS, ADDRESS+20] + mu.hook_add(UC_HOOK_CODE, hook_code, None, ADDRESS, ADDRESS+20) + + # tracing all memory READ & WRITE access + mu.hook_add(UC_HOOK_MEM_WRITE, hook_mem_access) + mu.hook_add(UC_HOOK_MEM_READ, hook_mem_access) + # actually you can also use READ_WRITE to trace all memory access + #mu.hook_add(UC_HOOK_MEM_READ_WRITE, hook_mem_access) + + try: + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE64)) + except UcError as e: + print("ERROR: %s" % e) + + # now print out some registers + print(">>> Emulation done. Below is the CPU context") + + rax = mu.reg_read(X86_REG_RAX) + rbx = mu.reg_read(X86_REG_RBX) + rcx = mu.reg_read(X86_REG_RCX) + rdx = mu.reg_read(X86_REG_RDX) + rsi = mu.reg_read(X86_REG_RSI) + rdi = mu.reg_read(X86_REG_RDI) + r8 = mu.reg_read(X86_REG_R8) + r9 = mu.reg_read(X86_REG_R9) + r10 = mu.reg_read(X86_REG_R10) + r11 = mu.reg_read(X86_REG_R11) + r12 = mu.reg_read(X86_REG_R12) + r13 = mu.reg_read(X86_REG_R13) + r14 = mu.reg_read(X86_REG_R14) + r15 = mu.reg_read(X86_REG_R15) + + print(">>> RAX = %x" %rax) + print(">>> RBX = %x" %rbx) + print(">>> RCX = %x" %rcx) + print(">>> RDX = %x" %rdx) + print(">>> RSI = %x" %rsi) + print(">>> RDI = %x" %rdi) + print(">>> R8 = %x" %r8) + print(">>> R9 = %x" %r9) + print(">>> R10 = %x" %r10) + print(">>> R11 = %x" %r11) + print(">>> R12 = %x" %r12) + print(">>> R13 = %x" %r13) + print(">>> R14 = %x" %r14) + print(">>> R15 = %x" %r15) + + #BUG + mu.emu_start(ADDRESS, ADDRESS + len(X86_CODE64)) + + except UcError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_i386() + print("=" * 20) + test_i386_loop() + print("=" * 20) + test_i386_invalid_mem_read() + print("=" * 20) + test_i386_invalid_mem_write() + print("=" * 20) + test_i386_inout() + print("=" * 20) + test_x86_64() diff --git a/bindings/python/setup.py b/bindings/python/setup.py new file mode 100755 index 00000000..66ea8ab0 --- /dev/null +++ b/bindings/python/setup.py @@ -0,0 +1,182 @@ +#!/usr/bin/env python +# Python binding for Unicorn engine. Nguyen Anh Quynh + +import glob +import os +import platform +import shutil +import stat +import sys + +from distutils import log +from distutils import dir_util +from distutils.command.build_clib import build_clib +from distutils.command.sdist import sdist +from distutils.core import setup +from distutils.sysconfig import get_python_lib + +# prebuilt libraries for Windows - for sdist +PATH_LIB64 = "prebuilt/win64/unicorn.dll" +PATH_LIB32 = "prebuilt/win32/unicorn.dll" + +# package name can be 'unicorn' or 'unicorn-windows' +PKG_NAME = 'unicorn' +if os.path.exists(PATH_LIB64) and os.path.exists(PATH_LIB32): + PKG_NAME = 'unicorn-windows' + +VERSION = '0.9' +SYSTEM = sys.platform + +# virtualenv breaks import, but get_python_lib() will work. +SITE_PACKAGES = os.path.join(get_python_lib(), "unicorn") +if "--user" in sys.argv: + try: + from site import getusersitepackages + SITE_PACKAGES = os.path.join(getusersitepackages(), "unicorn") + except ImportError: + pass + + +SETUP_DATA_FILES = [] + +# adapted from commit e504b81 of Nguyen Tan Cong +# Reference: https://docs.python.org/2/library/platform.html#cross-platform +is_64bits = sys.maxsize > 2**32 + +def copy_sources(): + """Copy the C sources into the source directory. + This rearranges the source files under the python distribution + directory. + """ + src = [] + + try: + dir_util.remove_tree("src/") + except (IOError, OSError): + pass + + dir_util.copy_tree("../../arch", "src/arch/") + dir_util.copy_tree("../../include", "src/include/") + + src.extend(glob.glob("../../*.[ch]")) + src.extend(glob.glob("../../*.mk")) + + src.extend(glob.glob("../../Makefile")) + src.extend(glob.glob("../../LICENSE*")) + src.extend(glob.glob("../../README")) + src.extend(glob.glob("../../*.TXT")) + src.extend(glob.glob("../../RELEASE_NOTES")) + src.extend(glob.glob("../../make.sh")) + src.extend(glob.glob("../../CMakeLists.txt")) + + for filename in src: + outpath = os.path.join("./src/", os.path.basename(filename)) + log.info("%s -> %s" % (filename, outpath)) + shutil.copy(filename, outpath) + + +class custom_sdist(sdist): + """Reshuffle files for distribution.""" + + def run(self): + # if prebuilt libraries are existent, then do not copy source + if os.path.exists(PATH_LIB64) and os.path.exists(PATH_LIB32): + return sdist.run(self) + copy_sources() + return sdist.run(self) + + +class custom_build_clib(build_clib): + """Customized build_clib command.""" + + def run(self): + log.info('running custom_build_clib') + build_clib.run(self) + + def finalize_options(self): + # We want build-clib to default to build-lib as defined by the "build" + # command. This is so the compiled library will be put in the right + # place along side the python code. + self.set_undefined_options('build', + ('build_lib', 'build_clib'), + ('build_temp', 'build_temp'), + ('compiler', 'compiler'), + ('debug', 'debug'), + ('force', 'force')) + + build_clib.finalize_options(self) + + def build_libraries(self, libraries): + if SYSTEM in ("win32", "cygwin"): + # if Windows prebuilt library is available, then include it + if is_64bits and os.path.exists(PATH_LIB64): + SETUP_DATA_FILES.append(PATH_LIB64) + return + elif os.path.exists(PATH_LIB32): + SETUP_DATA_FILES.append(PATH_LIB32) + return + + # build library from source if src/ is existent + if not os.path.exists('src'): + return + + try: + for (lib_name, build_info) in libraries: + log.info("building '%s' library", lib_name) + + os.chdir("src") + + # platform description refers at https://docs.python.org/2/library/sys.html#sys.platform + if SYSTEM == "cygwin": + os.chmod("make.sh", stat.S_IREAD|stat.S_IEXEC) + if is_64bits: + os.system("UNICORN_BUILD_CORE_ONLY=yes ./make.sh cygwin-mingw64") + else: + os.system("UNICORN_BUILD_CORE_ONLY=yes ./make.sh cygwin-mingw32") + SETUP_DATA_FILES.append("src/unicorn.dll") + else: # Unix + os.chmod("make.sh", stat.S_IREAD|stat.S_IEXEC) + os.system("UNICORN_BUILD_CORE_ONLY=yes ./make.sh") + if SYSTEM == "darwin": + SETUP_DATA_FILES.append("src/libunicorn.dylib") + else: # Non-OSX + SETUP_DATA_FILES.append("src/libunicorn.so") + + os.chdir("..") + except: + pass + + +def dummy_src(): + return [] + + +setup( + provides=['unicorn'], + packages=['unicorn'], + name=PKG_NAME, + version=VERSION, + author='Nguyen Anh Quynh', + author_email='aquynh@gmail.com', + description='Unicorn CPU emulator engine', + url='http://www.unicorn-engine.org', + classifiers=[ + 'License :: OSI Approved :: BSD License', + 'Programming Language :: Python :: 2', + 'Programming Language :: Python :: 3', + ], + requires=['ctypes'], + cmdclass=dict( + build_clib=custom_build_clib, + sdist=custom_sdist, + ), + + libraries=[( + 'unicorn', dict( + package='unicorn', + sources=dummy_src() + ), + )], + + data_files=[(SITE_PACKAGES, SETUP_DATA_FILES)], +) diff --git a/bindings/python/shellcode.py b/bindings/python/shellcode.py new file mode 100755 index 00000000..aa6e5272 --- /dev/null +++ b/bindings/python/shellcode.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python +# Sample code for X86 of Unicorn. Nguyen Anh Quynh + +from __future__ import print_function +from unicorn import * +from unicorn.x86_const import * + + +X86_CODE32 = b"\xeb\x19\x31\xc0\x31\xdb\x31\xd2\x31\xc9\xb0\x04\xb3\x01\x59\xb2\x05\xcd\x80\x31\xc0\xb0\x01\x31\xdb\xcd\x80\xe8\xe2\xff\xff\xff\x68\x65\x6c\x6c\x6f" + +X86_CODE32_SELF = b"\xeb\x1c\x5a\x89\xd6\x8b\x02\x66\x3d\xca\x7d\x75\x06\x66\x05\x03\x03\x89\x02\xfe\xc2\x3d\x41\x41\x41\x41\x75\xe9\xff\xe6\xe8\xdf\xff\xff\xff\x31\xd2\x6a\x0b\x58\x99\x52\x68\x2f\x2f\x73\x68\x68\x2f\x62\x69\x6e\x89\xe3\x52\x53\x89\xe1\xca\x7d\x41\x41\x41\x41\x41\x41\x41\x41" + +X86_CODE64 = "\x48\x31\xff\x57\x57\x5e\x5a\x48\xbf\x2f\x2f\x62\x69\x6e\x2f\x73\x68\x48\xc1\xef\x08\x57\x54\x5f\x6a\x3b\x58\x0f\x05" + +# memory address where emulation starts +ADDRESS = 0x1000000 + + +# callback for tracing instructions +def hook_code(uc, address, size, user_data): + print(">>> Tracing instruction at 0x%x, instruction size = 0x%x" %(address, size)) + # read this instruction code from memory + tmp = uc.mem_read(address, size) + print(">>> Instruction code at [0x%x] =" %(address), end="") + for i in tmp: + print(" %02x" %i, end="") + print("") + + +# callback for tracing basic blocks +def hook_block(uc, address, size, user_data): + print(">>> Tracing basic block at 0x%x, block size = 0x%x" %(address, size)) + + +# callback for tracing Linux interrupt +def hook_intr(uc, intno, user_data): + # only handle Linux syscall + if intno != 0x80: + print("got interrupt %x ???" %intno); + uc.emu_stop() + return + + eax = uc.reg_read(X86_REG_EAX) + eip = uc.reg_read(X86_REG_EIP) + if eax == 1: # sys_exit + print(">>> 0x%x: interrupt 0x%x, EAX = 0x%x" %(eip, intno, eax)) + uc.emu_stop() + elif eax == 4: # sys_write + # ECX = buffer address + ecx = uc.reg_read(X86_REG_ECX) + # EDX = buffer size + edx = uc.reg_read(X86_REG_EDX) + + try: + buf = uc.mem_read(ecx, edx) + print(">>> 0x%x: interrupt 0x%x, SYS_WRITE. buffer = 0x%x, size = %u, content = " \ + %(eip, intno, ecx, edx), end="") + for i in buf: + print("%c" %i, end="") + print("") + except UcError as e: + print(">>> 0x%x: interrupt 0x%x, SYS_WRITE. buffer = 0x%x, size = %u, content = \n" \ + %(eip, intno, ecx, edx)) + else: + print(">>> 0x%x: interrupt 0x%x, EAX = 0x%x" %(eip, intno, eax)) + + +# Test X86 32 bit +def test_i386(mode, code): + print("Emulate x86 code") + try: + # Initialize emulator + mu = Uc(UC_ARCH_X86, mode) + + # map 2MB memory for this emulation + mu.mem_map(ADDRESS, 2 * 1024 * 1024) + + # write machine code to be emulated to memory + mu.mem_write(ADDRESS, code) + + # initialize stack + mu.reg_write(X86_REG_ESP, ADDRESS + 0x200000) + + # tracing all basic blocks with customized callback + mu.hook_add(UC_HOOK_BLOCK, hook_block) + + # tracing all instructions with customized callback + mu.hook_add(UC_HOOK_CODE, hook_code) + + # handle interrupt ourself + mu.hook_add(UC_HOOK_INTR, hook_intr) + + # emulate machine code in infinite time + mu.emu_start(ADDRESS, ADDRESS + len(code)) + + # now print out some registers + print(">>> Emulation done") + + except UcError as e: + print("ERROR: %s" % e) + + + +if __name__ == '__main__': + #test_i386(UC_MODE_32, X86_CODE32_SELF) + #print("=" * 20) + #test_i386(UC_MODE_32, X86_CODE32) + #print("=" * 20) + test_i386(UC_MODE_64, X86_CODE64) # FIXME + diff --git a/bindings/python/unicorn/__init__.py b/bindings/python/unicorn/__init__.py new file mode 100644 index 00000000..4bc8fbd6 --- /dev/null +++ b/bindings/python/unicorn/__init__.py @@ -0,0 +1,458 @@ +# Unicorn Python bindings, by Nguyen Anh Quynnh +import sys +_python2 = sys.version_info[0] < 3 +if _python2: + range = xrange +from . import arm_const, arm64_const, mips_const, sparc_const, m68k_const, x86_const + +__all__ = [ + 'Uc', + + 'uc_version', + 'uc_support', + 'version_bind', + 'debug', + + 'UC_API_MAJOR', + 'UC_API_MINOR', + + 'UC_ARCH_ARM', + 'UC_ARCH_ARM64', + 'UC_ARCH_MIPS', + 'UC_ARCH_X86', + 'UC_ARCH_SPARC', + 'UC_ARCH_M68K', + 'UC_ARCH_ALL', + + 'UC_MODE_LITTLE_ENDIAN', + 'UC_MODE_BIG_ENDIAN', + 'UC_MODE_16', + 'UC_MODE_32', + 'UC_MODE_64', + 'UC_MODE_ARM', + 'UC_MODE_THUMB', + 'UC_MODE_MCLASS', + 'UC_MODE_MICRO', + 'UC_MODE_MIPS3', + 'UC_MODE_MIPS32R6', + 'UC_MODE_MIPSGP64', + 'UC_MODE_V8', + 'UC_MODE_V9', + 'UC_MODE_MIPS32', + 'UC_MODE_MIPS64', + + 'UC_ERR_OK', + 'UC_ERR_OOM', + 'UC_ERR_ARCH', + 'UC_ERR_HANDLE', + 'UC_ERR_UCH', + 'UC_ERR_MODE', + 'UC_ERR_VERSION', + 'UC_ERR_MEM_READ', + 'UC_ERR_MEM_WRITE', + 'UC_ERR_CODE_INVALID', + 'UC_ERR_HOOK', + 'UC_ERR_INSN_INVALID', + + 'UC_HOOK_INTR', + 'UC_HOOK_INSN', + 'UC_HOOK_CODE', + 'UC_HOOK_BLOCK', + 'UC_HOOK_MEM_INVALID', + 'UC_HOOK_MEM_READ', + 'UC_HOOK_MEM_WRITE', + 'UC_HOOK_MEM_READ_WRITE', + + 'UC_MEM_READ', + 'UC_MEM_WRITE', + 'UC_MEM_READ_WRITE', + + 'UC_SECOND_SCALE', + 'UC_MILISECOND_SCALE', + + 'UcError', +] + +# Unicorn C interface + +# API version +UC_API_MAJOR = 0 +UC_API_MINOR = 9 + +# Architectures +UC_ARCH_ARM = 1 +UC_ARCH_ARM64 = 2 +UC_ARCH_MIPS = 3 +UC_ARCH_X86 = 4 +UC_ARCH_PPC = 5 +UC_ARCH_SPARC = 6 +UC_ARCH_M68K = 7 +UC_ARCH_MAX = 8 +UC_ARCH_ALL = 0xFFFF + +# Hardware modes +UC_MODE_LITTLE_ENDIAN = 0 # little-endian mode (default mode) +UC_MODE_ARM = 0 # ARM mode +UC_MODE_16 = (1 << 1) # 16-bit mode (for X86) +UC_MODE_32 = (1 << 2) # 32-bit mode (for X86) +UC_MODE_64 = (1 << 3) # 64-bit mode (for X86, PPC) +UC_MODE_THUMB = (1 << 4) # ARM's Thumb mode, including Thumb-2 +UC_MODE_MCLASS = (1 << 5) # ARM's Cortex-M series +UC_MODE_V8 = (1 << 6) # ARMv8 A32 encodings for ARM +UC_MODE_MICRO = (1 << 4) # MicroMips mode (MIPS architecture) +UC_MODE_MIPS3 = (1 << 5) # Mips III ISA +UC_MODE_MIPS32R6 = (1 << 6) # Mips32r6 ISA +UC_MODE_MIPSGP64 = (1 << 7) # General Purpose Registers are 64-bit wide (MIPS arch) +UC_MODE_V9 = (1 << 4) # Sparc V9 mode (for Sparc) +UC_MODE_BIG_ENDIAN = (1 << 31) # big-endian mode +UC_MODE_MIPS32 = UC_MODE_32 # Mips32 ISA +UC_MODE_MIPS64 = UC_MODE_64 # Mips64 ISA + + +# Unicorn error type +UC_ERR_OK = 0 # No error: everything was fine +UC_ERR_OOM = 1 # Out-Of-Memory error: uc_open(), uc_emulate() +UC_ERR_ARCH = 2 # Unsupported architecture: uc_open() +UC_ERR_HANDLE = 3 # Invalid handle +UC_ERR_UCH = 4 # Invalid handle (uch) +UC_ERR_MODE = 5 # Invalid/unsupported mode: uc_open() +UC_ERR_VERSION = 6 # Unsupported version (bindings) +UC_ERR_MEM_READ = 7 # Quit emulation due to invalid memory READ: uc_emu_start() +UC_ERR_MEM_WRITE = 8 # Quit emulation due to invalid memory WRITE: uc_emu_start() +UC_ERR_CODE_INVALID = 9 # Quit emulation due to invalid code address: uc_emu_start() +UC_ERR_HOOK = 10 # Invalid hook type: uc_hook_add() +UC_ERR_INSN_INVALID = 11 # Invalid instruction + + +# All type of hooks for uc_hook_add() API. +UC_HOOK_INTR = 32 # Hook all interrupt events +UC_HOOK_INSN = 33 # Hook a particular instruction +UC_HOOK_CODE = 34 # Hook a range of code +UC_HOOK_BLOCK = 35 # Hook basic blocks +UC_HOOK_MEM_INVALID = 36 # Hook for all invalid memory access events +UC_HOOK_MEM_READ = 37 # Hook all memory read events. +UC_HOOK_MEM_WRITE = 38 # Hook all memory write events. +UC_HOOK_MEM_READ_WRITE = 39 # Hook all memory accesses (either READ or WRITE). + + +# All type of memory accesses for UC_HOOK_MEM_* +UC_MEM_READ = 16 # Memory is read from +UC_MEM_WRITE = 17 # Memory is written to +UC_MEM_READ_WRITE = 18 # Memory is accessed (either READ or WRITE) + + +# Time scales to calculate timeout on microsecond unit +# This is for Uc.emu_start() +UC_SECOND_SCALE = 1000000 # 1 second = 1000,000 microseconds +UC_MILISECOND_SCALE = 1000 # 1 milisecond = 1000 nanoseconds + + +import ctypes, ctypes.util, sys +from os.path import split, join, dirname +import distutils.sysconfig + + +import inspect +if not hasattr(sys.modules[__name__], '__file__'): + __file__ = inspect.getfile(inspect.currentframe()) + +_lib_path = split(__file__)[0] +_all_libs = ['unicorn.dll', 'libunicorn.so', 'libunicorn.dylib'] +_found = False + +for _lib in _all_libs: + try: + _lib_file = join(_lib_path, _lib) + # print "Trying to load:", _lib_file + _uc = ctypes.cdll.LoadLibrary(_lib_file) + _found = True + break + except OSError: + pass + +if _found == False: + # try loading from default paths + for _lib in _all_libs: + try: + _uc = ctypes.cdll.LoadLibrary(_lib) + _found = True + break + except OSError: + pass + +if _found == False: + # last try: loading from python lib directory + _lib_path = distutils.sysconfig.get_python_lib() + for _lib in _all_libs: + try: + _lib_file = join(_lib_path, 'unicorn', _lib) + # print "Trying to load:", _lib_file + _uc = ctypes.cdll.LoadLibrary(_lib_file) + _found = True + break + except OSError: + pass + if _found == False: + raise ImportError("ERROR: fail to load the dynamic library.") + + +# setup all the function prototype +def _setup_prototype(lib, fname, restype, *argtypes): + getattr(lib, fname).restype = restype + getattr(lib, fname).argtypes = argtypes + +_setup_prototype(_uc, "uc_version", ctypes.c_int, ctypes.POINTER(ctypes.c_int), ctypes.POINTER(ctypes.c_int)) +_setup_prototype(_uc, "uc_support", ctypes.c_bool, ctypes.c_int) +_setup_prototype(_uc, "uc_open", ctypes.c_int, ctypes.c_uint, ctypes.c_uint, ctypes.POINTER(ctypes.c_size_t)) +_setup_prototype(_uc, "uc_close", ctypes.c_int, ctypes.POINTER(ctypes.c_size_t)) +_setup_prototype(_uc, "uc_strerror", ctypes.c_char_p, ctypes.c_int) +_setup_prototype(_uc, "uc_errno", ctypes.c_int, ctypes.c_size_t) +_setup_prototype(_uc, "uc_reg_read", ctypes.c_int, ctypes.c_size_t, ctypes.c_int, ctypes.c_void_p) +_setup_prototype(_uc, "uc_reg_write", ctypes.c_int, ctypes.c_size_t, ctypes.c_int, ctypes.c_void_p) +_setup_prototype(_uc, "uc_mem_read", ctypes.c_int, ctypes.c_size_t, ctypes.c_uint64, ctypes.POINTER(ctypes.c_char), ctypes.c_size_t) +_setup_prototype(_uc, "uc_mem_write", ctypes.c_int, ctypes.c_size_t, ctypes.c_uint64, ctypes.POINTER(ctypes.c_char), ctypes.c_size_t) +_setup_prototype(_uc, "uc_emu_start", ctypes.c_int, ctypes.c_size_t, ctypes.c_uint64, ctypes.c_uint64, ctypes.c_uint64, ctypes.c_size_t) +_setup_prototype(_uc, "uc_emu_stop", ctypes.c_int, ctypes.c_size_t) +_setup_prototype(_uc, "uc_hook_del", ctypes.c_int, ctypes.c_size_t, ctypes.POINTER(ctypes.c_size_t)) +_setup_prototype(_uc, "uc_mem_map", ctypes.c_int, ctypes.c_size_t, ctypes.c_uint64, ctypes.c_size_t) + +# uc_hook_add is special due to variable number of arguments +_uc.uc_hook_add = getattr(_uc, "uc_hook_add") +_uc.uc_hook_add.restype = ctypes.c_int + +UC_HOOK_CODE_CB = ctypes.CFUNCTYPE(None, ctypes.c_size_t, ctypes.c_uint64, ctypes.c_size_t, ctypes.c_void_p) +UC_HOOK_MEM_INVALID_CB = ctypes.CFUNCTYPE(ctypes.c_bool, ctypes.c_size_t, ctypes.c_int, \ + ctypes.c_uint64, ctypes.c_int, ctypes.c_int64, ctypes.c_void_p) +UC_HOOK_MEM_ACCESS_CB = ctypes.CFUNCTYPE(None, ctypes.c_size_t, ctypes.c_int, \ + ctypes.c_uint64, ctypes.c_int, ctypes.c_int64, ctypes.c_void_p) +UC_HOOK_INTR_CB = ctypes.CFUNCTYPE(None, ctypes.c_size_t, ctypes.c_uint32, \ + ctypes.c_void_p) +UC_HOOK_INSN_IN_CB = ctypes.CFUNCTYPE(ctypes.c_uint32, ctypes.c_size_t, ctypes.c_uint32, \ + ctypes.c_int, ctypes.c_void_p) +UC_HOOK_INSN_OUT_CB = ctypes.CFUNCTYPE(None, ctypes.c_size_t, ctypes.c_uint32, \ + ctypes.c_int, ctypes.c_uint32, ctypes.c_void_p) + + +# access to error code via @errno of UcError +class UcError(Exception): + def __init__(self, errno): + self.errno = errno + + def __str__(self): + return _uc.uc_strerror(self.errno) + + +# return the core's version +def uc_version(): + major = ctypes.c_int() + minor = ctypes.c_int() + combined = _uc.uc_version(ctypes.byref(major), ctypes.byref(minor)) + return (major.value, minor.value, combined) + + +# return the binding's version +def version_bind(): + return (UC_API_MAJOR, UC_API_MINOR, (UC_API_MAJOR << 8) + UC_API_MINOR) + + +# check to see if this engine supports a particular arch +def uc_support(query): + return _uc.uc_support(query) + + +class Uc(object): + def __init__(self, arch, mode): + # verify version compatibility with the core before doing anything + (major, minor, _combined) = uc_version() + if major != UC_API_MAJOR or minor != UC_API_MINOR: + self._uch = None + # our binding version is different from the core's API version + raise UcError(UC_ERR_VERSION) + + self._arch, self._mode = arch, mode + self._uch = ctypes.c_size_t() + status = _uc.uc_open(arch, mode, ctypes.byref(self._uch)) + if status != UC_ERR_OK: + self._uch = None + raise UcError(status) + # internal mapping table to save callback & userdata + self._callbacks = {} + self._callback_count = 0 + + + # destructor to be called automatically when object is destroyed. + def __del__(self): + if self._uch: + try: + status = _uc.uc_close(ctypes.byref(self._uch)) + if status != UC_ERR_OK: + raise UcError(status) + except: # _uc might be pulled from under our feet + pass + + + # emulate from @begin, and stop when reaching address @until + def emu_start(self, begin, until, timeout=0, count=0): + status = _uc.uc_emu_start(self._uch, begin, until, timeout, count) + if status != UC_ERR_OK: + raise UcError(status) + + + # stop emulation + def emu_stop(self): + status = _uc.uc_emu_stop(self._uch) + if status != UC_ERR_OK: + raise UcError(status) + + + # return the value of a register + def reg_read(self, reg_id): + # read to 64bit number to be safe + reg = ctypes.c_int64(0) + status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg)) + if status != UC_ERR_OK: + raise UcError(status) + return reg.value + + + # write to a register + def reg_write(self, reg_id, value): + # convert to 64bit number to be safe + reg = ctypes.c_int64(value) + status = _uc.uc_reg_write(self._uch, reg_id, ctypes.byref(reg)) + if status != UC_ERR_OK: + raise UcError(status) + + + # read data from memory + def mem_read(self, address, size): + data = ctypes.create_string_buffer(size) + status = _uc.uc_mem_read(self._uch, address, data, size) + if status != UC_ERR_OK: + raise UcError(status) + return bytearray(data) + + + # write to memory + def mem_write(self, address, data): + status = _uc.uc_mem_write(self._uch, address, data, len(data)) + if status != UC_ERR_OK: + raise UcError(status) + + + # map a range of memory + def mem_map(self, address, size): + status = _uc.uc_mem_map(self._uch, address, size) + if status != UC_ERR_OK: + raise UcError(status) + + + def _hookcode_cb(self, handle, address, size, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + cb(self, address, size, data) + + + def _hook_mem_invalid_cb(self, handle, access, address, size, value, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + return cb(self, access, address, size, value, data) + + + def _hook_mem_access_cb(self, handle, access, address, size, value, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + cb(self, access, address, size, value, data) + + + def _hook_intr_cb(self, handle, intno, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + cb(self, intno, data) + + + def _hook_insn_in_cb(self, handle, port, size, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + return cb(self, port, size, data) + + + def _hook_insn_out_cb(self, handle, port, size, value, user_data): + # call user's callback with self object + (cb, data) = self._callbacks[user_data] + cb(self, port, size, value, data) + + + # add a hook + def hook_add(self, htype, callback, user_data=None, arg1=1, arg2=0): + _h2 = ctypes.c_size_t() + + # save callback & user_data + self._callback_count += 1 + self._callbacks[self._callback_count] = (callback, user_data) + + if htype in (UC_HOOK_BLOCK, UC_HOOK_CODE): + begin = ctypes.c_uint64(arg1) + end = ctypes.c_uint64(arg2) + # set callback with wrapper, so it can be called + # with this object as param + cb = ctypes.cast(UC_HOOK_CODE_CB(self._hookcode_cb), UC_HOOK_CODE_CB) + status = _uc.uc_hook_add(self._uch, ctypes.byref(_h2), htype, cb, \ + ctypes.cast(self._callback_count, ctypes.c_void_p), begin, end) + elif htype == UC_HOOK_MEM_INVALID: + cb = ctypes.cast(UC_HOOK_MEM_INVALID_CB(self._hook_mem_invalid_cb), UC_HOOK_MEM_INVALID_CB) + status = _uc.uc_hook_add(self._uch, ctypes.byref(_h2), htype, \ + cb, ctypes.cast(self._callback_count, ctypes.c_void_p)) + elif htype in (UC_HOOK_MEM_READ, UC_HOOK_MEM_WRITE, UC_HOOK_MEM_READ_WRITE): + cb = ctypes.cast(UC_HOOK_MEM_ACCESS_CB(self._hook_mem_access_cb), UC_HOOK_MEM_ACCESS_CB) + status = _uc.uc_hook_add(self._uch, ctypes.byref(_h2), htype, \ + cb, ctypes.cast(self._callback_count, ctypes.c_void_p)) + elif htype == UC_HOOK_INSN: + insn = ctypes.c_int(arg1) + if arg1 == x86_const.X86_INS_IN: # IN instruction + cb = ctypes.cast(UC_HOOK_INSN_IN_CB(self._hook_insn_in_cb), UC_HOOK_INSN_IN_CB) + if arg1 == x86_const.X86_INS_OUT: # OUT instruction + cb = ctypes.cast(UC_HOOK_INSN_OUT_CB(self._hook_insn_out_cb), UC_HOOK_INSN_OUT_CB) + status = _uc.uc_hook_add(self._uch, ctypes.byref(_h2), htype, \ + cb, ctypes.cast(self._callback_count, ctypes.c_void_p), insn) + elif htype == UC_HOOK_INTR: + cb = ctypes.cast(UC_HOOK_INTR_CB(self._hook_intr_cb), UC_HOOK_INTR_CB) + status = _uc.uc_hook_add(self._uch, ctypes.byref(_h2), htype, \ + cb, ctypes.cast(self._callback_count, ctypes.c_void_p)) + + if status != UC_ERR_OK: + raise UcError(status) + + return _h2.value + + + # delete a hook + def hook_del(self, h): + _h = ctypes.c_size_t(h) + status = _uc.uc_hook_del(self._uch, ctypes.byref(_h)) + if status != UC_ERR_OK: + raise UcError(status) + h = 0 + + +# print out debugging info +def debug(): + archs = { "arm": UC_ARCH_ARM, "arm64": UC_ARCH_ARM64, \ + "mips": UC_ARCH_MIPS, "sparc": UC_ARCH_SPARC, \ + "m68k": UC_ARCH_M68K } + + all_archs = "" + keys = archs.keys() + keys.sort() + for k in keys: + if uc_support(archs[k]): + all_archs += "-%s" % k + + if uc_support(UC_ARCH_X86): + all_archs += "-x86" + if uc_support(UC_SUPPORT_X86_REDUCE): + all_archs += "_reduce" + + (major, minor, _combined) = uc_version() + + return "python-%s-c%u.%u-b%u.%u" % (all_archs, major, minor, UC_API_MAJOR, UC_API_MINOR) diff --git a/bindings/python/unicorn/arm64_const.py b/bindings/python/unicorn/arm64_const.py new file mode 100644 index 00000000..96c6094e --- /dev/null +++ b/bindings/python/unicorn/arm64_const.py @@ -0,0 +1,274 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.py] + +# ARM64 registers + +ARM64_REG_INVALID = 0 +ARM64_REG_X29 = 1 +ARM64_REG_X30 = 2 +ARM64_REG_NZCV = 3 +ARM64_REG_SP = 4 +ARM64_REG_WSP = 5 +ARM64_REG_WZR = 6 +ARM64_REG_XZR = 7 +ARM64_REG_B0 = 8 +ARM64_REG_B1 = 9 +ARM64_REG_B2 = 10 +ARM64_REG_B3 = 11 +ARM64_REG_B4 = 12 +ARM64_REG_B5 = 13 +ARM64_REG_B6 = 14 +ARM64_REG_B7 = 15 +ARM64_REG_B8 = 16 +ARM64_REG_B9 = 17 +ARM64_REG_B10 = 18 +ARM64_REG_B11 = 19 +ARM64_REG_B12 = 20 +ARM64_REG_B13 = 21 +ARM64_REG_B14 = 22 +ARM64_REG_B15 = 23 +ARM64_REG_B16 = 24 +ARM64_REG_B17 = 25 +ARM64_REG_B18 = 26 +ARM64_REG_B19 = 27 +ARM64_REG_B20 = 28 +ARM64_REG_B21 = 29 +ARM64_REG_B22 = 30 +ARM64_REG_B23 = 31 +ARM64_REG_B24 = 32 +ARM64_REG_B25 = 33 +ARM64_REG_B26 = 34 +ARM64_REG_B27 = 35 +ARM64_REG_B28 = 36 +ARM64_REG_B29 = 37 +ARM64_REG_B30 = 38 +ARM64_REG_B31 = 39 +ARM64_REG_D0 = 40 +ARM64_REG_D1 = 41 +ARM64_REG_D2 = 42 +ARM64_REG_D3 = 43 +ARM64_REG_D4 = 44 +ARM64_REG_D5 = 45 +ARM64_REG_D6 = 46 +ARM64_REG_D7 = 47 +ARM64_REG_D8 = 48 +ARM64_REG_D9 = 49 +ARM64_REG_D10 = 50 +ARM64_REG_D11 = 51 +ARM64_REG_D12 = 52 +ARM64_REG_D13 = 53 +ARM64_REG_D14 = 54 +ARM64_REG_D15 = 55 +ARM64_REG_D16 = 56 +ARM64_REG_D17 = 57 +ARM64_REG_D18 = 58 +ARM64_REG_D19 = 59 +ARM64_REG_D20 = 60 +ARM64_REG_D21 = 61 +ARM64_REG_D22 = 62 +ARM64_REG_D23 = 63 +ARM64_REG_D24 = 64 +ARM64_REG_D25 = 65 +ARM64_REG_D26 = 66 +ARM64_REG_D27 = 67 +ARM64_REG_D28 = 68 +ARM64_REG_D29 = 69 +ARM64_REG_D30 = 70 +ARM64_REG_D31 = 71 +ARM64_REG_H0 = 72 +ARM64_REG_H1 = 73 +ARM64_REG_H2 = 74 +ARM64_REG_H3 = 75 +ARM64_REG_H4 = 76 +ARM64_REG_H5 = 77 +ARM64_REG_H6 = 78 +ARM64_REG_H7 = 79 +ARM64_REG_H8 = 80 +ARM64_REG_H9 = 81 +ARM64_REG_H10 = 82 +ARM64_REG_H11 = 83 +ARM64_REG_H12 = 84 +ARM64_REG_H13 = 85 +ARM64_REG_H14 = 86 +ARM64_REG_H15 = 87 +ARM64_REG_H16 = 88 +ARM64_REG_H17 = 89 +ARM64_REG_H18 = 90 +ARM64_REG_H19 = 91 +ARM64_REG_H20 = 92 +ARM64_REG_H21 = 93 +ARM64_REG_H22 = 94 +ARM64_REG_H23 = 95 +ARM64_REG_H24 = 96 +ARM64_REG_H25 = 97 +ARM64_REG_H26 = 98 +ARM64_REG_H27 = 99 +ARM64_REG_H28 = 100 +ARM64_REG_H29 = 101 +ARM64_REG_H30 = 102 +ARM64_REG_H31 = 103 +ARM64_REG_Q0 = 104 +ARM64_REG_Q1 = 105 +ARM64_REG_Q2 = 106 +ARM64_REG_Q3 = 107 +ARM64_REG_Q4 = 108 +ARM64_REG_Q5 = 109 +ARM64_REG_Q6 = 110 +ARM64_REG_Q7 = 111 +ARM64_REG_Q8 = 112 +ARM64_REG_Q9 = 113 +ARM64_REG_Q10 = 114 +ARM64_REG_Q11 = 115 +ARM64_REG_Q12 = 116 +ARM64_REG_Q13 = 117 +ARM64_REG_Q14 = 118 +ARM64_REG_Q15 = 119 +ARM64_REG_Q16 = 120 +ARM64_REG_Q17 = 121 +ARM64_REG_Q18 = 122 +ARM64_REG_Q19 = 123 +ARM64_REG_Q20 = 124 +ARM64_REG_Q21 = 125 +ARM64_REG_Q22 = 126 +ARM64_REG_Q23 = 127 +ARM64_REG_Q24 = 128 +ARM64_REG_Q25 = 129 +ARM64_REG_Q26 = 130 +ARM64_REG_Q27 = 131 +ARM64_REG_Q28 = 132 +ARM64_REG_Q29 = 133 +ARM64_REG_Q30 = 134 +ARM64_REG_Q31 = 135 +ARM64_REG_S0 = 136 +ARM64_REG_S1 = 137 +ARM64_REG_S2 = 138 +ARM64_REG_S3 = 139 +ARM64_REG_S4 = 140 +ARM64_REG_S5 = 141 +ARM64_REG_S6 = 142 +ARM64_REG_S7 = 143 +ARM64_REG_S8 = 144 +ARM64_REG_S9 = 145 +ARM64_REG_S10 = 146 +ARM64_REG_S11 = 147 +ARM64_REG_S12 = 148 +ARM64_REG_S13 = 149 +ARM64_REG_S14 = 150 +ARM64_REG_S15 = 151 +ARM64_REG_S16 = 152 +ARM64_REG_S17 = 153 +ARM64_REG_S18 = 154 +ARM64_REG_S19 = 155 +ARM64_REG_S20 = 156 +ARM64_REG_S21 = 157 +ARM64_REG_S22 = 158 +ARM64_REG_S23 = 159 +ARM64_REG_S24 = 160 +ARM64_REG_S25 = 161 +ARM64_REG_S26 = 162 +ARM64_REG_S27 = 163 +ARM64_REG_S28 = 164 +ARM64_REG_S29 = 165 +ARM64_REG_S30 = 166 +ARM64_REG_S31 = 167 +ARM64_REG_W0 = 168 +ARM64_REG_W1 = 169 +ARM64_REG_W2 = 170 +ARM64_REG_W3 = 171 +ARM64_REG_W4 = 172 +ARM64_REG_W5 = 173 +ARM64_REG_W6 = 174 +ARM64_REG_W7 = 175 +ARM64_REG_W8 = 176 +ARM64_REG_W9 = 177 +ARM64_REG_W10 = 178 +ARM64_REG_W11 = 179 +ARM64_REG_W12 = 180 +ARM64_REG_W13 = 181 +ARM64_REG_W14 = 182 +ARM64_REG_W15 = 183 +ARM64_REG_W16 = 184 +ARM64_REG_W17 = 185 +ARM64_REG_W18 = 186 +ARM64_REG_W19 = 187 +ARM64_REG_W20 = 188 +ARM64_REG_W21 = 189 +ARM64_REG_W22 = 190 +ARM64_REG_W23 = 191 +ARM64_REG_W24 = 192 +ARM64_REG_W25 = 193 +ARM64_REG_W26 = 194 +ARM64_REG_W27 = 195 +ARM64_REG_W28 = 196 +ARM64_REG_W29 = 197 +ARM64_REG_W30 = 198 +ARM64_REG_X0 = 199 +ARM64_REG_X1 = 200 +ARM64_REG_X2 = 201 +ARM64_REG_X3 = 202 +ARM64_REG_X4 = 203 +ARM64_REG_X5 = 204 +ARM64_REG_X6 = 205 +ARM64_REG_X7 = 206 +ARM64_REG_X8 = 207 +ARM64_REG_X9 = 208 +ARM64_REG_X10 = 209 +ARM64_REG_X11 = 210 +ARM64_REG_X12 = 211 +ARM64_REG_X13 = 212 +ARM64_REG_X14 = 213 +ARM64_REG_X15 = 214 +ARM64_REG_X16 = 215 +ARM64_REG_X17 = 216 +ARM64_REG_X18 = 217 +ARM64_REG_X19 = 218 +ARM64_REG_X20 = 219 +ARM64_REG_X21 = 220 +ARM64_REG_X22 = 221 +ARM64_REG_X23 = 222 +ARM64_REG_X24 = 223 +ARM64_REG_X25 = 224 +ARM64_REG_X26 = 225 +ARM64_REG_X27 = 226 +ARM64_REG_X28 = 227 +ARM64_REG_V0 = 228 +ARM64_REG_V1 = 229 +ARM64_REG_V2 = 230 +ARM64_REG_V3 = 231 +ARM64_REG_V4 = 232 +ARM64_REG_V5 = 233 +ARM64_REG_V6 = 234 +ARM64_REG_V7 = 235 +ARM64_REG_V8 = 236 +ARM64_REG_V9 = 237 +ARM64_REG_V10 = 238 +ARM64_REG_V11 = 239 +ARM64_REG_V12 = 240 +ARM64_REG_V13 = 241 +ARM64_REG_V14 = 242 +ARM64_REG_V15 = 243 +ARM64_REG_V16 = 244 +ARM64_REG_V17 = 245 +ARM64_REG_V18 = 246 +ARM64_REG_V19 = 247 +ARM64_REG_V20 = 248 +ARM64_REG_V21 = 249 +ARM64_REG_V22 = 250 +ARM64_REG_V23 = 251 +ARM64_REG_V24 = 252 +ARM64_REG_V25 = 253 +ARM64_REG_V26 = 254 +ARM64_REG_V27 = 255 +ARM64_REG_V28 = 256 +ARM64_REG_V29 = 257 +ARM64_REG_V30 = 258 +ARM64_REG_V31 = 259 + +# pseudo registers +ARM64_REG_PC = 260 +ARM64_REG_ENDING = 261 + +# alias registers +ARM64_REG_IP1 = ARM64_REG_X16 +ARM64_REG_IP0 = ARM64_REG_X17 +ARM64_REG_FP = ARM64_REG_X29 +ARM64_REG_LR = ARM64_REG_X30 diff --git a/bindings/python/unicorn/arm_const.py b/bindings/python/unicorn/arm_const.py new file mode 100644 index 00000000..3be17bfe --- /dev/null +++ b/bindings/python/unicorn/arm_const.py @@ -0,0 +1,125 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.py] + +# ARM registers + +ARM_REG_INVALID = 0 +ARM_REG_APSR = 1 +ARM_REG_APSR_NZCV = 2 +ARM_REG_CPSR = 3 +ARM_REG_FPEXC = 4 +ARM_REG_FPINST = 5 +ARM_REG_FPSCR = 6 +ARM_REG_FPSCR_NZCV = 7 +ARM_REG_FPSID = 8 +ARM_REG_ITSTATE = 9 +ARM_REG_LR = 10 +ARM_REG_PC = 11 +ARM_REG_SP = 12 +ARM_REG_SPSR = 13 +ARM_REG_D0 = 14 +ARM_REG_D1 = 15 +ARM_REG_D2 = 16 +ARM_REG_D3 = 17 +ARM_REG_D4 = 18 +ARM_REG_D5 = 19 +ARM_REG_D6 = 20 +ARM_REG_D7 = 21 +ARM_REG_D8 = 22 +ARM_REG_D9 = 23 +ARM_REG_D10 = 24 +ARM_REG_D11 = 25 +ARM_REG_D12 = 26 +ARM_REG_D13 = 27 +ARM_REG_D14 = 28 +ARM_REG_D15 = 29 +ARM_REG_D16 = 30 +ARM_REG_D17 = 31 +ARM_REG_D18 = 32 +ARM_REG_D19 = 33 +ARM_REG_D20 = 34 +ARM_REG_D21 = 35 +ARM_REG_D22 = 36 +ARM_REG_D23 = 37 +ARM_REG_D24 = 38 +ARM_REG_D25 = 39 +ARM_REG_D26 = 40 +ARM_REG_D27 = 41 +ARM_REG_D28 = 42 +ARM_REG_D29 = 43 +ARM_REG_D30 = 44 +ARM_REG_D31 = 45 +ARM_REG_FPINST2 = 46 +ARM_REG_MVFR0 = 47 +ARM_REG_MVFR1 = 48 +ARM_REG_MVFR2 = 49 +ARM_REG_Q0 = 50 +ARM_REG_Q1 = 51 +ARM_REG_Q2 = 52 +ARM_REG_Q3 = 53 +ARM_REG_Q4 = 54 +ARM_REG_Q5 = 55 +ARM_REG_Q6 = 56 +ARM_REG_Q7 = 57 +ARM_REG_Q8 = 58 +ARM_REG_Q9 = 59 +ARM_REG_Q10 = 60 +ARM_REG_Q11 = 61 +ARM_REG_Q12 = 62 +ARM_REG_Q13 = 63 +ARM_REG_Q14 = 64 +ARM_REG_Q15 = 65 +ARM_REG_R0 = 66 +ARM_REG_R1 = 67 +ARM_REG_R2 = 68 +ARM_REG_R3 = 69 +ARM_REG_R4 = 70 +ARM_REG_R5 = 71 +ARM_REG_R6 = 72 +ARM_REG_R7 = 73 +ARM_REG_R8 = 74 +ARM_REG_R9 = 75 +ARM_REG_R10 = 76 +ARM_REG_R11 = 77 +ARM_REG_R12 = 78 +ARM_REG_S0 = 79 +ARM_REG_S1 = 80 +ARM_REG_S2 = 81 +ARM_REG_S3 = 82 +ARM_REG_S4 = 83 +ARM_REG_S5 = 84 +ARM_REG_S6 = 85 +ARM_REG_S7 = 86 +ARM_REG_S8 = 87 +ARM_REG_S9 = 88 +ARM_REG_S10 = 89 +ARM_REG_S11 = 90 +ARM_REG_S12 = 91 +ARM_REG_S13 = 92 +ARM_REG_S14 = 93 +ARM_REG_S15 = 94 +ARM_REG_S16 = 95 +ARM_REG_S17 = 96 +ARM_REG_S18 = 97 +ARM_REG_S19 = 98 +ARM_REG_S20 = 99 +ARM_REG_S21 = 100 +ARM_REG_S22 = 101 +ARM_REG_S23 = 102 +ARM_REG_S24 = 103 +ARM_REG_S25 = 104 +ARM_REG_S26 = 105 +ARM_REG_S27 = 106 +ARM_REG_S28 = 107 +ARM_REG_S29 = 108 +ARM_REG_S30 = 109 +ARM_REG_S31 = 110 +ARM_REG_ENDING = 111 + +# alias registers +ARM_REG_R13 = ARM_REG_SP +ARM_REG_R14 = ARM_REG_LR +ARM_REG_R15 = ARM_REG_PC +ARM_REG_SB = ARM_REG_R9 +ARM_REG_SL = ARM_REG_R10 +ARM_REG_FP = ARM_REG_R11 +ARM_REG_IP = ARM_REG_R12 diff --git a/bindings/python/unicorn/m68k_const.py b/bindings/python/unicorn/m68k_const.py new file mode 100644 index 00000000..ae44706a --- /dev/null +++ b/bindings/python/unicorn/m68k_const.py @@ -0,0 +1,24 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [m68k_const.py] + +# M68K registers + +M68K_REG_INVALID = 0 +M68K_REG_A0 = 1 +M68K_REG_A1 = 2 +M68K_REG_A2 = 3 +M68K_REG_A3 = 4 +M68K_REG_A4 = 5 +M68K_REG_A5 = 6 +M68K_REG_A6 = 7 +M68K_REG_A7 = 8 +M68K_REG_D0 = 9 +M68K_REG_D1 = 10 +M68K_REG_D2 = 11 +M68K_REG_D3 = 12 +M68K_REG_D4 = 13 +M68K_REG_D5 = 14 +M68K_REG_D6 = 15 +M68K_REG_D7 = 16 +M68K_REG_SR = 17 +M68K_REG_PC = 18 +M68K_REG_ENDING = 19 diff --git a/bindings/python/unicorn/mips_const.py b/bindings/python/unicorn/mips_const.py new file mode 100644 index 00000000..6725f635 --- /dev/null +++ b/bindings/python/unicorn/mips_const.py @@ -0,0 +1,195 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.py] + +# MIPS registers + +MIPS_REG_INVALID = 0 + +# General purpose registers +MIPS_REG_PC = 1 +MIPS_REG_0 = 2 +MIPS_REG_1 = 3 +MIPS_REG_2 = 4 +MIPS_REG_3 = 5 +MIPS_REG_4 = 6 +MIPS_REG_5 = 7 +MIPS_REG_6 = 8 +MIPS_REG_7 = 9 +MIPS_REG_8 = 10 +MIPS_REG_9 = 11 +MIPS_REG_10 = 12 +MIPS_REG_11 = 13 +MIPS_REG_12 = 14 +MIPS_REG_13 = 15 +MIPS_REG_14 = 16 +MIPS_REG_15 = 17 +MIPS_REG_16 = 18 +MIPS_REG_17 = 19 +MIPS_REG_18 = 20 +MIPS_REG_19 = 21 +MIPS_REG_20 = 22 +MIPS_REG_21 = 23 +MIPS_REG_22 = 24 +MIPS_REG_23 = 25 +MIPS_REG_24 = 26 +MIPS_REG_25 = 27 +MIPS_REG_26 = 28 +MIPS_REG_27 = 29 +MIPS_REG_28 = 30 +MIPS_REG_29 = 31 +MIPS_REG_30 = 32 +MIPS_REG_31 = 33 + +# DSP registers +MIPS_REG_DSPCCOND = 34 +MIPS_REG_DSPCARRY = 35 +MIPS_REG_DSPEFI = 36 +MIPS_REG_DSPOUTFLAG = 37 +MIPS_REG_DSPOUTFLAG16_19 = 38 +MIPS_REG_DSPOUTFLAG20 = 39 +MIPS_REG_DSPOUTFLAG21 = 40 +MIPS_REG_DSPOUTFLAG22 = 41 +MIPS_REG_DSPOUTFLAG23 = 42 +MIPS_REG_DSPPOS = 43 +MIPS_REG_DSPSCOUNT = 44 + +# ACC registers +MIPS_REG_AC0 = 45 +MIPS_REG_AC1 = 46 +MIPS_REG_AC2 = 47 +MIPS_REG_AC3 = 48 + +# COP registers +MIPS_REG_CC0 = 49 +MIPS_REG_CC1 = 50 +MIPS_REG_CC2 = 51 +MIPS_REG_CC3 = 52 +MIPS_REG_CC4 = 53 +MIPS_REG_CC5 = 54 +MIPS_REG_CC6 = 55 +MIPS_REG_CC7 = 56 + +# FPU registers +MIPS_REG_F0 = 57 +MIPS_REG_F1 = 58 +MIPS_REG_F2 = 59 +MIPS_REG_F3 = 60 +MIPS_REG_F4 = 61 +MIPS_REG_F5 = 62 +MIPS_REG_F6 = 63 +MIPS_REG_F7 = 64 +MIPS_REG_F8 = 65 +MIPS_REG_F9 = 66 +MIPS_REG_F10 = 67 +MIPS_REG_F11 = 68 +MIPS_REG_F12 = 69 +MIPS_REG_F13 = 70 +MIPS_REG_F14 = 71 +MIPS_REG_F15 = 72 +MIPS_REG_F16 = 73 +MIPS_REG_F17 = 74 +MIPS_REG_F18 = 75 +MIPS_REG_F19 = 76 +MIPS_REG_F20 = 77 +MIPS_REG_F21 = 78 +MIPS_REG_F22 = 79 +MIPS_REG_F23 = 80 +MIPS_REG_F24 = 81 +MIPS_REG_F25 = 82 +MIPS_REG_F26 = 83 +MIPS_REG_F27 = 84 +MIPS_REG_F28 = 85 +MIPS_REG_F29 = 86 +MIPS_REG_F30 = 87 +MIPS_REG_F31 = 88 +MIPS_REG_FCC0 = 89 +MIPS_REG_FCC1 = 90 +MIPS_REG_FCC2 = 91 +MIPS_REG_FCC3 = 92 +MIPS_REG_FCC4 = 93 +MIPS_REG_FCC5 = 94 +MIPS_REG_FCC6 = 95 +MIPS_REG_FCC7 = 96 + +# AFPR128 +MIPS_REG_W0 = 97 +MIPS_REG_W1 = 98 +MIPS_REG_W2 = 99 +MIPS_REG_W3 = 100 +MIPS_REG_W4 = 101 +MIPS_REG_W5 = 102 +MIPS_REG_W6 = 103 +MIPS_REG_W7 = 104 +MIPS_REG_W8 = 105 +MIPS_REG_W9 = 106 +MIPS_REG_W10 = 107 +MIPS_REG_W11 = 108 +MIPS_REG_W12 = 109 +MIPS_REG_W13 = 110 +MIPS_REG_W14 = 111 +MIPS_REG_W15 = 112 +MIPS_REG_W16 = 113 +MIPS_REG_W17 = 114 +MIPS_REG_W18 = 115 +MIPS_REG_W19 = 116 +MIPS_REG_W20 = 117 +MIPS_REG_W21 = 118 +MIPS_REG_W22 = 119 +MIPS_REG_W23 = 120 +MIPS_REG_W24 = 121 +MIPS_REG_W25 = 122 +MIPS_REG_W26 = 123 +MIPS_REG_W27 = 124 +MIPS_REG_W28 = 125 +MIPS_REG_W29 = 126 +MIPS_REG_W30 = 127 +MIPS_REG_W31 = 128 +MIPS_REG_HI = 129 +MIPS_REG_LO = 130 +MIPS_REG_P0 = 131 +MIPS_REG_P1 = 132 +MIPS_REG_P2 = 133 +MIPS_REG_MPL0 = 134 +MIPS_REG_MPL1 = 135 +MIPS_REG_MPL2 = 136 +MIPS_REG_ENDING = 137 +MIPS_REG_ZERO = MIPS_REG_0 +MIPS_REG_AT = MIPS_REG_1 +MIPS_REG_V0 = MIPS_REG_2 +MIPS_REG_V1 = MIPS_REG_3 +MIPS_REG_A0 = MIPS_REG_4 +MIPS_REG_A1 = MIPS_REG_5 +MIPS_REG_A2 = MIPS_REG_6 +MIPS_REG_A3 = MIPS_REG_7 +MIPS_REG_T0 = MIPS_REG_8 +MIPS_REG_T1 = MIPS_REG_9 +MIPS_REG_T2 = MIPS_REG_10 +MIPS_REG_T3 = MIPS_REG_11 +MIPS_REG_T4 = MIPS_REG_12 +MIPS_REG_T5 = MIPS_REG_13 +MIPS_REG_T6 = MIPS_REG_14 +MIPS_REG_T7 = MIPS_REG_15 +MIPS_REG_S0 = MIPS_REG_16 +MIPS_REG_S1 = MIPS_REG_17 +MIPS_REG_S2 = MIPS_REG_18 +MIPS_REG_S3 = MIPS_REG_19 +MIPS_REG_S4 = MIPS_REG_20 +MIPS_REG_S5 = MIPS_REG_21 +MIPS_REG_S6 = MIPS_REG_22 +MIPS_REG_S7 = MIPS_REG_23 +MIPS_REG_T8 = MIPS_REG_24 +MIPS_REG_T9 = MIPS_REG_25 +MIPS_REG_K0 = MIPS_REG_26 +MIPS_REG_K1 = MIPS_REG_27 +MIPS_REG_GP = MIPS_REG_28 +MIPS_REG_SP = MIPS_REG_29 +MIPS_REG_FP = MIPS_REG_30 +MIPS_REG_S8 = MIPS_REG_30 +MIPS_REG_RA = MIPS_REG_31 +MIPS_REG_HI0 = MIPS_REG_AC0 +MIPS_REG_HI1 = MIPS_REG_AC1 +MIPS_REG_HI2 = MIPS_REG_AC2 +MIPS_REG_HI3 = MIPS_REG_AC3 +MIPS_REG_LO0 = MIPS_REG_HI0 +MIPS_REG_LO1 = MIPS_REG_HI1 +MIPS_REG_LO2 = MIPS_REG_HI2 +MIPS_REG_LO3 = MIPS_REG_HI3 diff --git a/bindings/python/unicorn/sparc_const.py b/bindings/python/unicorn/sparc_const.py new file mode 100644 index 00000000..05588017 --- /dev/null +++ b/bindings/python/unicorn/sparc_const.py @@ -0,0 +1,96 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.py] + +# SPARC registers + +SPARC_REG_INVALID = 0 +SPARC_REG_F0 = 1 +SPARC_REG_F1 = 2 +SPARC_REG_F2 = 3 +SPARC_REG_F3 = 4 +SPARC_REG_F4 = 5 +SPARC_REG_F5 = 6 +SPARC_REG_F6 = 7 +SPARC_REG_F7 = 8 +SPARC_REG_F8 = 9 +SPARC_REG_F9 = 10 +SPARC_REG_F10 = 11 +SPARC_REG_F11 = 12 +SPARC_REG_F12 = 13 +SPARC_REG_F13 = 14 +SPARC_REG_F14 = 15 +SPARC_REG_F15 = 16 +SPARC_REG_F16 = 17 +SPARC_REG_F17 = 18 +SPARC_REG_F18 = 19 +SPARC_REG_F19 = 20 +SPARC_REG_F20 = 21 +SPARC_REG_F21 = 22 +SPARC_REG_F22 = 23 +SPARC_REG_F23 = 24 +SPARC_REG_F24 = 25 +SPARC_REG_F25 = 26 +SPARC_REG_F26 = 27 +SPARC_REG_F27 = 28 +SPARC_REG_F28 = 29 +SPARC_REG_F29 = 30 +SPARC_REG_F30 = 31 +SPARC_REG_F31 = 32 +SPARC_REG_F32 = 33 +SPARC_REG_F34 = 34 +SPARC_REG_F36 = 35 +SPARC_REG_F38 = 36 +SPARC_REG_F40 = 37 +SPARC_REG_F42 = 38 +SPARC_REG_F44 = 39 +SPARC_REG_F46 = 40 +SPARC_REG_F48 = 41 +SPARC_REG_F50 = 42 +SPARC_REG_F52 = 43 +SPARC_REG_F54 = 44 +SPARC_REG_F56 = 45 +SPARC_REG_F58 = 46 +SPARC_REG_F60 = 47 +SPARC_REG_F62 = 48 +SPARC_REG_FCC0 = 49 +SPARC_REG_FCC1 = 50 +SPARC_REG_FCC2 = 51 +SPARC_REG_FCC3 = 52 +SPARC_REG_FP = 53 +SPARC_REG_G0 = 54 +SPARC_REG_G1 = 55 +SPARC_REG_G2 = 56 +SPARC_REG_G3 = 57 +SPARC_REG_G4 = 58 +SPARC_REG_G5 = 59 +SPARC_REG_G6 = 60 +SPARC_REG_G7 = 61 +SPARC_REG_I0 = 62 +SPARC_REG_I1 = 63 +SPARC_REG_I2 = 64 +SPARC_REG_I3 = 65 +SPARC_REG_I4 = 66 +SPARC_REG_I5 = 67 +SPARC_REG_I7 = 68 +SPARC_REG_ICC = 69 +SPARC_REG_L0 = 70 +SPARC_REG_L1 = 71 +SPARC_REG_L2 = 72 +SPARC_REG_L3 = 73 +SPARC_REG_L4 = 74 +SPARC_REG_L5 = 75 +SPARC_REG_L6 = 76 +SPARC_REG_L7 = 77 +SPARC_REG_O0 = 78 +SPARC_REG_O1 = 79 +SPARC_REG_O2 = 80 +SPARC_REG_O3 = 81 +SPARC_REG_O4 = 82 +SPARC_REG_O5 = 83 +SPARC_REG_O7 = 84 +SPARC_REG_SP = 85 +SPARC_REG_Y = 86 +SPARC_REG_XCC = 87 +SPARC_REG_PC = 88 +SPARC_REG_ENDING = 89 +SPARC_REG_O6 = SPARC_REG_SP +SPARC_REG_I6 = SPARC_REG_FP diff --git a/bindings/python/unicorn/x86_const.py b/bindings/python/unicorn/x86_const.py new file mode 100644 index 00000000..33adf15f --- /dev/null +++ b/bindings/python/unicorn/x86_const.py @@ -0,0 +1,1589 @@ +# For Unicorn Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.py] + +# X86 registers + +X86_REG_INVALID = 0 +X86_REG_AH = 1 +X86_REG_AL = 2 +X86_REG_AX = 3 +X86_REG_BH = 4 +X86_REG_BL = 5 +X86_REG_BP = 6 +X86_REG_BPL = 7 +X86_REG_BX = 8 +X86_REG_CH = 9 +X86_REG_CL = 10 +X86_REG_CS = 11 +X86_REG_CX = 12 +X86_REG_DH = 13 +X86_REG_DI = 14 +X86_REG_DIL = 15 +X86_REG_DL = 16 +X86_REG_DS = 17 +X86_REG_DX = 18 +X86_REG_EAX = 19 +X86_REG_EBP = 20 +X86_REG_EBX = 21 +X86_REG_ECX = 22 +X86_REG_EDI = 23 +X86_REG_EDX = 24 +X86_REG_EFLAGS = 25 +X86_REG_EIP = 26 +X86_REG_EIZ = 27 +X86_REG_ES = 28 +X86_REG_ESI = 29 +X86_REG_ESP = 30 +X86_REG_FPSW = 31 +X86_REG_FS = 32 +X86_REG_GS = 33 +X86_REG_IP = 34 +X86_REG_RAX = 35 +X86_REG_RBP = 36 +X86_REG_RBX = 37 +X86_REG_RCX = 38 +X86_REG_RDI = 39 +X86_REG_RDX = 40 +X86_REG_RIP = 41 +X86_REG_RIZ = 42 +X86_REG_RSI = 43 +X86_REG_RSP = 44 +X86_REG_SI = 45 +X86_REG_SIL = 46 +X86_REG_SP = 47 +X86_REG_SPL = 48 +X86_REG_SS = 49 +X86_REG_CR0 = 50 +X86_REG_CR1 = 51 +X86_REG_CR2 = 52 +X86_REG_CR3 = 53 +X86_REG_CR4 = 54 +X86_REG_CR5 = 55 +X86_REG_CR6 = 56 +X86_REG_CR7 = 57 +X86_REG_CR8 = 58 +X86_REG_CR9 = 59 +X86_REG_CR10 = 60 +X86_REG_CR11 = 61 +X86_REG_CR12 = 62 +X86_REG_CR13 = 63 +X86_REG_CR14 = 64 +X86_REG_CR15 = 65 +X86_REG_DR0 = 66 +X86_REG_DR1 = 67 +X86_REG_DR2 = 68 +X86_REG_DR3 = 69 +X86_REG_DR4 = 70 +X86_REG_DR5 = 71 +X86_REG_DR6 = 72 +X86_REG_DR7 = 73 +X86_REG_DR8 = 74 +X86_REG_DR9 = 75 +X86_REG_DR10 = 76 +X86_REG_DR11 = 77 +X86_REG_DR12 = 78 +X86_REG_DR13 = 79 +X86_REG_DR14 = 80 +X86_REG_DR15 = 81 +X86_REG_FP0 = 82 +X86_REG_FP1 = 83 +X86_REG_FP2 = 84 +X86_REG_FP3 = 85 +X86_REG_FP4 = 86 +X86_REG_FP5 = 87 +X86_REG_FP6 = 88 +X86_REG_FP7 = 89 +X86_REG_K0 = 90 +X86_REG_K1 = 91 +X86_REG_K2 = 92 +X86_REG_K3 = 93 +X86_REG_K4 = 94 +X86_REG_K5 = 95 +X86_REG_K6 = 96 +X86_REG_K7 = 97 +X86_REG_MM0 = 98 +X86_REG_MM1 = 99 +X86_REG_MM2 = 100 +X86_REG_MM3 = 101 +X86_REG_MM4 = 102 +X86_REG_MM5 = 103 +X86_REG_MM6 = 104 +X86_REG_MM7 = 105 +X86_REG_R8 = 106 +X86_REG_R9 = 107 +X86_REG_R10 = 108 +X86_REG_R11 = 109 +X86_REG_R12 = 110 +X86_REG_R13 = 111 +X86_REG_R14 = 112 +X86_REG_R15 = 113 +X86_REG_ST0 = 114 +X86_REG_ST1 = 115 +X86_REG_ST2 = 116 +X86_REG_ST3 = 117 +X86_REG_ST4 = 118 +X86_REG_ST5 = 119 +X86_REG_ST6 = 120 +X86_REG_ST7 = 121 +X86_REG_XMM0 = 122 +X86_REG_XMM1 = 123 +X86_REG_XMM2 = 124 +X86_REG_XMM3 = 125 +X86_REG_XMM4 = 126 +X86_REG_XMM5 = 127 +X86_REG_XMM6 = 128 +X86_REG_XMM7 = 129 +X86_REG_XMM8 = 130 +X86_REG_XMM9 = 131 +X86_REG_XMM10 = 132 +X86_REG_XMM11 = 133 +X86_REG_XMM12 = 134 +X86_REG_XMM13 = 135 +X86_REG_XMM14 = 136 +X86_REG_XMM15 = 137 +X86_REG_XMM16 = 138 +X86_REG_XMM17 = 139 +X86_REG_XMM18 = 140 +X86_REG_XMM19 = 141 +X86_REG_XMM20 = 142 +X86_REG_XMM21 = 143 +X86_REG_XMM22 = 144 +X86_REG_XMM23 = 145 +X86_REG_XMM24 = 146 +X86_REG_XMM25 = 147 +X86_REG_XMM26 = 148 +X86_REG_XMM27 = 149 +X86_REG_XMM28 = 150 +X86_REG_XMM29 = 151 +X86_REG_XMM30 = 152 +X86_REG_XMM31 = 153 +X86_REG_YMM0 = 154 +X86_REG_YMM1 = 155 +X86_REG_YMM2 = 156 +X86_REG_YMM3 = 157 +X86_REG_YMM4 = 158 +X86_REG_YMM5 = 159 +X86_REG_YMM6 = 160 +X86_REG_YMM7 = 161 +X86_REG_YMM8 = 162 +X86_REG_YMM9 = 163 +X86_REG_YMM10 = 164 +X86_REG_YMM11 = 165 +X86_REG_YMM12 = 166 +X86_REG_YMM13 = 167 +X86_REG_YMM14 = 168 +X86_REG_YMM15 = 169 +X86_REG_YMM16 = 170 +X86_REG_YMM17 = 171 +X86_REG_YMM18 = 172 +X86_REG_YMM19 = 173 +X86_REG_YMM20 = 174 +X86_REG_YMM21 = 175 +X86_REG_YMM22 = 176 +X86_REG_YMM23 = 177 +X86_REG_YMM24 = 178 +X86_REG_YMM25 = 179 +X86_REG_YMM26 = 180 +X86_REG_YMM27 = 181 +X86_REG_YMM28 = 182 +X86_REG_YMM29 = 183 +X86_REG_YMM30 = 184 +X86_REG_YMM31 = 185 +X86_REG_ZMM0 = 186 +X86_REG_ZMM1 = 187 +X86_REG_ZMM2 = 188 +X86_REG_ZMM3 = 189 +X86_REG_ZMM4 = 190 +X86_REG_ZMM5 = 191 +X86_REG_ZMM6 = 192 +X86_REG_ZMM7 = 193 +X86_REG_ZMM8 = 194 +X86_REG_ZMM9 = 195 +X86_REG_ZMM10 = 196 +X86_REG_ZMM11 = 197 +X86_REG_ZMM12 = 198 +X86_REG_ZMM13 = 199 +X86_REG_ZMM14 = 200 +X86_REG_ZMM15 = 201 +X86_REG_ZMM16 = 202 +X86_REG_ZMM17 = 203 +X86_REG_ZMM18 = 204 +X86_REG_ZMM19 = 205 +X86_REG_ZMM20 = 206 +X86_REG_ZMM21 = 207 +X86_REG_ZMM22 = 208 +X86_REG_ZMM23 = 209 +X86_REG_ZMM24 = 210 +X86_REG_ZMM25 = 211 +X86_REG_ZMM26 = 212 +X86_REG_ZMM27 = 213 +X86_REG_ZMM28 = 214 +X86_REG_ZMM29 = 215 +X86_REG_ZMM30 = 216 +X86_REG_ZMM31 = 217 +X86_REG_R8B = 218 +X86_REG_R9B = 219 +X86_REG_R10B = 220 +X86_REG_R11B = 221 +X86_REG_R12B = 222 +X86_REG_R13B = 223 +X86_REG_R14B = 224 +X86_REG_R15B = 225 +X86_REG_R8D = 226 +X86_REG_R9D = 227 +X86_REG_R10D = 228 +X86_REG_R11D = 229 +X86_REG_R12D = 230 +X86_REG_R13D = 231 +X86_REG_R14D = 232 +X86_REG_R15D = 233 +X86_REG_R8W = 234 +X86_REG_R9W = 235 +X86_REG_R10W = 236 +X86_REG_R11W = 237 +X86_REG_R12W = 238 +X86_REG_R13W = 239 +X86_REG_R14W = 240 +X86_REG_R15W = 241 +X86_REG_ENDING = 242 + +# X86 instructions + +X86_INS_INVALID = 0 +X86_INS_AAA = 1 +X86_INS_AAD = 2 +X86_INS_AAM = 3 +X86_INS_AAS = 4 +X86_INS_FABS = 5 +X86_INS_ADC = 6 +X86_INS_ADCX = 7 +X86_INS_ADD = 8 +X86_INS_ADDPD = 9 +X86_INS_ADDPS = 10 +X86_INS_ADDSD = 11 +X86_INS_ADDSS = 12 +X86_INS_ADDSUBPD = 13 +X86_INS_ADDSUBPS = 14 +X86_INS_FADD = 15 +X86_INS_FIADD = 16 +X86_INS_FADDP = 17 +X86_INS_ADOX = 18 +X86_INS_AESDECLAST = 19 +X86_INS_AESDEC = 20 +X86_INS_AESENCLAST = 21 +X86_INS_AESENC = 22 +X86_INS_AESIMC = 23 +X86_INS_AESKEYGENASSIST = 24 +X86_INS_AND = 25 +X86_INS_ANDN = 26 +X86_INS_ANDNPD = 27 +X86_INS_ANDNPS = 28 +X86_INS_ANDPD = 29 +X86_INS_ANDPS = 30 +X86_INS_ARPL = 31 +X86_INS_BEXTR = 32 +X86_INS_BLCFILL = 33 +X86_INS_BLCI = 34 +X86_INS_BLCIC = 35 +X86_INS_BLCMSK = 36 +X86_INS_BLCS = 37 +X86_INS_BLENDPD = 38 +X86_INS_BLENDPS = 39 +X86_INS_BLENDVPD = 40 +X86_INS_BLENDVPS = 41 +X86_INS_BLSFILL = 42 +X86_INS_BLSI = 43 +X86_INS_BLSIC = 44 +X86_INS_BLSMSK = 45 +X86_INS_BLSR = 46 +X86_INS_BOUND = 47 +X86_INS_BSF = 48 +X86_INS_BSR = 49 +X86_INS_BSWAP = 50 +X86_INS_BT = 51 +X86_INS_BTC = 52 +X86_INS_BTR = 53 +X86_INS_BTS = 54 +X86_INS_BZHI = 55 +X86_INS_CALL = 56 +X86_INS_CBW = 57 +X86_INS_CDQ = 58 +X86_INS_CDQE = 59 +X86_INS_FCHS = 60 +X86_INS_CLAC = 61 +X86_INS_CLC = 62 +X86_INS_CLD = 63 +X86_INS_CLFLUSH = 64 +X86_INS_CLFLUSHOPT = 65 +X86_INS_CLGI = 66 +X86_INS_CLI = 67 +X86_INS_CLTS = 68 +X86_INS_CLWB = 69 +X86_INS_CMC = 70 +X86_INS_CMOVA = 71 +X86_INS_CMOVAE = 72 +X86_INS_CMOVB = 73 +X86_INS_CMOVBE = 74 +X86_INS_FCMOVBE = 75 +X86_INS_FCMOVB = 76 +X86_INS_CMOVE = 77 +X86_INS_FCMOVE = 78 +X86_INS_CMOVG = 79 +X86_INS_CMOVGE = 80 +X86_INS_CMOVL = 81 +X86_INS_CMOVLE = 82 +X86_INS_FCMOVNBE = 83 +X86_INS_FCMOVNB = 84 +X86_INS_CMOVNE = 85 +X86_INS_FCMOVNE = 86 +X86_INS_CMOVNO = 87 +X86_INS_CMOVNP = 88 +X86_INS_FCMOVNU = 89 +X86_INS_CMOVNS = 90 +X86_INS_CMOVO = 91 +X86_INS_CMOVP = 92 +X86_INS_FCMOVU = 93 +X86_INS_CMOVS = 94 +X86_INS_CMP = 95 +X86_INS_CMPPD = 96 +X86_INS_CMPPS = 97 +X86_INS_CMPSB = 98 +X86_INS_CMPSD = 99 +X86_INS_CMPSQ = 100 +X86_INS_CMPSS = 101 +X86_INS_CMPSW = 102 +X86_INS_CMPXCHG16B = 103 +X86_INS_CMPXCHG = 104 +X86_INS_CMPXCHG8B = 105 +X86_INS_COMISD = 106 +X86_INS_COMISS = 107 +X86_INS_FCOMP = 108 +X86_INS_FCOMPI = 109 +X86_INS_FCOMI = 110 +X86_INS_FCOM = 111 +X86_INS_FCOS = 112 +X86_INS_CPUID = 113 +X86_INS_CQO = 114 +X86_INS_CRC32 = 115 +X86_INS_CVTDQ2PD = 116 +X86_INS_CVTDQ2PS = 117 +X86_INS_CVTPD2DQ = 118 +X86_INS_CVTPD2PS = 119 +X86_INS_CVTPS2DQ = 120 +X86_INS_CVTPS2PD = 121 +X86_INS_CVTSD2SI = 122 +X86_INS_CVTSD2SS = 123 +X86_INS_CVTSI2SD = 124 +X86_INS_CVTSI2SS = 125 +X86_INS_CVTSS2SD = 126 +X86_INS_CVTSS2SI = 127 +X86_INS_CVTTPD2DQ = 128 +X86_INS_CVTTPS2DQ = 129 +X86_INS_CVTTSD2SI = 130 +X86_INS_CVTTSS2SI = 131 +X86_INS_CWD = 132 +X86_INS_CWDE = 133 +X86_INS_DAA = 134 +X86_INS_DAS = 135 +X86_INS_DATA16 = 136 +X86_INS_DEC = 137 +X86_INS_DIV = 138 +X86_INS_DIVPD = 139 +X86_INS_DIVPS = 140 +X86_INS_FDIVR = 141 +X86_INS_FIDIVR = 142 +X86_INS_FDIVRP = 143 +X86_INS_DIVSD = 144 +X86_INS_DIVSS = 145 +X86_INS_FDIV = 146 +X86_INS_FIDIV = 147 +X86_INS_FDIVP = 148 +X86_INS_DPPD = 149 +X86_INS_DPPS = 150 +X86_INS_RET = 151 +X86_INS_ENCLS = 152 +X86_INS_ENCLU = 153 +X86_INS_ENTER = 154 +X86_INS_EXTRACTPS = 155 +X86_INS_EXTRQ = 156 +X86_INS_F2XM1 = 157 +X86_INS_LCALL = 158 +X86_INS_LJMP = 159 +X86_INS_FBLD = 160 +X86_INS_FBSTP = 161 +X86_INS_FCOMPP = 162 +X86_INS_FDECSTP = 163 +X86_INS_FEMMS = 164 +X86_INS_FFREE = 165 +X86_INS_FICOM = 166 +X86_INS_FICOMP = 167 +X86_INS_FINCSTP = 168 +X86_INS_FLDCW = 169 +X86_INS_FLDENV = 170 +X86_INS_FLDL2E = 171 +X86_INS_FLDL2T = 172 +X86_INS_FLDLG2 = 173 +X86_INS_FLDLN2 = 174 +X86_INS_FLDPI = 175 +X86_INS_FNCLEX = 176 +X86_INS_FNINIT = 177 +X86_INS_FNOP = 178 +X86_INS_FNSTCW = 179 +X86_INS_FNSTSW = 180 +X86_INS_FPATAN = 181 +X86_INS_FPREM = 182 +X86_INS_FPREM1 = 183 +X86_INS_FPTAN = 184 +X86_INS_FFREEP = 185 +X86_INS_FRNDINT = 186 +X86_INS_FRSTOR = 187 +X86_INS_FNSAVE = 188 +X86_INS_FSCALE = 189 +X86_INS_FSETPM = 190 +X86_INS_FSINCOS = 191 +X86_INS_FNSTENV = 192 +X86_INS_FXAM = 193 +X86_INS_FXRSTOR = 194 +X86_INS_FXRSTOR64 = 195 +X86_INS_FXSAVE = 196 +X86_INS_FXSAVE64 = 197 +X86_INS_FXTRACT = 198 +X86_INS_FYL2X = 199 +X86_INS_FYL2XP1 = 200 +X86_INS_MOVAPD = 201 +X86_INS_MOVAPS = 202 +X86_INS_ORPD = 203 +X86_INS_ORPS = 204 +X86_INS_VMOVAPD = 205 +X86_INS_VMOVAPS = 206 +X86_INS_XORPD = 207 +X86_INS_XORPS = 208 +X86_INS_GETSEC = 209 +X86_INS_HADDPD = 210 +X86_INS_HADDPS = 211 +X86_INS_HLT = 212 +X86_INS_HSUBPD = 213 +X86_INS_HSUBPS = 214 +X86_INS_IDIV = 215 +X86_INS_FILD = 216 +X86_INS_IMUL = 217 +X86_INS_IN = 218 +X86_INS_INC = 219 +X86_INS_INSB = 220 +X86_INS_INSERTPS = 221 +X86_INS_INSERTQ = 222 +X86_INS_INSD = 223 +X86_INS_INSW = 224 +X86_INS_INT = 225 +X86_INS_INT1 = 226 +X86_INS_INT3 = 227 +X86_INS_INTO = 228 +X86_INS_INVD = 229 +X86_INS_INVEPT = 230 +X86_INS_INVLPG = 231 +X86_INS_INVLPGA = 232 +X86_INS_INVPCID = 233 +X86_INS_INVVPID = 234 +X86_INS_IRET = 235 +X86_INS_IRETD = 236 +X86_INS_IRETQ = 237 +X86_INS_FISTTP = 238 +X86_INS_FIST = 239 +X86_INS_FISTP = 240 +X86_INS_UCOMISD = 241 +X86_INS_UCOMISS = 242 +X86_INS_VCOMISD = 243 +X86_INS_VCOMISS = 244 +X86_INS_VCVTSD2SS = 245 +X86_INS_VCVTSI2SD = 246 +X86_INS_VCVTSI2SS = 247 +X86_INS_VCVTSS2SD = 248 +X86_INS_VCVTTSD2SI = 249 +X86_INS_VCVTTSD2USI = 250 +X86_INS_VCVTTSS2SI = 251 +X86_INS_VCVTTSS2USI = 252 +X86_INS_VCVTUSI2SD = 253 +X86_INS_VCVTUSI2SS = 254 +X86_INS_VUCOMISD = 255 +X86_INS_VUCOMISS = 256 +X86_INS_JAE = 257 +X86_INS_JA = 258 +X86_INS_JBE = 259 +X86_INS_JB = 260 +X86_INS_JCXZ = 261 +X86_INS_JECXZ = 262 +X86_INS_JE = 263 +X86_INS_JGE = 264 +X86_INS_JG = 265 +X86_INS_JLE = 266 +X86_INS_JL = 267 +X86_INS_JMP = 268 +X86_INS_JNE = 269 +X86_INS_JNO = 270 +X86_INS_JNP = 271 +X86_INS_JNS = 272 +X86_INS_JO = 273 +X86_INS_JP = 274 +X86_INS_JRCXZ = 275 +X86_INS_JS = 276 +X86_INS_KANDB = 277 +X86_INS_KANDD = 278 +X86_INS_KANDNB = 279 +X86_INS_KANDND = 280 +X86_INS_KANDNQ = 281 +X86_INS_KANDNW = 282 +X86_INS_KANDQ = 283 +X86_INS_KANDW = 284 +X86_INS_KMOVB = 285 +X86_INS_KMOVD = 286 +X86_INS_KMOVQ = 287 +X86_INS_KMOVW = 288 +X86_INS_KNOTB = 289 +X86_INS_KNOTD = 290 +X86_INS_KNOTQ = 291 +X86_INS_KNOTW = 292 +X86_INS_KORB = 293 +X86_INS_KORD = 294 +X86_INS_KORQ = 295 +X86_INS_KORTESTB = 296 +X86_INS_KORTESTD = 297 +X86_INS_KORTESTQ = 298 +X86_INS_KORTESTW = 299 +X86_INS_KORW = 300 +X86_INS_KSHIFTLB = 301 +X86_INS_KSHIFTLD = 302 +X86_INS_KSHIFTLQ = 303 +X86_INS_KSHIFTLW = 304 +X86_INS_KSHIFTRB = 305 +X86_INS_KSHIFTRD = 306 +X86_INS_KSHIFTRQ = 307 +X86_INS_KSHIFTRW = 308 +X86_INS_KUNPCKBW = 309 +X86_INS_KXNORB = 310 +X86_INS_KXNORD = 311 +X86_INS_KXNORQ = 312 +X86_INS_KXNORW = 313 +X86_INS_KXORB = 314 +X86_INS_KXORD = 315 +X86_INS_KXORQ = 316 +X86_INS_KXORW = 317 +X86_INS_LAHF = 318 +X86_INS_LAR = 319 +X86_INS_LDDQU = 320 +X86_INS_LDMXCSR = 321 +X86_INS_LDS = 322 +X86_INS_FLDZ = 323 +X86_INS_FLD1 = 324 +X86_INS_FLD = 325 +X86_INS_LEA = 326 +X86_INS_LEAVE = 327 +X86_INS_LES = 328 +X86_INS_LFENCE = 329 +X86_INS_LFS = 330 +X86_INS_LGDT = 331 +X86_INS_LGS = 332 +X86_INS_LIDT = 333 +X86_INS_LLDT = 334 +X86_INS_LMSW = 335 +X86_INS_OR = 336 +X86_INS_SUB = 337 +X86_INS_XOR = 338 +X86_INS_LODSB = 339 +X86_INS_LODSD = 340 +X86_INS_LODSQ = 341 +X86_INS_LODSW = 342 +X86_INS_LOOP = 343 +X86_INS_LOOPE = 344 +X86_INS_LOOPNE = 345 +X86_INS_RETF = 346 +X86_INS_RETFQ = 347 +X86_INS_LSL = 348 +X86_INS_LSS = 349 +X86_INS_LTR = 350 +X86_INS_XADD = 351 +X86_INS_LZCNT = 352 +X86_INS_MASKMOVDQU = 353 +X86_INS_MAXPD = 354 +X86_INS_MAXPS = 355 +X86_INS_MAXSD = 356 +X86_INS_MAXSS = 357 +X86_INS_MFENCE = 358 +X86_INS_MINPD = 359 +X86_INS_MINPS = 360 +X86_INS_MINSD = 361 +X86_INS_MINSS = 362 +X86_INS_CVTPD2PI = 363 +X86_INS_CVTPI2PD = 364 +X86_INS_CVTPI2PS = 365 +X86_INS_CVTPS2PI = 366 +X86_INS_CVTTPD2PI = 367 +X86_INS_CVTTPS2PI = 368 +X86_INS_EMMS = 369 +X86_INS_MASKMOVQ = 370 +X86_INS_MOVD = 371 +X86_INS_MOVDQ2Q = 372 +X86_INS_MOVNTQ = 373 +X86_INS_MOVQ2DQ = 374 +X86_INS_MOVQ = 375 +X86_INS_PABSB = 376 +X86_INS_PABSD = 377 +X86_INS_PABSW = 378 +X86_INS_PACKSSDW = 379 +X86_INS_PACKSSWB = 380 +X86_INS_PACKUSWB = 381 +X86_INS_PADDB = 382 +X86_INS_PADDD = 383 +X86_INS_PADDQ = 384 +X86_INS_PADDSB = 385 +X86_INS_PADDSW = 386 +X86_INS_PADDUSB = 387 +X86_INS_PADDUSW = 388 +X86_INS_PADDW = 389 +X86_INS_PALIGNR = 390 +X86_INS_PANDN = 391 +X86_INS_PAND = 392 +X86_INS_PAVGB = 393 +X86_INS_PAVGW = 394 +X86_INS_PCMPEQB = 395 +X86_INS_PCMPEQD = 396 +X86_INS_PCMPEQW = 397 +X86_INS_PCMPGTB = 398 +X86_INS_PCMPGTD = 399 +X86_INS_PCMPGTW = 400 +X86_INS_PEXTRW = 401 +X86_INS_PHADDSW = 402 +X86_INS_PHADDW = 403 +X86_INS_PHADDD = 404 +X86_INS_PHSUBD = 405 +X86_INS_PHSUBSW = 406 +X86_INS_PHSUBW = 407 +X86_INS_PINSRW = 408 +X86_INS_PMADDUBSW = 409 +X86_INS_PMADDWD = 410 +X86_INS_PMAXSW = 411 +X86_INS_PMAXUB = 412 +X86_INS_PMINSW = 413 +X86_INS_PMINUB = 414 +X86_INS_PMOVMSKB = 415 +X86_INS_PMULHRSW = 416 +X86_INS_PMULHUW = 417 +X86_INS_PMULHW = 418 +X86_INS_PMULLW = 419 +X86_INS_PMULUDQ = 420 +X86_INS_POR = 421 +X86_INS_PSADBW = 422 +X86_INS_PSHUFB = 423 +X86_INS_PSHUFW = 424 +X86_INS_PSIGNB = 425 +X86_INS_PSIGND = 426 +X86_INS_PSIGNW = 427 +X86_INS_PSLLD = 428 +X86_INS_PSLLQ = 429 +X86_INS_PSLLW = 430 +X86_INS_PSRAD = 431 +X86_INS_PSRAW = 432 +X86_INS_PSRLD = 433 +X86_INS_PSRLQ = 434 +X86_INS_PSRLW = 435 +X86_INS_PSUBB = 436 +X86_INS_PSUBD = 437 +X86_INS_PSUBQ = 438 +X86_INS_PSUBSB = 439 +X86_INS_PSUBSW = 440 +X86_INS_PSUBUSB = 441 +X86_INS_PSUBUSW = 442 +X86_INS_PSUBW = 443 +X86_INS_PUNPCKHBW = 444 +X86_INS_PUNPCKHDQ = 445 +X86_INS_PUNPCKHWD = 446 +X86_INS_PUNPCKLBW = 447 +X86_INS_PUNPCKLDQ = 448 +X86_INS_PUNPCKLWD = 449 +X86_INS_PXOR = 450 +X86_INS_MONITOR = 451 +X86_INS_MONTMUL = 452 +X86_INS_MOV = 453 +X86_INS_MOVABS = 454 +X86_INS_MOVBE = 455 +X86_INS_MOVDDUP = 456 +X86_INS_MOVDQA = 457 +X86_INS_MOVDQU = 458 +X86_INS_MOVHLPS = 459 +X86_INS_MOVHPD = 460 +X86_INS_MOVHPS = 461 +X86_INS_MOVLHPS = 462 +X86_INS_MOVLPD = 463 +X86_INS_MOVLPS = 464 +X86_INS_MOVMSKPD = 465 +X86_INS_MOVMSKPS = 466 +X86_INS_MOVNTDQA = 467 +X86_INS_MOVNTDQ = 468 +X86_INS_MOVNTI = 469 +X86_INS_MOVNTPD = 470 +X86_INS_MOVNTPS = 471 +X86_INS_MOVNTSD = 472 +X86_INS_MOVNTSS = 473 +X86_INS_MOVSB = 474 +X86_INS_MOVSD = 475 +X86_INS_MOVSHDUP = 476 +X86_INS_MOVSLDUP = 477 +X86_INS_MOVSQ = 478 +X86_INS_MOVSS = 479 +X86_INS_MOVSW = 480 +X86_INS_MOVSX = 481 +X86_INS_MOVSXD = 482 +X86_INS_MOVUPD = 483 +X86_INS_MOVUPS = 484 +X86_INS_MOVZX = 485 +X86_INS_MPSADBW = 486 +X86_INS_MUL = 487 +X86_INS_MULPD = 488 +X86_INS_MULPS = 489 +X86_INS_MULSD = 490 +X86_INS_MULSS = 491 +X86_INS_MULX = 492 +X86_INS_FMUL = 493 +X86_INS_FIMUL = 494 +X86_INS_FMULP = 495 +X86_INS_MWAIT = 496 +X86_INS_NEG = 497 +X86_INS_NOP = 498 +X86_INS_NOT = 499 +X86_INS_OUT = 500 +X86_INS_OUTSB = 501 +X86_INS_OUTSD = 502 +X86_INS_OUTSW = 503 +X86_INS_PACKUSDW = 504 +X86_INS_PAUSE = 505 +X86_INS_PAVGUSB = 506 +X86_INS_PBLENDVB = 507 +X86_INS_PBLENDW = 508 +X86_INS_PCLMULQDQ = 509 +X86_INS_PCMPEQQ = 510 +X86_INS_PCMPESTRI = 511 +X86_INS_PCMPESTRM = 512 +X86_INS_PCMPGTQ = 513 +X86_INS_PCMPISTRI = 514 +X86_INS_PCMPISTRM = 515 +X86_INS_PCOMMIT = 516 +X86_INS_PDEP = 517 +X86_INS_PEXT = 518 +X86_INS_PEXTRB = 519 +X86_INS_PEXTRD = 520 +X86_INS_PEXTRQ = 521 +X86_INS_PF2ID = 522 +X86_INS_PF2IW = 523 +X86_INS_PFACC = 524 +X86_INS_PFADD = 525 +X86_INS_PFCMPEQ = 526 +X86_INS_PFCMPGE = 527 +X86_INS_PFCMPGT = 528 +X86_INS_PFMAX = 529 +X86_INS_PFMIN = 530 +X86_INS_PFMUL = 531 +X86_INS_PFNACC = 532 +X86_INS_PFPNACC = 533 +X86_INS_PFRCPIT1 = 534 +X86_INS_PFRCPIT2 = 535 +X86_INS_PFRCP = 536 +X86_INS_PFRSQIT1 = 537 +X86_INS_PFRSQRT = 538 +X86_INS_PFSUBR = 539 +X86_INS_PFSUB = 540 +X86_INS_PHMINPOSUW = 541 +X86_INS_PI2FD = 542 +X86_INS_PI2FW = 543 +X86_INS_PINSRB = 544 +X86_INS_PINSRD = 545 +X86_INS_PINSRQ = 546 +X86_INS_PMAXSB = 547 +X86_INS_PMAXSD = 548 +X86_INS_PMAXUD = 549 +X86_INS_PMAXUW = 550 +X86_INS_PMINSB = 551 +X86_INS_PMINSD = 552 +X86_INS_PMINUD = 553 +X86_INS_PMINUW = 554 +X86_INS_PMOVSXBD = 555 +X86_INS_PMOVSXBQ = 556 +X86_INS_PMOVSXBW = 557 +X86_INS_PMOVSXDQ = 558 +X86_INS_PMOVSXWD = 559 +X86_INS_PMOVSXWQ = 560 +X86_INS_PMOVZXBD = 561 +X86_INS_PMOVZXBQ = 562 +X86_INS_PMOVZXBW = 563 +X86_INS_PMOVZXDQ = 564 +X86_INS_PMOVZXWD = 565 +X86_INS_PMOVZXWQ = 566 +X86_INS_PMULDQ = 567 +X86_INS_PMULHRW = 568 +X86_INS_PMULLD = 569 +X86_INS_POP = 570 +X86_INS_POPAW = 571 +X86_INS_POPAL = 572 +X86_INS_POPCNT = 573 +X86_INS_POPF = 574 +X86_INS_POPFD = 575 +X86_INS_POPFQ = 576 +X86_INS_PREFETCH = 577 +X86_INS_PREFETCHNTA = 578 +X86_INS_PREFETCHT0 = 579 +X86_INS_PREFETCHT1 = 580 +X86_INS_PREFETCHT2 = 581 +X86_INS_PREFETCHW = 582 +X86_INS_PSHUFD = 583 +X86_INS_PSHUFHW = 584 +X86_INS_PSHUFLW = 585 +X86_INS_PSLLDQ = 586 +X86_INS_PSRLDQ = 587 +X86_INS_PSWAPD = 588 +X86_INS_PTEST = 589 +X86_INS_PUNPCKHQDQ = 590 +X86_INS_PUNPCKLQDQ = 591 +X86_INS_PUSH = 592 +X86_INS_PUSHAW = 593 +X86_INS_PUSHAL = 594 +X86_INS_PUSHF = 595 +X86_INS_PUSHFD = 596 +X86_INS_PUSHFQ = 597 +X86_INS_RCL = 598 +X86_INS_RCPPS = 599 +X86_INS_RCPSS = 600 +X86_INS_RCR = 601 +X86_INS_RDFSBASE = 602 +X86_INS_RDGSBASE = 603 +X86_INS_RDMSR = 604 +X86_INS_RDPMC = 605 +X86_INS_RDRAND = 606 +X86_INS_RDSEED = 607 +X86_INS_RDTSC = 608 +X86_INS_RDTSCP = 609 +X86_INS_ROL = 610 +X86_INS_ROR = 611 +X86_INS_RORX = 612 +X86_INS_ROUNDPD = 613 +X86_INS_ROUNDPS = 614 +X86_INS_ROUNDSD = 615 +X86_INS_ROUNDSS = 616 +X86_INS_RSM = 617 +X86_INS_RSQRTPS = 618 +X86_INS_RSQRTSS = 619 +X86_INS_SAHF = 620 +X86_INS_SAL = 621 +X86_INS_SALC = 622 +X86_INS_SAR = 623 +X86_INS_SARX = 624 +X86_INS_SBB = 625 +X86_INS_SCASB = 626 +X86_INS_SCASD = 627 +X86_INS_SCASQ = 628 +X86_INS_SCASW = 629 +X86_INS_SETAE = 630 +X86_INS_SETA = 631 +X86_INS_SETBE = 632 +X86_INS_SETB = 633 +X86_INS_SETE = 634 +X86_INS_SETGE = 635 +X86_INS_SETG = 636 +X86_INS_SETLE = 637 +X86_INS_SETL = 638 +X86_INS_SETNE = 639 +X86_INS_SETNO = 640 +X86_INS_SETNP = 641 +X86_INS_SETNS = 642 +X86_INS_SETO = 643 +X86_INS_SETP = 644 +X86_INS_SETS = 645 +X86_INS_SFENCE = 646 +X86_INS_SGDT = 647 +X86_INS_SHA1MSG1 = 648 +X86_INS_SHA1MSG2 = 649 +X86_INS_SHA1NEXTE = 650 +X86_INS_SHA1RNDS4 = 651 +X86_INS_SHA256MSG1 = 652 +X86_INS_SHA256MSG2 = 653 +X86_INS_SHA256RNDS2 = 654 +X86_INS_SHL = 655 +X86_INS_SHLD = 656 +X86_INS_SHLX = 657 +X86_INS_SHR = 658 +X86_INS_SHRD = 659 +X86_INS_SHRX = 660 +X86_INS_SHUFPD = 661 +X86_INS_SHUFPS = 662 +X86_INS_SIDT = 663 +X86_INS_FSIN = 664 +X86_INS_SKINIT = 665 +X86_INS_SLDT = 666 +X86_INS_SMSW = 667 +X86_INS_SQRTPD = 668 +X86_INS_SQRTPS = 669 +X86_INS_SQRTSD = 670 +X86_INS_SQRTSS = 671 +X86_INS_FSQRT = 672 +X86_INS_STAC = 673 +X86_INS_STC = 674 +X86_INS_STD = 675 +X86_INS_STGI = 676 +X86_INS_STI = 677 +X86_INS_STMXCSR = 678 +X86_INS_STOSB = 679 +X86_INS_STOSD = 680 +X86_INS_STOSQ = 681 +X86_INS_STOSW = 682 +X86_INS_STR = 683 +X86_INS_FST = 684 +X86_INS_FSTP = 685 +X86_INS_FSTPNCE = 686 +X86_INS_FXCH = 687 +X86_INS_SUBPD = 688 +X86_INS_SUBPS = 689 +X86_INS_FSUBR = 690 +X86_INS_FISUBR = 691 +X86_INS_FSUBRP = 692 +X86_INS_SUBSD = 693 +X86_INS_SUBSS = 694 +X86_INS_FSUB = 695 +X86_INS_FISUB = 696 +X86_INS_FSUBP = 697 +X86_INS_SWAPGS = 698 +X86_INS_SYSCALL = 699 +X86_INS_SYSENTER = 700 +X86_INS_SYSEXIT = 701 +X86_INS_SYSRET = 702 +X86_INS_T1MSKC = 703 +X86_INS_TEST = 704 +X86_INS_UD2 = 705 +X86_INS_FTST = 706 +X86_INS_TZCNT = 707 +X86_INS_TZMSK = 708 +X86_INS_FUCOMPI = 709 +X86_INS_FUCOMI = 710 +X86_INS_FUCOMPP = 711 +X86_INS_FUCOMP = 712 +X86_INS_FUCOM = 713 +X86_INS_UD2B = 714 +X86_INS_UNPCKHPD = 715 +X86_INS_UNPCKHPS = 716 +X86_INS_UNPCKLPD = 717 +X86_INS_UNPCKLPS = 718 +X86_INS_VADDPD = 719 +X86_INS_VADDPS = 720 +X86_INS_VADDSD = 721 +X86_INS_VADDSS = 722 +X86_INS_VADDSUBPD = 723 +X86_INS_VADDSUBPS = 724 +X86_INS_VAESDECLAST = 725 +X86_INS_VAESDEC = 726 +X86_INS_VAESENCLAST = 727 +X86_INS_VAESENC = 728 +X86_INS_VAESIMC = 729 +X86_INS_VAESKEYGENASSIST = 730 +X86_INS_VALIGND = 731 +X86_INS_VALIGNQ = 732 +X86_INS_VANDNPD = 733 +X86_INS_VANDNPS = 734 +X86_INS_VANDPD = 735 +X86_INS_VANDPS = 736 +X86_INS_VBLENDMPD = 737 +X86_INS_VBLENDMPS = 738 +X86_INS_VBLENDPD = 739 +X86_INS_VBLENDPS = 740 +X86_INS_VBLENDVPD = 741 +X86_INS_VBLENDVPS = 742 +X86_INS_VBROADCASTF128 = 743 +X86_INS_VBROADCASTI32X4 = 744 +X86_INS_VBROADCASTI64X4 = 745 +X86_INS_VBROADCASTSD = 746 +X86_INS_VBROADCASTSS = 747 +X86_INS_VCMPPD = 748 +X86_INS_VCMPPS = 749 +X86_INS_VCMPSD = 750 +X86_INS_VCMPSS = 751 +X86_INS_VCOMPRESSPD = 752 +X86_INS_VCOMPRESSPS = 753 +X86_INS_VCVTDQ2PD = 754 +X86_INS_VCVTDQ2PS = 755 +X86_INS_VCVTPD2DQX = 756 +X86_INS_VCVTPD2DQ = 757 +X86_INS_VCVTPD2PSX = 758 +X86_INS_VCVTPD2PS = 759 +X86_INS_VCVTPD2UDQ = 760 +X86_INS_VCVTPH2PS = 761 +X86_INS_VCVTPS2DQ = 762 +X86_INS_VCVTPS2PD = 763 +X86_INS_VCVTPS2PH = 764 +X86_INS_VCVTPS2UDQ = 765 +X86_INS_VCVTSD2SI = 766 +X86_INS_VCVTSD2USI = 767 +X86_INS_VCVTSS2SI = 768 +X86_INS_VCVTSS2USI = 769 +X86_INS_VCVTTPD2DQX = 770 +X86_INS_VCVTTPD2DQ = 771 +X86_INS_VCVTTPD2UDQ = 772 +X86_INS_VCVTTPS2DQ = 773 +X86_INS_VCVTTPS2UDQ = 774 +X86_INS_VCVTUDQ2PD = 775 +X86_INS_VCVTUDQ2PS = 776 +X86_INS_VDIVPD = 777 +X86_INS_VDIVPS = 778 +X86_INS_VDIVSD = 779 +X86_INS_VDIVSS = 780 +X86_INS_VDPPD = 781 +X86_INS_VDPPS = 782 +X86_INS_VERR = 783 +X86_INS_VERW = 784 +X86_INS_VEXP2PD = 785 +X86_INS_VEXP2PS = 786 +X86_INS_VEXPANDPD = 787 +X86_INS_VEXPANDPS = 788 +X86_INS_VEXTRACTF128 = 789 +X86_INS_VEXTRACTF32X4 = 790 +X86_INS_VEXTRACTF64X4 = 791 +X86_INS_VEXTRACTI128 = 792 +X86_INS_VEXTRACTI32X4 = 793 +X86_INS_VEXTRACTI64X4 = 794 +X86_INS_VEXTRACTPS = 795 +X86_INS_VFMADD132PD = 796 +X86_INS_VFMADD132PS = 797 +X86_INS_VFMADDPD = 798 +X86_INS_VFMADD213PD = 799 +X86_INS_VFMADD231PD = 800 +X86_INS_VFMADDPS = 801 +X86_INS_VFMADD213PS = 802 +X86_INS_VFMADD231PS = 803 +X86_INS_VFMADDSD = 804 +X86_INS_VFMADD213SD = 805 +X86_INS_VFMADD132SD = 806 +X86_INS_VFMADD231SD = 807 +X86_INS_VFMADDSS = 808 +X86_INS_VFMADD213SS = 809 +X86_INS_VFMADD132SS = 810 +X86_INS_VFMADD231SS = 811 +X86_INS_VFMADDSUB132PD = 812 +X86_INS_VFMADDSUB132PS = 813 +X86_INS_VFMADDSUBPD = 814 +X86_INS_VFMADDSUB213PD = 815 +X86_INS_VFMADDSUB231PD = 816 +X86_INS_VFMADDSUBPS = 817 +X86_INS_VFMADDSUB213PS = 818 +X86_INS_VFMADDSUB231PS = 819 +X86_INS_VFMSUB132PD = 820 +X86_INS_VFMSUB132PS = 821 +X86_INS_VFMSUBADD132PD = 822 +X86_INS_VFMSUBADD132PS = 823 +X86_INS_VFMSUBADDPD = 824 +X86_INS_VFMSUBADD213PD = 825 +X86_INS_VFMSUBADD231PD = 826 +X86_INS_VFMSUBADDPS = 827 +X86_INS_VFMSUBADD213PS = 828 +X86_INS_VFMSUBADD231PS = 829 +X86_INS_VFMSUBPD = 830 +X86_INS_VFMSUB213PD = 831 +X86_INS_VFMSUB231PD = 832 +X86_INS_VFMSUBPS = 833 +X86_INS_VFMSUB213PS = 834 +X86_INS_VFMSUB231PS = 835 +X86_INS_VFMSUBSD = 836 +X86_INS_VFMSUB213SD = 837 +X86_INS_VFMSUB132SD = 838 +X86_INS_VFMSUB231SD = 839 +X86_INS_VFMSUBSS = 840 +X86_INS_VFMSUB213SS = 841 +X86_INS_VFMSUB132SS = 842 +X86_INS_VFMSUB231SS = 843 +X86_INS_VFNMADD132PD = 844 +X86_INS_VFNMADD132PS = 845 +X86_INS_VFNMADDPD = 846 +X86_INS_VFNMADD213PD = 847 +X86_INS_VFNMADD231PD = 848 +X86_INS_VFNMADDPS = 849 +X86_INS_VFNMADD213PS = 850 +X86_INS_VFNMADD231PS = 851 +X86_INS_VFNMADDSD = 852 +X86_INS_VFNMADD213SD = 853 +X86_INS_VFNMADD132SD = 854 +X86_INS_VFNMADD231SD = 855 +X86_INS_VFNMADDSS = 856 +X86_INS_VFNMADD213SS = 857 +X86_INS_VFNMADD132SS = 858 +X86_INS_VFNMADD231SS = 859 +X86_INS_VFNMSUB132PD = 860 +X86_INS_VFNMSUB132PS = 861 +X86_INS_VFNMSUBPD = 862 +X86_INS_VFNMSUB213PD = 863 +X86_INS_VFNMSUB231PD = 864 +X86_INS_VFNMSUBPS = 865 +X86_INS_VFNMSUB213PS = 866 +X86_INS_VFNMSUB231PS = 867 +X86_INS_VFNMSUBSD = 868 +X86_INS_VFNMSUB213SD = 869 +X86_INS_VFNMSUB132SD = 870 +X86_INS_VFNMSUB231SD = 871 +X86_INS_VFNMSUBSS = 872 +X86_INS_VFNMSUB213SS = 873 +X86_INS_VFNMSUB132SS = 874 +X86_INS_VFNMSUB231SS = 875 +X86_INS_VFRCZPD = 876 +X86_INS_VFRCZPS = 877 +X86_INS_VFRCZSD = 878 +X86_INS_VFRCZSS = 879 +X86_INS_VORPD = 880 +X86_INS_VORPS = 881 +X86_INS_VXORPD = 882 +X86_INS_VXORPS = 883 +X86_INS_VGATHERDPD = 884 +X86_INS_VGATHERDPS = 885 +X86_INS_VGATHERPF0DPD = 886 +X86_INS_VGATHERPF0DPS = 887 +X86_INS_VGATHERPF0QPD = 888 +X86_INS_VGATHERPF0QPS = 889 +X86_INS_VGATHERPF1DPD = 890 +X86_INS_VGATHERPF1DPS = 891 +X86_INS_VGATHERPF1QPD = 892 +X86_INS_VGATHERPF1QPS = 893 +X86_INS_VGATHERQPD = 894 +X86_INS_VGATHERQPS = 895 +X86_INS_VHADDPD = 896 +X86_INS_VHADDPS = 897 +X86_INS_VHSUBPD = 898 +X86_INS_VHSUBPS = 899 +X86_INS_VINSERTF128 = 900 +X86_INS_VINSERTF32X4 = 901 +X86_INS_VINSERTF32X8 = 902 +X86_INS_VINSERTF64X2 = 903 +X86_INS_VINSERTF64X4 = 904 +X86_INS_VINSERTI128 = 905 +X86_INS_VINSERTI32X4 = 906 +X86_INS_VINSERTI32X8 = 907 +X86_INS_VINSERTI64X2 = 908 +X86_INS_VINSERTI64X4 = 909 +X86_INS_VINSERTPS = 910 +X86_INS_VLDDQU = 911 +X86_INS_VLDMXCSR = 912 +X86_INS_VMASKMOVDQU = 913 +X86_INS_VMASKMOVPD = 914 +X86_INS_VMASKMOVPS = 915 +X86_INS_VMAXPD = 916 +X86_INS_VMAXPS = 917 +X86_INS_VMAXSD = 918 +X86_INS_VMAXSS = 919 +X86_INS_VMCALL = 920 +X86_INS_VMCLEAR = 921 +X86_INS_VMFUNC = 922 +X86_INS_VMINPD = 923 +X86_INS_VMINPS = 924 +X86_INS_VMINSD = 925 +X86_INS_VMINSS = 926 +X86_INS_VMLAUNCH = 927 +X86_INS_VMLOAD = 928 +X86_INS_VMMCALL = 929 +X86_INS_VMOVQ = 930 +X86_INS_VMOVDDUP = 931 +X86_INS_VMOVD = 932 +X86_INS_VMOVDQA32 = 933 +X86_INS_VMOVDQA64 = 934 +X86_INS_VMOVDQA = 935 +X86_INS_VMOVDQU16 = 936 +X86_INS_VMOVDQU32 = 937 +X86_INS_VMOVDQU64 = 938 +X86_INS_VMOVDQU8 = 939 +X86_INS_VMOVDQU = 940 +X86_INS_VMOVHLPS = 941 +X86_INS_VMOVHPD = 942 +X86_INS_VMOVHPS = 943 +X86_INS_VMOVLHPS = 944 +X86_INS_VMOVLPD = 945 +X86_INS_VMOVLPS = 946 +X86_INS_VMOVMSKPD = 947 +X86_INS_VMOVMSKPS = 948 +X86_INS_VMOVNTDQA = 949 +X86_INS_VMOVNTDQ = 950 +X86_INS_VMOVNTPD = 951 +X86_INS_VMOVNTPS = 952 +X86_INS_VMOVSD = 953 +X86_INS_VMOVSHDUP = 954 +X86_INS_VMOVSLDUP = 955 +X86_INS_VMOVSS = 956 +X86_INS_VMOVUPD = 957 +X86_INS_VMOVUPS = 958 +X86_INS_VMPSADBW = 959 +X86_INS_VMPTRLD = 960 +X86_INS_VMPTRST = 961 +X86_INS_VMREAD = 962 +X86_INS_VMRESUME = 963 +X86_INS_VMRUN = 964 +X86_INS_VMSAVE = 965 +X86_INS_VMULPD = 966 +X86_INS_VMULPS = 967 +X86_INS_VMULSD = 968 +X86_INS_VMULSS = 969 +X86_INS_VMWRITE = 970 +X86_INS_VMXOFF = 971 +X86_INS_VMXON = 972 +X86_INS_VPABSB = 973 +X86_INS_VPABSD = 974 +X86_INS_VPABSQ = 975 +X86_INS_VPABSW = 976 +X86_INS_VPACKSSDW = 977 +X86_INS_VPACKSSWB = 978 +X86_INS_VPACKUSDW = 979 +X86_INS_VPACKUSWB = 980 +X86_INS_VPADDB = 981 +X86_INS_VPADDD = 982 +X86_INS_VPADDQ = 983 +X86_INS_VPADDSB = 984 +X86_INS_VPADDSW = 985 +X86_INS_VPADDUSB = 986 +X86_INS_VPADDUSW = 987 +X86_INS_VPADDW = 988 +X86_INS_VPALIGNR = 989 +X86_INS_VPANDD = 990 +X86_INS_VPANDND = 991 +X86_INS_VPANDNQ = 992 +X86_INS_VPANDN = 993 +X86_INS_VPANDQ = 994 +X86_INS_VPAND = 995 +X86_INS_VPAVGB = 996 +X86_INS_VPAVGW = 997 +X86_INS_VPBLENDD = 998 +X86_INS_VPBLENDMB = 999 +X86_INS_VPBLENDMD = 1000 +X86_INS_VPBLENDMQ = 1001 +X86_INS_VPBLENDMW = 1002 +X86_INS_VPBLENDVB = 1003 +X86_INS_VPBLENDW = 1004 +X86_INS_VPBROADCASTB = 1005 +X86_INS_VPBROADCASTD = 1006 +X86_INS_VPBROADCASTMB2Q = 1007 +X86_INS_VPBROADCASTMW2D = 1008 +X86_INS_VPBROADCASTQ = 1009 +X86_INS_VPBROADCASTW = 1010 +X86_INS_VPCLMULQDQ = 1011 +X86_INS_VPCMOV = 1012 +X86_INS_VPCMPB = 1013 +X86_INS_VPCMPD = 1014 +X86_INS_VPCMPEQB = 1015 +X86_INS_VPCMPEQD = 1016 +X86_INS_VPCMPEQQ = 1017 +X86_INS_VPCMPEQW = 1018 +X86_INS_VPCMPESTRI = 1019 +X86_INS_VPCMPESTRM = 1020 +X86_INS_VPCMPGTB = 1021 +X86_INS_VPCMPGTD = 1022 +X86_INS_VPCMPGTQ = 1023 +X86_INS_VPCMPGTW = 1024 +X86_INS_VPCMPISTRI = 1025 +X86_INS_VPCMPISTRM = 1026 +X86_INS_VPCMPQ = 1027 +X86_INS_VPCMPUB = 1028 +X86_INS_VPCMPUD = 1029 +X86_INS_VPCMPUQ = 1030 +X86_INS_VPCMPUW = 1031 +X86_INS_VPCMPW = 1032 +X86_INS_VPCOMB = 1033 +X86_INS_VPCOMD = 1034 +X86_INS_VPCOMPRESSD = 1035 +X86_INS_VPCOMPRESSQ = 1036 +X86_INS_VPCOMQ = 1037 +X86_INS_VPCOMUB = 1038 +X86_INS_VPCOMUD = 1039 +X86_INS_VPCOMUQ = 1040 +X86_INS_VPCOMUW = 1041 +X86_INS_VPCOMW = 1042 +X86_INS_VPCONFLICTD = 1043 +X86_INS_VPCONFLICTQ = 1044 +X86_INS_VPERM2F128 = 1045 +X86_INS_VPERM2I128 = 1046 +X86_INS_VPERMD = 1047 +X86_INS_VPERMI2D = 1048 +X86_INS_VPERMI2PD = 1049 +X86_INS_VPERMI2PS = 1050 +X86_INS_VPERMI2Q = 1051 +X86_INS_VPERMIL2PD = 1052 +X86_INS_VPERMIL2PS = 1053 +X86_INS_VPERMILPD = 1054 +X86_INS_VPERMILPS = 1055 +X86_INS_VPERMPD = 1056 +X86_INS_VPERMPS = 1057 +X86_INS_VPERMQ = 1058 +X86_INS_VPERMT2D = 1059 +X86_INS_VPERMT2PD = 1060 +X86_INS_VPERMT2PS = 1061 +X86_INS_VPERMT2Q = 1062 +X86_INS_VPEXPANDD = 1063 +X86_INS_VPEXPANDQ = 1064 +X86_INS_VPEXTRB = 1065 +X86_INS_VPEXTRD = 1066 +X86_INS_VPEXTRQ = 1067 +X86_INS_VPEXTRW = 1068 +X86_INS_VPGATHERDD = 1069 +X86_INS_VPGATHERDQ = 1070 +X86_INS_VPGATHERQD = 1071 +X86_INS_VPGATHERQQ = 1072 +X86_INS_VPHADDBD = 1073 +X86_INS_VPHADDBQ = 1074 +X86_INS_VPHADDBW = 1075 +X86_INS_VPHADDDQ = 1076 +X86_INS_VPHADDD = 1077 +X86_INS_VPHADDSW = 1078 +X86_INS_VPHADDUBD = 1079 +X86_INS_VPHADDUBQ = 1080 +X86_INS_VPHADDUBW = 1081 +X86_INS_VPHADDUDQ = 1082 +X86_INS_VPHADDUWD = 1083 +X86_INS_VPHADDUWQ = 1084 +X86_INS_VPHADDWD = 1085 +X86_INS_VPHADDWQ = 1086 +X86_INS_VPHADDW = 1087 +X86_INS_VPHMINPOSUW = 1088 +X86_INS_VPHSUBBW = 1089 +X86_INS_VPHSUBDQ = 1090 +X86_INS_VPHSUBD = 1091 +X86_INS_VPHSUBSW = 1092 +X86_INS_VPHSUBWD = 1093 +X86_INS_VPHSUBW = 1094 +X86_INS_VPINSRB = 1095 +X86_INS_VPINSRD = 1096 +X86_INS_VPINSRQ = 1097 +X86_INS_VPINSRW = 1098 +X86_INS_VPLZCNTD = 1099 +X86_INS_VPLZCNTQ = 1100 +X86_INS_VPMACSDD = 1101 +X86_INS_VPMACSDQH = 1102 +X86_INS_VPMACSDQL = 1103 +X86_INS_VPMACSSDD = 1104 +X86_INS_VPMACSSDQH = 1105 +X86_INS_VPMACSSDQL = 1106 +X86_INS_VPMACSSWD = 1107 +X86_INS_VPMACSSWW = 1108 +X86_INS_VPMACSWD = 1109 +X86_INS_VPMACSWW = 1110 +X86_INS_VPMADCSSWD = 1111 +X86_INS_VPMADCSWD = 1112 +X86_INS_VPMADDUBSW = 1113 +X86_INS_VPMADDWD = 1114 +X86_INS_VPMASKMOVD = 1115 +X86_INS_VPMASKMOVQ = 1116 +X86_INS_VPMAXSB = 1117 +X86_INS_VPMAXSD = 1118 +X86_INS_VPMAXSQ = 1119 +X86_INS_VPMAXSW = 1120 +X86_INS_VPMAXUB = 1121 +X86_INS_VPMAXUD = 1122 +X86_INS_VPMAXUQ = 1123 +X86_INS_VPMAXUW = 1124 +X86_INS_VPMINSB = 1125 +X86_INS_VPMINSD = 1126 +X86_INS_VPMINSQ = 1127 +X86_INS_VPMINSW = 1128 +X86_INS_VPMINUB = 1129 +X86_INS_VPMINUD = 1130 +X86_INS_VPMINUQ = 1131 +X86_INS_VPMINUW = 1132 +X86_INS_VPMOVDB = 1133 +X86_INS_VPMOVDW = 1134 +X86_INS_VPMOVM2B = 1135 +X86_INS_VPMOVM2D = 1136 +X86_INS_VPMOVM2Q = 1137 +X86_INS_VPMOVM2W = 1138 +X86_INS_VPMOVMSKB = 1139 +X86_INS_VPMOVQB = 1140 +X86_INS_VPMOVQD = 1141 +X86_INS_VPMOVQW = 1142 +X86_INS_VPMOVSDB = 1143 +X86_INS_VPMOVSDW = 1144 +X86_INS_VPMOVSQB = 1145 +X86_INS_VPMOVSQD = 1146 +X86_INS_VPMOVSQW = 1147 +X86_INS_VPMOVSXBD = 1148 +X86_INS_VPMOVSXBQ = 1149 +X86_INS_VPMOVSXBW = 1150 +X86_INS_VPMOVSXDQ = 1151 +X86_INS_VPMOVSXWD = 1152 +X86_INS_VPMOVSXWQ = 1153 +X86_INS_VPMOVUSDB = 1154 +X86_INS_VPMOVUSDW = 1155 +X86_INS_VPMOVUSQB = 1156 +X86_INS_VPMOVUSQD = 1157 +X86_INS_VPMOVUSQW = 1158 +X86_INS_VPMOVZXBD = 1159 +X86_INS_VPMOVZXBQ = 1160 +X86_INS_VPMOVZXBW = 1161 +X86_INS_VPMOVZXDQ = 1162 +X86_INS_VPMOVZXWD = 1163 +X86_INS_VPMOVZXWQ = 1164 +X86_INS_VPMULDQ = 1165 +X86_INS_VPMULHRSW = 1166 +X86_INS_VPMULHUW = 1167 +X86_INS_VPMULHW = 1168 +X86_INS_VPMULLD = 1169 +X86_INS_VPMULLQ = 1170 +X86_INS_VPMULLW = 1171 +X86_INS_VPMULUDQ = 1172 +X86_INS_VPORD = 1173 +X86_INS_VPORQ = 1174 +X86_INS_VPOR = 1175 +X86_INS_VPPERM = 1176 +X86_INS_VPROTB = 1177 +X86_INS_VPROTD = 1178 +X86_INS_VPROTQ = 1179 +X86_INS_VPROTW = 1180 +X86_INS_VPSADBW = 1181 +X86_INS_VPSCATTERDD = 1182 +X86_INS_VPSCATTERDQ = 1183 +X86_INS_VPSCATTERQD = 1184 +X86_INS_VPSCATTERQQ = 1185 +X86_INS_VPSHAB = 1186 +X86_INS_VPSHAD = 1187 +X86_INS_VPSHAQ = 1188 +X86_INS_VPSHAW = 1189 +X86_INS_VPSHLB = 1190 +X86_INS_VPSHLD = 1191 +X86_INS_VPSHLQ = 1192 +X86_INS_VPSHLW = 1193 +X86_INS_VPSHUFB = 1194 +X86_INS_VPSHUFD = 1195 +X86_INS_VPSHUFHW = 1196 +X86_INS_VPSHUFLW = 1197 +X86_INS_VPSIGNB = 1198 +X86_INS_VPSIGND = 1199 +X86_INS_VPSIGNW = 1200 +X86_INS_VPSLLDQ = 1201 +X86_INS_VPSLLD = 1202 +X86_INS_VPSLLQ = 1203 +X86_INS_VPSLLVD = 1204 +X86_INS_VPSLLVQ = 1205 +X86_INS_VPSLLW = 1206 +X86_INS_VPSRAD = 1207 +X86_INS_VPSRAQ = 1208 +X86_INS_VPSRAVD = 1209 +X86_INS_VPSRAVQ = 1210 +X86_INS_VPSRAW = 1211 +X86_INS_VPSRLDQ = 1212 +X86_INS_VPSRLD = 1213 +X86_INS_VPSRLQ = 1214 +X86_INS_VPSRLVD = 1215 +X86_INS_VPSRLVQ = 1216 +X86_INS_VPSRLW = 1217 +X86_INS_VPSUBB = 1218 +X86_INS_VPSUBD = 1219 +X86_INS_VPSUBQ = 1220 +X86_INS_VPSUBSB = 1221 +X86_INS_VPSUBSW = 1222 +X86_INS_VPSUBUSB = 1223 +X86_INS_VPSUBUSW = 1224 +X86_INS_VPSUBW = 1225 +X86_INS_VPTESTMD = 1226 +X86_INS_VPTESTMQ = 1227 +X86_INS_VPTESTNMD = 1228 +X86_INS_VPTESTNMQ = 1229 +X86_INS_VPTEST = 1230 +X86_INS_VPUNPCKHBW = 1231 +X86_INS_VPUNPCKHDQ = 1232 +X86_INS_VPUNPCKHQDQ = 1233 +X86_INS_VPUNPCKHWD = 1234 +X86_INS_VPUNPCKLBW = 1235 +X86_INS_VPUNPCKLDQ = 1236 +X86_INS_VPUNPCKLQDQ = 1237 +X86_INS_VPUNPCKLWD = 1238 +X86_INS_VPXORD = 1239 +X86_INS_VPXORQ = 1240 +X86_INS_VPXOR = 1241 +X86_INS_VRCP14PD = 1242 +X86_INS_VRCP14PS = 1243 +X86_INS_VRCP14SD = 1244 +X86_INS_VRCP14SS = 1245 +X86_INS_VRCP28PD = 1246 +X86_INS_VRCP28PS = 1247 +X86_INS_VRCP28SD = 1248 +X86_INS_VRCP28SS = 1249 +X86_INS_VRCPPS = 1250 +X86_INS_VRCPSS = 1251 +X86_INS_VRNDSCALEPD = 1252 +X86_INS_VRNDSCALEPS = 1253 +X86_INS_VRNDSCALESD = 1254 +X86_INS_VRNDSCALESS = 1255 +X86_INS_VROUNDPD = 1256 +X86_INS_VROUNDPS = 1257 +X86_INS_VROUNDSD = 1258 +X86_INS_VROUNDSS = 1259 +X86_INS_VRSQRT14PD = 1260 +X86_INS_VRSQRT14PS = 1261 +X86_INS_VRSQRT14SD = 1262 +X86_INS_VRSQRT14SS = 1263 +X86_INS_VRSQRT28PD = 1264 +X86_INS_VRSQRT28PS = 1265 +X86_INS_VRSQRT28SD = 1266 +X86_INS_VRSQRT28SS = 1267 +X86_INS_VRSQRTPS = 1268 +X86_INS_VRSQRTSS = 1269 +X86_INS_VSCATTERDPD = 1270 +X86_INS_VSCATTERDPS = 1271 +X86_INS_VSCATTERPF0DPD = 1272 +X86_INS_VSCATTERPF0DPS = 1273 +X86_INS_VSCATTERPF0QPD = 1274 +X86_INS_VSCATTERPF0QPS = 1275 +X86_INS_VSCATTERPF1DPD = 1276 +X86_INS_VSCATTERPF1DPS = 1277 +X86_INS_VSCATTERPF1QPD = 1278 +X86_INS_VSCATTERPF1QPS = 1279 +X86_INS_VSCATTERQPD = 1280 +X86_INS_VSCATTERQPS = 1281 +X86_INS_VSHUFPD = 1282 +X86_INS_VSHUFPS = 1283 +X86_INS_VSQRTPD = 1284 +X86_INS_VSQRTPS = 1285 +X86_INS_VSQRTSD = 1286 +X86_INS_VSQRTSS = 1287 +X86_INS_VSTMXCSR = 1288 +X86_INS_VSUBPD = 1289 +X86_INS_VSUBPS = 1290 +X86_INS_VSUBSD = 1291 +X86_INS_VSUBSS = 1292 +X86_INS_VTESTPD = 1293 +X86_INS_VTESTPS = 1294 +X86_INS_VUNPCKHPD = 1295 +X86_INS_VUNPCKHPS = 1296 +X86_INS_VUNPCKLPD = 1297 +X86_INS_VUNPCKLPS = 1298 +X86_INS_VZEROALL = 1299 +X86_INS_VZEROUPPER = 1300 +X86_INS_WAIT = 1301 +X86_INS_WBINVD = 1302 +X86_INS_WRFSBASE = 1303 +X86_INS_WRGSBASE = 1304 +X86_INS_WRMSR = 1305 +X86_INS_XABORT = 1306 +X86_INS_XACQUIRE = 1307 +X86_INS_XBEGIN = 1308 +X86_INS_XCHG = 1309 +X86_INS_XCRYPTCBC = 1310 +X86_INS_XCRYPTCFB = 1311 +X86_INS_XCRYPTCTR = 1312 +X86_INS_XCRYPTECB = 1313 +X86_INS_XCRYPTOFB = 1314 +X86_INS_XEND = 1315 +X86_INS_XGETBV = 1316 +X86_INS_XLATB = 1317 +X86_INS_XRELEASE = 1318 +X86_INS_XRSTOR = 1319 +X86_INS_XRSTOR64 = 1320 +X86_INS_XRSTORS = 1321 +X86_INS_XRSTORS64 = 1322 +X86_INS_XSAVE = 1323 +X86_INS_XSAVE64 = 1324 +X86_INS_XSAVEC = 1325 +X86_INS_XSAVEC64 = 1326 +X86_INS_XSAVEOPT = 1327 +X86_INS_XSAVEOPT64 = 1328 +X86_INS_XSAVES = 1329 +X86_INS_XSAVES64 = 1330 +X86_INS_XSETBV = 1331 +X86_INS_XSHA1 = 1332 +X86_INS_XSHA256 = 1333 +X86_INS_XSTORE = 1334 +X86_INS_XTEST = 1335 +X86_INS_FDISI8087_NOP = 1336 +X86_INS_FENI8087_NOP = 1337 +X86_INS_ENDING = 1338 diff --git a/config.mk b/config.mk new file mode 100644 index 00000000..e5900637 --- /dev/null +++ b/config.mk @@ -0,0 +1,30 @@ +# Unicorn Emulator Engine +# By Nguyen Anh Quynh, 2015 + +# This file contains all customized compile options for Unicorn emulator. +# Consult COMPILE.TXT & docs/README for more details. + +################################################################################ +# Compile with debug info when you want to debug code. +# Change this to 'no' for release edition. + +UNICORN_DEBUG ?= yes + +################################################################################ +# Specify which archs you want to compile in. By default, we build all archs. + +UNICORN_ARCHS ?= x86 m68k arm aarch64 mips sparc + + +################################################################################ +# Change 'UNICORN_STATIC = yes' to 'UNICORN_STATIC = no' to avoid building +# a static library. + +UNICORN_STATIC ?= yes + + +################################################################################ +# Change 'UNICORN_SHARED = yes' to 'UNICORN_SHARED = no' to avoid building +# a shared library. + +UNICORN_SHARED ?= yes diff --git a/docs/BHUSA2015-unicorn.pdf b/docs/BHUSA2015-unicorn.pdf new file mode 100644 index 00000000..90961976 Binary files /dev/null and b/docs/BHUSA2015-unicorn.pdf differ diff --git a/docs/README b/docs/README new file mode 100644 index 00000000..a3039893 --- /dev/null +++ b/docs/README @@ -0,0 +1 @@ +tutorials & docs come here. diff --git a/docs/unicorn-logo.png b/docs/unicorn-logo.png new file mode 100644 index 00000000..3e86b3c7 Binary files /dev/null and b/docs/unicorn-logo.png differ diff --git a/hook.c b/hook.c new file mode 100644 index 00000000..6a26d70d --- /dev/null +++ b/hook.c @@ -0,0 +1,274 @@ +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#include "uc_priv.h" +#include "hook.h" + + +// return index for a new hook entry in hook_callbacks[] array. +// this realloc memory if needed. +size_t hook_find_new(struct uc_struct *uc) +{ + size_t i; + struct hook_struct *new; + + // find the first free slot. skip slot 0, so index > 0 + for(i = 1; i < uc->hook_size; i++) { + if (uc->hook_callbacks[i].callback == NULL) { + return i; + } + } + + // not found, so the array is full. + // we have to realloc hook_callbacks[] to contain new hooks + new = realloc(uc->hook_callbacks, + (uc->hook_size + HOOK_SIZE) * sizeof(uc->hook_callbacks[0])); + if (!new) // OOM ? + return 0; + + // reset the newly added slots + memset(new + uc->hook_size * sizeof(uc->hook_callbacks[0]), 0, + HOOK_SIZE * sizeof(uc->hook_callbacks[0])); + + uc->hook_callbacks = new; + uc->hook_size += HOOK_SIZE; + + // return the first newly allocated slot + return uc->hook_size - HOOK_SIZE; +} + +// return -1 on failure, index to hook_callbacks[] on success. +size_t hook_add(uch handle, int type, uint64_t begin, uint64_t end, void *callback, void *user_data) +{ + int i; + struct uc_struct *uc = (struct uc_struct *)(uintptr_t)handle; + + if (handle == 0) + return -1; + + // find the first free slot. skip slot 0, so index > 0 + i = hook_find_new(uc); + if (i) { + uc->hook_callbacks[i].hook_type = type; + uc->hook_callbacks[i].begin = begin; + uc->hook_callbacks[i].end = end; + uc->hook_callbacks[i].callback = callback; + uc->hook_callbacks[i].user_data = user_data; + + switch(type) { + default: break; + case UC_HOOK_BLOCK: + uc->hook_block = true; + if (begin > end) + uc->hook_block_idx = i; + break; + case UC_HOOK_CODE: + uc->hook_insn = true; + if (begin > end) + uc->hook_insn_idx = i; + break; + case UC_MEM_READ: + uc->hook_mem_read = true; + if (begin > end) + uc->hook_read_idx = i; + break; + case UC_MEM_WRITE: + uc->hook_mem_write = true; + if (begin > end) + uc->hook_write_idx = i; + break; + case UC_MEM_READ_WRITE: + uc->hook_mem_read = true; + uc->hook_mem_write = true; + if (begin > end) { + uc->hook_read_idx = i; + uc->hook_write_idx = i; + } + break; + } + + return i; + } + + // not found + return 0; +} + +// return 0 on success, -1 on failure +uc_err hook_del(uch handle, uch *h2) +{ + struct uc_struct *uc = (struct uc_struct *)(uintptr_t)handle; + + if (handle == 0) + return UC_ERR_UCH; + + if (*h2 == uc->hook_block_idx) { + uc->hook_block_idx = 0; + } + + if (*h2 == uc->hook_insn_idx) { + uc->hook_insn_idx = 0; + } + + if (*h2 == uc->hook_read_idx) { + uc->hook_read_idx = 0; + } + + if (*h2 == uc->hook_write_idx) { + uc->hook_write_idx = 0; + } + + if (*h2 == uc->hook_mem_idx) { + uc->hook_mem_idx = 0; + } + + if (*h2 == uc->hook_intr_idx) { + uc->hook_intr_idx = 0; + } + + if (*h2 == uc->hook_out_idx) { + uc->hook_out_idx = 0; + } + + if (*h2 == uc->hook_in_idx) { + uc->hook_in_idx = 0; + } + + uc->hook_callbacks[*h2].callback = NULL; + uc->hook_callbacks[*h2].user_data = NULL; + uc->hook_callbacks[*h2].hook_type = 0; + uc->hook_callbacks[*h2].begin = 0; + uc->hook_callbacks[*h2].end = 0; + + *h2 = 0; + + return UC_ERR_OK; +} + +// return NULL on failure +static struct hook_struct *_hook_find(struct uc_struct *uc, int type, uint64_t address) +{ + int i; + + switch(type) { + default: break; + case UC_HOOK_BLOCK: + // already hooked all blocks? + if (uc->hook_block_idx) + return &uc->hook_callbacks[uc->hook_block_idx]; + break; + case UC_HOOK_CODE: + // already hooked all the code? + if (uc->hook_insn_idx) + return &uc->hook_callbacks[uc->hook_insn_idx]; + break; + case UC_MEM_READ: + // already hooked all memory read? + if (uc->hook_read_idx) + return &uc->hook_callbacks[uc->hook_read_idx]; + break; + case UC_MEM_WRITE: + // already hooked all memory write? + if (uc->hook_write_idx) + return &uc->hook_callbacks[uc->hook_write_idx]; + break; + } + + // no trace-all callback + for(i = 1; i < uc->hook_size; i++) { + switch(type) { + default: break; + case UC_HOOK_BLOCK: + case UC_HOOK_CODE: + if (uc->hook_callbacks[i].hook_type == type) { + if (uc->hook_callbacks[i].begin <= address && address <= uc->hook_callbacks[i].end) + return &uc->hook_callbacks[i]; + } + break; + case UC_MEM_READ: + if (uc->hook_callbacks[i].hook_type == UC_MEM_READ || uc->hook_callbacks[i].hook_type == UC_MEM_READ_WRITE) { + if (uc->hook_callbacks[i].begin <= address && address <= uc->hook_callbacks[i].end) + return &uc->hook_callbacks[i]; + } + break; + case UC_MEM_WRITE: + if (uc->hook_callbacks[i].hook_type == UC_MEM_WRITE || uc->hook_callbacks[i].hook_type == UC_MEM_READ_WRITE) { + if (uc->hook_callbacks[i].begin <= address && address <= uc->hook_callbacks[i].end) + return &uc->hook_callbacks[i]; + } + break; + } + } + + // not found + return NULL; +} + + +static void hook_count_cb(uch handle, uint64_t address, uint32_t size, void *user_data) +{ + struct uc_struct *uc = (struct uc_struct *)(uintptr_t)handle; + + // count this instruction + uc->emu_counter++; + + if (uc->emu_counter > uc->emu_count) + uc_emu_stop(handle); + else if (uc->hook_count_callback) + uc->hook_count_callback(handle, address, size, user_data); +} + +struct hook_struct *hook_find(uch handle, int type, uint64_t address) +{ + struct uc_struct *uc = (struct uc_struct *)(uintptr_t)handle; + + if (handle == 0) + return NULL; + + // stop executing callbacks if we already got stop request + if (uc->stop_request) + return NULL; + + // UC_HOOK_CODE is special because we may need to count instructions + if (type == UC_HOOK_CODE && uc->emu_count > 0) { + struct hook_struct *st = _hook_find(uc, type, address); + if (st) { + // prepare this struct to pass back to caller + uc->hook_count.hook_type = UC_HOOK_CODE; + uc->hook_count.begin = st->begin; + uc->hook_count.end = st->end; + uc->hook_count.callback = hook_count_cb; + uc->hook_count.user_data = st->user_data; + // save this hook callback so we can call it later + uc->hook_count_callback = st->callback; + } else { + // there is no callback, but we still need to + // handle instruction count + uc->hook_count.hook_type = UC_HOOK_CODE; + uc->hook_count.begin = 1; + uc->hook_count.end = 0; + uc->hook_count.callback = hook_count_cb; + uc->hook_count.user_data = NULL; + uc->hook_count_callback = NULL; // no callback + } + + return &(uc->hook_count); + } else + return _hook_find(uc, type, address); +} + + +// TCG helper +void helper_uc_tracecode(int32_t size, void *callback, void *handle, int64_t address, void *user_data); +void helper_uc_tracecode(int32_t size, void *callback, void *handle, int64_t address, void *user_data) +{ + struct uc_struct *uc = handle; + + // sync PC in CPUArchState with address + if (uc->set_pc) { + uc->set_pc(uc, address); + } + + ((uc_cb_hookcode_t)callback)((uch)handle, address, size, user_data); +} + diff --git a/include/hook.h b/include/hook.h new file mode 100644 index 00000000..5441071f --- /dev/null +++ b/include/hook.h @@ -0,0 +1,20 @@ +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifndef UC_HOOK_H +#define UC_HOOK_H + +// return -1 on failure, index to traces[] on success. +size_t hook_add(uch handle, int type, uint64_t begin, uint64_t end, void *callback, void *user_data); + +// return 0 on success, -1 on failure +uc_err hook_del(uch handle, uch *traceh); + +// return NULL on failure +struct hook_struct *hook_find(uch handle, int type, uint64_t address); + +// return index of an free hook entry in hook_callbacks[] array. +// this realloc memory if needed. +size_t hook_find_new(struct uc_struct *uc); + +#endif diff --git a/include/qemu.h b/include/qemu.h new file mode 100644 index 00000000..f0a727e3 --- /dev/null +++ b/include/qemu.h @@ -0,0 +1,54 @@ +/* By Dang Hoang Vu , 2015 */ + +#ifndef UC_QEMU_H +#define UC_QEMU_H + +struct uc_struct; + +#define OPC_BUF_SIZE 640 + +#include "sysemu/sysemu.h" +#include "sysemu/cpus.h" +#include "exec/cpu-common.h" +#include "exec/memory.h" + +#include "qemu/thread.h" +#include "include/qom/cpu.h" +#include "exec/spinlock.h" + +#include "vl.h" + +// This two struct is originally from qemu/include/exec/cpu-all.h +// Temporarily moved here since there is circular inclusion. +typedef struct RAMBlock { + struct MemoryRegion *mr; + uint8_t *host; + ram_addr_t offset; + ram_addr_t length; + uint32_t flags; + char idstr[256]; + /* Reads can take either the iothread or the ramlist lock. + * Writes must take both locks. + */ + QTAILQ_ENTRY(RAMBlock) next; + int fd; +} RAMBlock; + +typedef struct { + MemoryRegion *mr; + void *buffer; + hwaddr addr; + hwaddr len; +} BounceBuffer; + +typedef struct RAMList { + QemuMutex mutex; + /* Protected by the iothread lock. */ + unsigned long *dirty_memory[DIRTY_MEMORY_NUM]; + RAMBlock *mru_block; + /* Protected by the ramlist lock. */ + QTAILQ_HEAD(, RAMBlock) blocks; + uint32_t version; +} RAMList; + +#endif diff --git a/include/qemu_macro.h b/include/qemu_macro.h new file mode 100644 index 00000000..08093713 --- /dev/null +++ b/include/qemu_macro.h @@ -0,0 +1,13 @@ +/* By Dang Hoang Vu , 2015 */ + +#ifndef UC_QEMU_MACRO_H +#define UC_QEMU_MACRO_H + +#define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node) +#define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &uc->cpus, node) +#define CPU_FOREACH_SAFE(cpu, next_cpu) \ + QTAILQ_FOREACH_SAFE(cpu, &cpu->uc->cpus, node, next_cpu) +#define first_cpu QTAILQ_FIRST(&uc->cpus) + +#endif + diff --git a/include/uc_priv.h b/include/uc_priv.h new file mode 100644 index 00000000..9b46a520 --- /dev/null +++ b/include/uc_priv.h @@ -0,0 +1,170 @@ +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifndef UC_PRIV_H +#define UC_PRIV_H + +#include +#include + +#include "qemu.h" +#include "unicorn/unicorn.h" +#include "hook.h" + +#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) + +QTAILQ_HEAD(CPUTailQ, CPUState); + +typedef struct ModuleEntry { + void (*init)(void); + QTAILQ_ENTRY(ModuleEntry) node; + module_init_type type; +} ModuleEntry; + +typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList; + +// return 0 on success, -1 on failure +typedef int (*reg_access_t)(uch handle, unsigned int regid, void *value); + +typedef void (*reg_reset_t)(uch handle); + +typedef bool (*uc_write_mem_t)(AddressSpace *as, hwaddr addr, uint8_t *buf, int len); + +typedef bool (*uc_read_mem_t)(AddressSpace *as, hwaddr addr, uint8_t *buf, int len); + +typedef void (*uc_args_void_t)(void*); + +typedef void (*uc_args_uc_t)(struct uc_struct*); + +typedef bool (*uc_args_tcg_enable_t)(struct uc_struct*); + +typedef void (*uc_minit_t)(struct uc_struct*, ram_addr_t); + +typedef void (*uc_args_uc_long_t)(struct uc_struct*, unsigned long); + +typedef void (*uc_args_uc_u64_t)(struct uc_struct *, uint64_t addr); + +typedef int (*uc_args_uc_ram_size_t)(struct uc_struct*, ram_addr_t begin, size_t size); + +// which interrupt should make emulation stop? +typedef bool (*uc_args_int_t)(int intno); + + +struct hook_struct { + int hook_type; // uc_tracecode_type & uc_tracemem_type + uint64_t begin, end; // range of address to be monitored + void *callback; // either uc_cb_tracecode_t or uc_cb_tracemem_t + void *user_data; +}; + +// extend memory to keep 32 more hooks each time +#define HOOK_SIZE 32 + +struct uc_struct { + uc_arch arch; + uc_mode mode; + QemuMutex qemu_global_mutex; // qemu/cpus.c + QemuCond qemu_cpu_cond; // qemu/cpus.c + QemuThread *tcg_cpu_thread; // qemu/cpus.c + QemuCond *tcg_halt_cond; // qemu/cpus.c + struct CPUTailQ cpus; // qemu/cpu-exec.c + uc_err errnum; // qemu/cpu-exec.c + AddressSpace as; + reg_access_t reg_read, reg_write; + reg_reset_t reg_reset; + + uc_write_mem_t write_mem; + uc_read_mem_t read_mem; + uc_args_void_t release; // release resource when uc_close() + uc_args_uc_u64_t set_pc; // set PC for tracecode + uc_args_int_t stop_interrupt; // check if the interrupt should stop emulation + + uc_args_uc_t init_arch, pause_all_vcpus, vm_start, cpu_exec_init_all; + uc_args_tcg_enable_t tcg_enabled; + uc_args_uc_long_t tcg_exec_init; + uc_args_uc_ram_size_t memory_map; + // list of cpu + void* cpu; + + MemoryRegion *system_memory; // qemu/exec.c + MemoryRegion *ram; + MemoryRegion io_mem_rom; // qemu/exec.c + MemoryRegion io_mem_notdirty; // qemu/exec.c + MemoryRegion io_mem_unassigned; // qemu/exec.c + MemoryRegion io_mem_watch; // qemu/exec.c + RAMList ram_list; // qemu/exec.c + CPUState *next_cpu; // qemu/cpus.c + BounceBuffer bounce; // qemu/cpu-exec.c + volatile sig_atomic_t exit_request; // qemu/cpu-exec.c + spinlock_t x86_global_cpu_lock; // for X86 arch only + bool global_dirty_log; // qemu/memory.c + /* This is a multi-level map on the virtual address space. + The bottom level has pointers to PageDesc. */ + void *l1_map; // qemu/translate-all.c + size_t l1_map_size; + /* code generation context */ + void *tcg_ctx; // for "TCGContext tcg_ctx" in qemu/translate-all.c + /* memory.c */ + unsigned memory_region_transaction_depth; + bool memory_region_update_pending; + bool ioeventfd_update_pending; + QemuMutex flat_view_mutex; + QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners; + QTAILQ_HEAD(, AddressSpace) address_spaces; + // qom/object.c + GHashTable *type_table; + Type type_interface; + Object *root; + bool enumerating_types; + // util/module.c + ModuleTypeList init_type_list[MODULE_INIT_MAX]; + // hw/intc/apic_common.c + DeviceState *vapic; + int apic_no; + bool mmio_registered; + bool apic_report_tpr_access; + CPUState *current_cpu; + + // all the hook callbacks + size_t hook_size; + struct hook_struct *hook_callbacks; + + // hook to count number of instructions for uc_emu_start() + struct hook_struct hook_count; + uc_cb_hookcode_t hook_count_callback; + + size_t emu_counter; // current counter of uc_emu_start() + size_t emu_count; // save counter of uc_emu_start() + + // indexes if hooking ALL block/code/read/write events + unsigned int hook_block_idx, hook_insn_idx, hook_read_idx, hook_write_idx; + // boolean variables for quick check on hooking block, code, memory accesses + bool hook_block, hook_insn, hook_mem_read, hook_mem_write; + uint64_t block_addr; // save the last block address we hooked + // indexes to event callbacks + int hook_mem_idx; // for handling invalid memory access + int hook_intr_idx; // for handling interrupt + int hook_out_idx; // for handling OUT instruction (X86) + int hook_in_idx; // for handling IN instruction (X86) + + + bool init_tcg; // already initialized local TCGv variables? + bool stop_request; // request to immediately stop emulation - for uc_emu_stop() + bool emulation_done; // emulation is done by uc_emu_start() + QemuThread timer; // timer for emulation timeout + uint64_t timeout; // timeout for uc_emu_start() + + uint64_t invalid_addr; // invalid address to be accessed + int invalid_error; // invalid memory code: 1 = READ, 2 = WRITE, 3 = CODE + + uint64_t addr_end; // address where emulation stops (@end param of uc_emu_start()) + + int thumb; // thumb mode for ARM +}; + +#include "qemu_macro.h" + +// check if this address is mapped in (via uc_mem_map()) +bool memory_mapping(uint64_t address); + +#endif diff --git a/include/unicorn/arm.h b/include/unicorn/arm.h new file mode 100644 index 00000000..4fc96ec6 --- /dev/null +++ b/include/unicorn/arm.h @@ -0,0 +1,146 @@ +#ifndef UNICORN_ARM_H +#define UNICORN_ARM_H + +/* Unicorn Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> ARM registers +typedef enum arm_reg { + ARM_REG_INVALID = 0, + ARM_REG_APSR, + ARM_REG_APSR_NZCV, + ARM_REG_CPSR, + ARM_REG_FPEXC, + ARM_REG_FPINST, + ARM_REG_FPSCR, + ARM_REG_FPSCR_NZCV, + ARM_REG_FPSID, + ARM_REG_ITSTATE, + ARM_REG_LR, + ARM_REG_PC, + ARM_REG_SP, + ARM_REG_SPSR, + ARM_REG_D0, + ARM_REG_D1, + ARM_REG_D2, + ARM_REG_D3, + ARM_REG_D4, + ARM_REG_D5, + ARM_REG_D6, + ARM_REG_D7, + ARM_REG_D8, + ARM_REG_D9, + ARM_REG_D10, + ARM_REG_D11, + ARM_REG_D12, + ARM_REG_D13, + ARM_REG_D14, + ARM_REG_D15, + ARM_REG_D16, + ARM_REG_D17, + ARM_REG_D18, + ARM_REG_D19, + ARM_REG_D20, + ARM_REG_D21, + ARM_REG_D22, + ARM_REG_D23, + ARM_REG_D24, + ARM_REG_D25, + ARM_REG_D26, + ARM_REG_D27, + ARM_REG_D28, + ARM_REG_D29, + ARM_REG_D30, + ARM_REG_D31, + ARM_REG_FPINST2, + ARM_REG_MVFR0, + ARM_REG_MVFR1, + ARM_REG_MVFR2, + ARM_REG_Q0, + ARM_REG_Q1, + ARM_REG_Q2, + ARM_REG_Q3, + ARM_REG_Q4, + ARM_REG_Q5, + ARM_REG_Q6, + ARM_REG_Q7, + ARM_REG_Q8, + ARM_REG_Q9, + ARM_REG_Q10, + ARM_REG_Q11, + ARM_REG_Q12, + ARM_REG_Q13, + ARM_REG_Q14, + ARM_REG_Q15, + ARM_REG_R0, + ARM_REG_R1, + ARM_REG_R2, + ARM_REG_R3, + ARM_REG_R4, + ARM_REG_R5, + ARM_REG_R6, + ARM_REG_R7, + ARM_REG_R8, + ARM_REG_R9, + ARM_REG_R10, + ARM_REG_R11, + ARM_REG_R12, + ARM_REG_S0, + ARM_REG_S1, + ARM_REG_S2, + ARM_REG_S3, + ARM_REG_S4, + ARM_REG_S5, + ARM_REG_S6, + ARM_REG_S7, + ARM_REG_S8, + ARM_REG_S9, + ARM_REG_S10, + ARM_REG_S11, + ARM_REG_S12, + ARM_REG_S13, + ARM_REG_S14, + ARM_REG_S15, + ARM_REG_S16, + ARM_REG_S17, + ARM_REG_S18, + ARM_REG_S19, + ARM_REG_S20, + ARM_REG_S21, + ARM_REG_S22, + ARM_REG_S23, + ARM_REG_S24, + ARM_REG_S25, + ARM_REG_S26, + ARM_REG_S27, + ARM_REG_S28, + ARM_REG_S29, + ARM_REG_S30, + ARM_REG_S31, + + ARM_REG_ENDING, // <-- mark the end of the list or registers + + //> alias registers + ARM_REG_R13 = ARM_REG_SP, + ARM_REG_R14 = ARM_REG_LR, + ARM_REG_R15 = ARM_REG_PC, + + ARM_REG_SB = ARM_REG_R9, + ARM_REG_SL = ARM_REG_R10, + ARM_REG_FP = ARM_REG_R11, + ARM_REG_IP = ARM_REG_R12, +} arm_reg; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/arm64.h b/include/unicorn/arm64.h new file mode 100644 index 00000000..3543c371 --- /dev/null +++ b/include/unicorn/arm64.h @@ -0,0 +1,297 @@ +#ifndef UNICORN_ARM64_H +#define UNICORN_ARM64_H + +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> ARM64 registers +typedef enum arm64_reg { + ARM64_REG_INVALID = 0, + + ARM64_REG_X29, + ARM64_REG_X30, + ARM64_REG_NZCV, + ARM64_REG_SP, + ARM64_REG_WSP, + ARM64_REG_WZR, + ARM64_REG_XZR, + ARM64_REG_B0, + ARM64_REG_B1, + ARM64_REG_B2, + ARM64_REG_B3, + ARM64_REG_B4, + ARM64_REG_B5, + ARM64_REG_B6, + ARM64_REG_B7, + ARM64_REG_B8, + ARM64_REG_B9, + ARM64_REG_B10, + ARM64_REG_B11, + ARM64_REG_B12, + ARM64_REG_B13, + ARM64_REG_B14, + ARM64_REG_B15, + ARM64_REG_B16, + ARM64_REG_B17, + ARM64_REG_B18, + ARM64_REG_B19, + ARM64_REG_B20, + ARM64_REG_B21, + ARM64_REG_B22, + ARM64_REG_B23, + ARM64_REG_B24, + ARM64_REG_B25, + ARM64_REG_B26, + ARM64_REG_B27, + ARM64_REG_B28, + ARM64_REG_B29, + ARM64_REG_B30, + ARM64_REG_B31, + ARM64_REG_D0, + ARM64_REG_D1, + ARM64_REG_D2, + ARM64_REG_D3, + ARM64_REG_D4, + ARM64_REG_D5, + ARM64_REG_D6, + ARM64_REG_D7, + ARM64_REG_D8, + ARM64_REG_D9, + ARM64_REG_D10, + ARM64_REG_D11, + ARM64_REG_D12, + ARM64_REG_D13, + ARM64_REG_D14, + ARM64_REG_D15, + ARM64_REG_D16, + ARM64_REG_D17, + ARM64_REG_D18, + ARM64_REG_D19, + ARM64_REG_D20, + ARM64_REG_D21, + ARM64_REG_D22, + ARM64_REG_D23, + ARM64_REG_D24, + ARM64_REG_D25, + ARM64_REG_D26, + ARM64_REG_D27, + ARM64_REG_D28, + ARM64_REG_D29, + ARM64_REG_D30, + ARM64_REG_D31, + ARM64_REG_H0, + ARM64_REG_H1, + ARM64_REG_H2, + ARM64_REG_H3, + ARM64_REG_H4, + ARM64_REG_H5, + ARM64_REG_H6, + ARM64_REG_H7, + ARM64_REG_H8, + ARM64_REG_H9, + ARM64_REG_H10, + ARM64_REG_H11, + ARM64_REG_H12, + ARM64_REG_H13, + ARM64_REG_H14, + ARM64_REG_H15, + ARM64_REG_H16, + ARM64_REG_H17, + ARM64_REG_H18, + ARM64_REG_H19, + ARM64_REG_H20, + ARM64_REG_H21, + ARM64_REG_H22, + ARM64_REG_H23, + ARM64_REG_H24, + ARM64_REG_H25, + ARM64_REG_H26, + ARM64_REG_H27, + ARM64_REG_H28, + ARM64_REG_H29, + ARM64_REG_H30, + ARM64_REG_H31, + ARM64_REG_Q0, + ARM64_REG_Q1, + ARM64_REG_Q2, + ARM64_REG_Q3, + ARM64_REG_Q4, + ARM64_REG_Q5, + ARM64_REG_Q6, + ARM64_REG_Q7, + ARM64_REG_Q8, + ARM64_REG_Q9, + ARM64_REG_Q10, + ARM64_REG_Q11, + ARM64_REG_Q12, + ARM64_REG_Q13, + ARM64_REG_Q14, + ARM64_REG_Q15, + ARM64_REG_Q16, + ARM64_REG_Q17, + ARM64_REG_Q18, + ARM64_REG_Q19, + ARM64_REG_Q20, + ARM64_REG_Q21, + ARM64_REG_Q22, + ARM64_REG_Q23, + ARM64_REG_Q24, + ARM64_REG_Q25, + ARM64_REG_Q26, + ARM64_REG_Q27, + ARM64_REG_Q28, + ARM64_REG_Q29, + ARM64_REG_Q30, + ARM64_REG_Q31, + ARM64_REG_S0, + ARM64_REG_S1, + ARM64_REG_S2, + ARM64_REG_S3, + ARM64_REG_S4, + ARM64_REG_S5, + ARM64_REG_S6, + ARM64_REG_S7, + ARM64_REG_S8, + ARM64_REG_S9, + ARM64_REG_S10, + ARM64_REG_S11, + ARM64_REG_S12, + ARM64_REG_S13, + ARM64_REG_S14, + ARM64_REG_S15, + ARM64_REG_S16, + ARM64_REG_S17, + ARM64_REG_S18, + ARM64_REG_S19, + ARM64_REG_S20, + ARM64_REG_S21, + ARM64_REG_S22, + ARM64_REG_S23, + ARM64_REG_S24, + ARM64_REG_S25, + ARM64_REG_S26, + ARM64_REG_S27, + ARM64_REG_S28, + ARM64_REG_S29, + ARM64_REG_S30, + ARM64_REG_S31, + ARM64_REG_W0, + ARM64_REG_W1, + ARM64_REG_W2, + ARM64_REG_W3, + ARM64_REG_W4, + ARM64_REG_W5, + ARM64_REG_W6, + ARM64_REG_W7, + ARM64_REG_W8, + ARM64_REG_W9, + ARM64_REG_W10, + ARM64_REG_W11, + ARM64_REG_W12, + ARM64_REG_W13, + ARM64_REG_W14, + ARM64_REG_W15, + ARM64_REG_W16, + ARM64_REG_W17, + ARM64_REG_W18, + ARM64_REG_W19, + ARM64_REG_W20, + ARM64_REG_W21, + ARM64_REG_W22, + ARM64_REG_W23, + ARM64_REG_W24, + ARM64_REG_W25, + ARM64_REG_W26, + ARM64_REG_W27, + ARM64_REG_W28, + ARM64_REG_W29, + ARM64_REG_W30, + ARM64_REG_X0, + ARM64_REG_X1, + ARM64_REG_X2, + ARM64_REG_X3, + ARM64_REG_X4, + ARM64_REG_X5, + ARM64_REG_X6, + ARM64_REG_X7, + ARM64_REG_X8, + ARM64_REG_X9, + ARM64_REG_X10, + ARM64_REG_X11, + ARM64_REG_X12, + ARM64_REG_X13, + ARM64_REG_X14, + ARM64_REG_X15, + ARM64_REG_X16, + ARM64_REG_X17, + ARM64_REG_X18, + ARM64_REG_X19, + ARM64_REG_X20, + ARM64_REG_X21, + ARM64_REG_X22, + ARM64_REG_X23, + ARM64_REG_X24, + ARM64_REG_X25, + ARM64_REG_X26, + ARM64_REG_X27, + ARM64_REG_X28, + + ARM64_REG_V0, + ARM64_REG_V1, + ARM64_REG_V2, + ARM64_REG_V3, + ARM64_REG_V4, + ARM64_REG_V5, + ARM64_REG_V6, + ARM64_REG_V7, + ARM64_REG_V8, + ARM64_REG_V9, + ARM64_REG_V10, + ARM64_REG_V11, + ARM64_REG_V12, + ARM64_REG_V13, + ARM64_REG_V14, + ARM64_REG_V15, + ARM64_REG_V16, + ARM64_REG_V17, + ARM64_REG_V18, + ARM64_REG_V19, + ARM64_REG_V20, + ARM64_REG_V21, + ARM64_REG_V22, + ARM64_REG_V23, + ARM64_REG_V24, + ARM64_REG_V25, + ARM64_REG_V26, + ARM64_REG_V27, + ARM64_REG_V28, + ARM64_REG_V29, + ARM64_REG_V30, + ARM64_REG_V31, + + //> pseudo registers + ARM64_REG_PC, // program counter register + + ARM64_REG_ENDING, // <-- mark the end of the list of registers + + //> alias registers + + ARM64_REG_IP1 = ARM64_REG_X16, + ARM64_REG_IP0 = ARM64_REG_X17, + ARM64_REG_FP = ARM64_REG_X29, + ARM64_REG_LR = ARM64_REG_X30, +} arm64_reg; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/m68k.h b/include/unicorn/m68k.h new file mode 100644 index 00000000..ff080a1c --- /dev/null +++ b/include/unicorn/m68k.h @@ -0,0 +1,50 @@ +#ifndef UNICORN_M68K_H +#define UNICORN_M68K_H + +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2014-2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "platform.h" + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> M68K registers +typedef enum m68k_reg { + M68K_REG_INVALID = 0, + + M68K_REG_A0, + M68K_REG_A1, + M68K_REG_A2, + M68K_REG_A3, + M68K_REG_A4, + M68K_REG_A5, + M68K_REG_A6, + M68K_REG_A7, + + M68K_REG_D0, + M68K_REG_D1, + M68K_REG_D2, + M68K_REG_D3, + M68K_REG_D4, + M68K_REG_D5, + M68K_REG_D6, + M68K_REG_D7, + + M68K_REG_SR, + M68K_REG_PC, + + M68K_REG_ENDING, // <-- mark the end of the list of registers +} m68k_reg; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/mips.h b/include/unicorn/mips.h new file mode 100644 index 00000000..0884fbd0 --- /dev/null +++ b/include/unicorn/mips.h @@ -0,0 +1,226 @@ +#ifndef UNICORN_MIPS_H +#define UNICORN_MIPS_H + +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +// GCC MIPS toolchain has a default macro called "mips" which breaks +// compilation +#undef mips + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> MIPS registers +typedef enum mips_reg { + MIPS_REG_INVALID = 0, + //> General purpose registers + MIPS_REG_PC, + + MIPS_REG_0, + MIPS_REG_1, + MIPS_REG_2, + MIPS_REG_3, + MIPS_REG_4, + MIPS_REG_5, + MIPS_REG_6, + MIPS_REG_7, + MIPS_REG_8, + MIPS_REG_9, + MIPS_REG_10, + MIPS_REG_11, + MIPS_REG_12, + MIPS_REG_13, + MIPS_REG_14, + MIPS_REG_15, + MIPS_REG_16, + MIPS_REG_17, + MIPS_REG_18, + MIPS_REG_19, + MIPS_REG_20, + MIPS_REG_21, + MIPS_REG_22, + MIPS_REG_23, + MIPS_REG_24, + MIPS_REG_25, + MIPS_REG_26, + MIPS_REG_27, + MIPS_REG_28, + MIPS_REG_29, + MIPS_REG_30, + MIPS_REG_31, + + //> DSP registers + MIPS_REG_DSPCCOND, + MIPS_REG_DSPCARRY, + MIPS_REG_DSPEFI, + MIPS_REG_DSPOUTFLAG, + MIPS_REG_DSPOUTFLAG16_19, + MIPS_REG_DSPOUTFLAG20, + MIPS_REG_DSPOUTFLAG21, + MIPS_REG_DSPOUTFLAG22, + MIPS_REG_DSPOUTFLAG23, + MIPS_REG_DSPPOS, + MIPS_REG_DSPSCOUNT, + + //> ACC registers + MIPS_REG_AC0, + MIPS_REG_AC1, + MIPS_REG_AC2, + MIPS_REG_AC3, + + //> COP registers + MIPS_REG_CC0, + MIPS_REG_CC1, + MIPS_REG_CC2, + MIPS_REG_CC3, + MIPS_REG_CC4, + MIPS_REG_CC5, + MIPS_REG_CC6, + MIPS_REG_CC7, + + //> FPU registers + MIPS_REG_F0, + MIPS_REG_F1, + MIPS_REG_F2, + MIPS_REG_F3, + MIPS_REG_F4, + MIPS_REG_F5, + MIPS_REG_F6, + MIPS_REG_F7, + MIPS_REG_F8, + MIPS_REG_F9, + MIPS_REG_F10, + MIPS_REG_F11, + MIPS_REG_F12, + MIPS_REG_F13, + MIPS_REG_F14, + MIPS_REG_F15, + MIPS_REG_F16, + MIPS_REG_F17, + MIPS_REG_F18, + MIPS_REG_F19, + MIPS_REG_F20, + MIPS_REG_F21, + MIPS_REG_F22, + MIPS_REG_F23, + MIPS_REG_F24, + MIPS_REG_F25, + MIPS_REG_F26, + MIPS_REG_F27, + MIPS_REG_F28, + MIPS_REG_F29, + MIPS_REG_F30, + MIPS_REG_F31, + + MIPS_REG_FCC0, + MIPS_REG_FCC1, + MIPS_REG_FCC2, + MIPS_REG_FCC3, + MIPS_REG_FCC4, + MIPS_REG_FCC5, + MIPS_REG_FCC6, + MIPS_REG_FCC7, + + //> AFPR128 + MIPS_REG_W0, + MIPS_REG_W1, + MIPS_REG_W2, + MIPS_REG_W3, + MIPS_REG_W4, + MIPS_REG_W5, + MIPS_REG_W6, + MIPS_REG_W7, + MIPS_REG_W8, + MIPS_REG_W9, + MIPS_REG_W10, + MIPS_REG_W11, + MIPS_REG_W12, + MIPS_REG_W13, + MIPS_REG_W14, + MIPS_REG_W15, + MIPS_REG_W16, + MIPS_REG_W17, + MIPS_REG_W18, + MIPS_REG_W19, + MIPS_REG_W20, + MIPS_REG_W21, + MIPS_REG_W22, + MIPS_REG_W23, + MIPS_REG_W24, + MIPS_REG_W25, + MIPS_REG_W26, + MIPS_REG_W27, + MIPS_REG_W28, + MIPS_REG_W29, + MIPS_REG_W30, + MIPS_REG_W31, + + MIPS_REG_HI, + MIPS_REG_LO, + + MIPS_REG_P0, + MIPS_REG_P1, + MIPS_REG_P2, + + MIPS_REG_MPL0, + MIPS_REG_MPL1, + MIPS_REG_MPL2, + + MIPS_REG_ENDING, // <-- mark the end of the list or registers + + // alias registers + MIPS_REG_ZERO = MIPS_REG_0, + MIPS_REG_AT = MIPS_REG_1, + MIPS_REG_V0 = MIPS_REG_2, + MIPS_REG_V1 = MIPS_REG_3, + MIPS_REG_A0 = MIPS_REG_4, + MIPS_REG_A1 = MIPS_REG_5, + MIPS_REG_A2 = MIPS_REG_6, + MIPS_REG_A3 = MIPS_REG_7, + MIPS_REG_T0 = MIPS_REG_8, + MIPS_REG_T1 = MIPS_REG_9, + MIPS_REG_T2 = MIPS_REG_10, + MIPS_REG_T3 = MIPS_REG_11, + MIPS_REG_T4 = MIPS_REG_12, + MIPS_REG_T5 = MIPS_REG_13, + MIPS_REG_T6 = MIPS_REG_14, + MIPS_REG_T7 = MIPS_REG_15, + MIPS_REG_S0 = MIPS_REG_16, + MIPS_REG_S1 = MIPS_REG_17, + MIPS_REG_S2 = MIPS_REG_18, + MIPS_REG_S3 = MIPS_REG_19, + MIPS_REG_S4 = MIPS_REG_20, + MIPS_REG_S5 = MIPS_REG_21, + MIPS_REG_S6 = MIPS_REG_22, + MIPS_REG_S7 = MIPS_REG_23, + MIPS_REG_T8 = MIPS_REG_24, + MIPS_REG_T9 = MIPS_REG_25, + MIPS_REG_K0 = MIPS_REG_26, + MIPS_REG_K1 = MIPS_REG_27, + MIPS_REG_GP = MIPS_REG_28, + MIPS_REG_SP = MIPS_REG_29, + MIPS_REG_FP = MIPS_REG_30, MIPS_REG_S8 = MIPS_REG_30, + MIPS_REG_RA = MIPS_REG_31, + + MIPS_REG_HI0 = MIPS_REG_AC0, + MIPS_REG_HI1 = MIPS_REG_AC1, + MIPS_REG_HI2 = MIPS_REG_AC2, + MIPS_REG_HI3 = MIPS_REG_AC3, + + MIPS_REG_LO0 = MIPS_REG_HI0, + MIPS_REG_LO1 = MIPS_REG_HI1, + MIPS_REG_LO2 = MIPS_REG_HI2, + MIPS_REG_LO3 = MIPS_REG_HI3, +} mips_reg; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/platform.h b/include/unicorn/platform.h new file mode 100644 index 00000000..c1e80623 --- /dev/null +++ b/include/unicorn/platform.h @@ -0,0 +1,28 @@ +/* Unicorn Emulator Engine */ +/* By Axel Souchet & Nguyen Anh Quynh, 2014 */ + +// handle C99 issue (for pre-2013 VisualStudio) +#ifndef UNICORN_PLATFORM_H +#define UNICORN_PLATFORM_H + +#if !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64)) +// MSVC + +// stdbool.h +#if (_MSC_VER < 1800) +#ifndef __cplusplus +typedef unsigned char bool; +#define false 0 +#define true 1 +#endif + +#else +// VisualStudio 2013+ -> C99 is supported +#include +#endif + +#else // not MSVC -> C99 is supported +#include +#endif + +#endif diff --git a/include/unicorn/sparc.h b/include/unicorn/sparc.h new file mode 100644 index 00000000..830347d5 --- /dev/null +++ b/include/unicorn/sparc.h @@ -0,0 +1,130 @@ +#ifndef UNICORN_SPARC_H +#define UNICORN_SPARC_H + +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2014-2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "platform.h" + +// GCC SPARC toolchain has a default macro called "sparc" which breaks +// compilation +#undef sparc + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> SPARC registers +typedef enum sparc_reg { + SPARC_REG_INVALID = 0, + + SPARC_REG_F0, + SPARC_REG_F1, + SPARC_REG_F2, + SPARC_REG_F3, + SPARC_REG_F4, + SPARC_REG_F5, + SPARC_REG_F6, + SPARC_REG_F7, + SPARC_REG_F8, + SPARC_REG_F9, + SPARC_REG_F10, + SPARC_REG_F11, + SPARC_REG_F12, + SPARC_REG_F13, + SPARC_REG_F14, + SPARC_REG_F15, + SPARC_REG_F16, + SPARC_REG_F17, + SPARC_REG_F18, + SPARC_REG_F19, + SPARC_REG_F20, + SPARC_REG_F21, + SPARC_REG_F22, + SPARC_REG_F23, + SPARC_REG_F24, + SPARC_REG_F25, + SPARC_REG_F26, + SPARC_REG_F27, + SPARC_REG_F28, + SPARC_REG_F29, + SPARC_REG_F30, + SPARC_REG_F31, + SPARC_REG_F32, + SPARC_REG_F34, + SPARC_REG_F36, + SPARC_REG_F38, + SPARC_REG_F40, + SPARC_REG_F42, + SPARC_REG_F44, + SPARC_REG_F46, + SPARC_REG_F48, + SPARC_REG_F50, + SPARC_REG_F52, + SPARC_REG_F54, + SPARC_REG_F56, + SPARC_REG_F58, + SPARC_REG_F60, + SPARC_REG_F62, + SPARC_REG_FCC0, // Floating condition codes + SPARC_REG_FCC1, + SPARC_REG_FCC2, + SPARC_REG_FCC3, + SPARC_REG_FP, + SPARC_REG_G0, + SPARC_REG_G1, + SPARC_REG_G2, + SPARC_REG_G3, + SPARC_REG_G4, + SPARC_REG_G5, + SPARC_REG_G6, + SPARC_REG_G7, + SPARC_REG_I0, + SPARC_REG_I1, + SPARC_REG_I2, + SPARC_REG_I3, + SPARC_REG_I4, + SPARC_REG_I5, + SPARC_REG_I7, + SPARC_REG_ICC, // Integer condition codes + SPARC_REG_L0, + SPARC_REG_L1, + SPARC_REG_L2, + SPARC_REG_L3, + SPARC_REG_L4, + SPARC_REG_L5, + SPARC_REG_L6, + SPARC_REG_L7, + SPARC_REG_O0, + SPARC_REG_O1, + SPARC_REG_O2, + SPARC_REG_O3, + SPARC_REG_O4, + SPARC_REG_O5, + SPARC_REG_O7, + SPARC_REG_SP, + SPARC_REG_Y, + + // special register + SPARC_REG_XCC, + + // pseudo register + SPARC_REG_PC, // program counter register + + SPARC_REG_ENDING, // <-- mark the end of the list of registers + + // extras + SPARC_REG_O6 = SPARC_REG_SP, + SPARC_REG_I6 = SPARC_REG_FP, +} sparc_reg; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/unicorn.h b/include/unicorn/unicorn.h new file mode 100644 index 00000000..afc958c8 --- /dev/null +++ b/include/unicorn/unicorn.h @@ -0,0 +1,408 @@ +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifndef UNICORN_ENGINE_H +#define UNICORN_ENGINE_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#if defined(UNICORN_HAS_OSXKERNEL) +#include +#else +#include +#include +#endif + +#include "platform.h" + +#include "m68k.h" +#include "x86.h" +#include "arm.h" +#include "arm64.h" +#include "mips.h" +#include "sparc.h" + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#pragma warning(disable:4100) +#ifdef UNICORN_SHARED +#define UNICORN_EXPORT __declspec(dllexport) +#else // defined(UNICORN_STATIC) +#define UNICORN_EXPORT +#endif +#else +#ifdef __GNUC__ +#define UNICORN_EXPORT __attribute__((visibility("default"))) +#else +#define UNICORN_EXPORT +#endif +#endif + +#ifdef __GNUC__ +#define UNICORN_DEPRECATED __attribute__((deprecated)) +#elif defined(_MSC_VER) +#define UNICORN_DEPRECATED __declspec(deprecated) +#else +#pragma message("WARNING: You need to implement UNICORN_DEPRECATED for this compiler") +#define UNICORN_DEPRECATED +#endif + +// Unicorn API version +#define UC_API_MAJOR 0 +#define UC_API_MINOR 9 + +// Macro to create combined version which can be compared to +// result of uc_version() API. +#define UC_MAKE_VERSION(major, minor) ((major << 8) + minor) + +// Scales to calculate timeout on microsecond unit +// 1 second = 1000,000 microseconds +#define UC_SECOND_SCALE 1000000 +// 1 milisecond = 1000 nanoseconds +#define UC_MILISECOND_SCALE 1000 + +// Handle using with all API +typedef size_t uch; + +// Architecture type +typedef enum uc_arch { + UC_ARCH_ARM = 1, // ARM architecture (including Thumb, Thumb-2) + UC_ARCH_ARM64, // ARM-64, also called AArch64 + UC_ARCH_MIPS, // Mips architecture + UC_ARCH_X86, // X86 architecture (including x86 & x86-64) + UC_ARCH_PPC, // PowerPC architecture + UC_ARCH_SPARC, // Sparc architecture + UC_ARCH_M68K, // M68K architecture + UC_ARCH_MAX, + UC_ARCH_ALL = 0xFFFF, // All architectures - for uc_support() +} uc_arch; + +// Mode type +typedef enum uc_mode { + UC_MODE_LITTLE_ENDIAN = 0, // little-endian mode (default mode) + UC_MODE_ARM = 0, // 32-bit ARM + UC_MODE_16 = 1 << 1, // 16-bit mode (X86) + UC_MODE_32 = 1 << 2, // 32-bit mode (X86) + UC_MODE_64 = 1 << 3, // 64-bit mode (X86, PPC) + UC_MODE_THUMB = 1 << 4, // ARM's Thumb mode, including Thumb-2 + UC_MODE_MCLASS = 1 << 5, // ARM's Cortex-M series + UC_MODE_V8 = 1 << 6, // ARMv8 A32 encodings for ARM + UC_MODE_MICRO = 1 << 4, // MicroMips mode (MIPS) + UC_MODE_MIPS3 = 1 << 5, // Mips III ISA + UC_MODE_MIPS32R6 = 1 << 6, // Mips32r6 ISA + UC_MODE_V9 = 1 << 4, // SparcV9 mode (Sparc) + UC_MODE_QPX = 1 << 4, // Quad Processing eXtensions mode (PPC) + UC_MODE_BIG_ENDIAN = 1 << 31, // big-endian mode + UC_MODE_MIPS32 = UC_MODE_32, // Mips32 ISA (Mips) + UC_MODE_MIPS64 = UC_MODE_64, // Mips64 ISA (Mips) +} uc_mode; + +// All type of errors encountered by Unicorn API. +// These are values returned by uc_errno() +typedef enum uc_err { + UC_ERR_OK = 0, // No error: everything was fine + UC_ERR_OOM, // Out-Of-Memory error: uc_open(), uc_emulate() + UC_ERR_ARCH, // Unsupported architecture: uc_open() + UC_ERR_HANDLE, // Invalid handle + UC_ERR_UCH, // Invalid handle (uch) + UC_ERR_MODE, // Invalid/unsupported mode: uc_open() + UC_ERR_VERSION, // Unsupported version (bindings) + UC_ERR_MEM_READ, // Quit emulation due to invalid memory READ: uc_emu_start() + UC_ERR_MEM_WRITE, // Quit emulation due to invalid memory WRITE: uc_emu_start() + UC_ERR_CODE_INVALID, // Quit emulation due to invalid code address: uc_emu_start() + UC_ERR_HOOK, // Invalid hook type: uc_hook_add() + UC_ERR_INSN_INVALID, // Quit emulation due to invalid instruction: uc_emu_start() +} uc_err; + + +// Callback function for tracing code (UC_HOOK_CODE & UC_HOOK_BLOCK) +// @address: address where the code is being executed +// @size: size of machine instruction being executed +// @user_data: user data passed to tracing APIs. +typedef void (*uc_cb_hookcode_t)(uch handle, uint64_t address, uint32_t size, void *user_data); + +// Callback function for tracing interrupts (for uc_hook_intr()) +// @intno: interrupt number +// @user_data: user data passed to tracing APIs. +typedef void (*uc_cb_hookintr_t)(uch handle, uint32_t intno, void *user_data); + +// Callback function for tracing IN instruction of X86 +// @port: port number +// @size: data size (1/2/4) to be read from this port +// @user_data: user data passed to tracing APIs. +typedef uint32_t (*uc_cb_insn_in_t)(uch handle, uint32_t port, int size, void *user_data); + +// x86's handler for OUT +// @port: port number +// @size: data size (1/2/4) to be written to this port +// @value: data value to be written to this port +typedef void (*uc_cb_insn_out_t)(uch handle, uint32_t port, int size, uint32_t value, void *user_data); + +// All type of memory accesses for UC_HOOK_MEM_* +typedef enum uc_mem_type { + UC_MEM_READ = 16, // Memory is read from + UC_MEM_WRITE, // Memory is written to + UC_MEM_READ_WRITE, // Memory is accessed (either READ or WRITE) +} uc_mem_type; + +// All type of hooks for uc_hook_add() API. +typedef enum uc_hook_t { + UC_HOOK_INTR = 32, // Hook all interrupt events + UC_HOOK_INSN, // Hook a particular instruction + UC_HOOK_CODE, // Hook a range of code + UC_HOOK_BLOCK, // Hook basic blocks + UC_HOOK_MEM_INVALID, // Hook for all invalid memory access events + UC_HOOK_MEM_READ, // Hook all memory read events. + UC_HOOK_MEM_WRITE, // Hook all memory write events. + UC_HOOK_MEM_READ_WRITE, // Hook all memory accesses (either READ or WRITE). +} uc_hook_t; + +// Callback function for hooking memory (UC_HOOK_MEM_*) +// @type: this memory is being READ, or WRITE +// @address: address where the code is being executed +// @size: size of data being read or written +// @value: value of data being written to memory, or irrelevant if type = READ. +// @user_data: user data passed to tracing APIs +typedef void (*uc_cb_hookmem_t)(uch handle, uc_mem_type type, + uint64_t address, int size, int64_t value, void *user_data); + +// Callback function for handling memory events (for UC_HOOK_MEM_INVALID) +// @type: this memory is being READ, or WRITE +// @address: address where the code is being executed +// @size: size of data being read or written +// @value: value of data being written to memory, or irrelevant if type = READ. +// @user_data: user data passed to tracing APIs +// @return: return true to continue, or false to stop program (due to invalid memory). +typedef bool (*uc_cb_eventmem_t)(uch handle, uc_mem_type type, + uint64_t address, int size, int64_t value, void *user_data); + + +/* + Return combined API version & major and minor version numbers. + + @major: major number of API version + @minor: minor number of API version + + @return hexical number as (major << 8 | minor), which encodes both + major & minor versions. + NOTE: This returned value can be compared with version number made + with macro UC_MAKE_VERSION + + For example, second API version would return 1 in @major, and 1 in @minor + The return value would be 0x0101 + + NOTE: if you only care about returned value, but not major and minor values, + set both @major & @minor arguments to NULL. +*/ +UNICORN_EXPORT +unsigned int uc_version(unsigned int *major, unsigned int *minor); + + +/* + This API can be used to either ask for archs supported by this library. + + To check if a particular arch is supported by this library, set @query to + arch mode (UC_ARCH_* value). + To verify if this library supports all the archs, use UC_ARCH_ALL. + + @return True if this library supports the given arch. +*/ +UNICORN_EXPORT +bool uc_support(int query); + + +/* + Initialize UC handle: this must be done before any usage of UC. + + @arch: architecture type (UC_ARCH_*) + @mode: hardware mode. This is combined of UC_MODE_* + @handle: pointer to handle, which will be updated at return time + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_open(uc_arch arch, uc_mode mode, uch *handle); + +/* + Close UC handle: MUST do to release the handle when it is not used anymore. + NOTE: this must be called only when there is no longer usage of Unicorn. + The reason is the this API releases some cached memory, thus access to any + Unicorn API after uc_close() might crash your application. + After this, @handle is invalid, and nolonger usable. + + @handle: pointer to a handle returned by uc_open() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_close(uch *handle); + +/* + Report the last error number when some API function fail. + Like glibc's errno, uc_errno might not retain its old value once accessed. + + @handle: handle returned by uc_open() + + @return: error code of uc_err enum type (UC_ERR_*, see above) +*/ +UNICORN_EXPORT +uc_err uc_errno(uch handle); + +/* + Return a string describing given error code. + + @code: error code (see UC_ERR_* above) + + @return: returns a pointer to a string that describes the error code + passed in the argument @code + */ +UNICORN_EXPORT +const char *uc_strerror(uc_err code); + +/* + Write to register. + + @handle: handle returned by uc_open() + @regid: register ID that is to be modified. + @value: pointer to the value that will set to register @regid + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_reg_write(uch handle, int regid, void *value); + +/* + Read register value. + + @handle: handle returned by uc_open() + @regid: register ID that is to be retrieved. + @value: pointer to a variable storing the register value. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_reg_read(uch handle, int regid, void *value); + +/* + Write to a range of bytes in memory. + + @handle: handle returned by uc_open() + @address: starting memory address of bytes to set. + @bytes: pointer to a variable containing data to be written to memory. + @size: size of memory to write to. + + NOTE: @bytes must be big enough to contain @size bytes. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_mem_write(uch handle, uint64_t address, uint8_t *bytes, size_t size); + +/* + Read a range of bytes in memory. + + @handle: handle returned by uc_open() + @address: starting memory address of bytes to get. + @bytes: pointer to a variable containing data copied from memory. + @size: size of memory to read. + + NOTE: @bytes must be big enough to contain @size bytes. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_mem_read(uch handle, uint64_t address, uint8_t *bytes, size_t size); + +/* + Emulate machine code in a specific duration of time. + + @handle: handle returned by uc_open() + @begin: address where emulation starts + @until: address where emulation stops (i.e when this address is hit) + @timeout: duration to emulate the code (in microseconds). When this value is 0, + we will emulate the code in infinite time, until the code is finished. + @count: the number of instructions to be emulated. When this value is 0, + we will emulate all the code available, until the code is finished. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_emu_start(uch handle, uint64_t begin, uint64_t until, uint64_t timeout, size_t count); + +/* + Stop emulation (which was started by uc_emu_start() API. + This is typically called from callback functions registered via tracing APIs. + NOTE: for now, this will stop the execution only after the current block. + + @handle: handle returned by uc_open() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_emu_stop(uch handle); + +/* + Register callback for a hook event. + The callback will be run when the hook event is hit. + + @handle: handle returned by uc_open() + @h2: hook handle returned from this registration. To be used in uc_hook_del() API + @type: hook type + @callback: callback to be run when instruction is hit + @user_data: user-defined data. This will be passed to callback function in its + last argument @user_data + @...: variable arguments (depending on @type) + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_hook_add(uch handle, uch *h2, uc_hook_t type, void *callback, void *user_data, ...); + +/* + Unregister (remove) a hook callback. + This API removes the hook callback registered by uc_hook_add(). + NOTE: this should be called only when you no longer want to trace. + After this, @hhandle is invalid, and nolonger usable. + + @handle: handle returned by uc_open() + @h2: handle returned by uc_hook_add() + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_hook_del(uch handle, uch *h2); + +/* + Map memory in for emulation. + This API adds a memory region that can be used by emulation. + + @handle: handle returned by uc_open() + @address: starting address of the new memory region to be mapped in. + @size: size of the new memory region to be mapped in. This will be round up to + the next 8KB boundary. + + @return UC_ERR_OK on success, or other value on failure (refer to uc_err enum + for detailed error). +*/ +UNICORN_EXPORT +uc_err uc_mem_map(uch handle, uint64_t address, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/unicorn/x86.h b/include/unicorn/x86.h new file mode 100644 index 00000000..5bdcae6f --- /dev/null +++ b/include/unicorn/x86.h @@ -0,0 +1,1416 @@ +#ifndef UNICORN_X86_H +#define UNICORN_X86_H + +/* Unicorn Emulator Engine */ +/* By Nguyen Anh Quynh , 2015 */ + +#ifdef __cplusplus +extern "C" { +#endif + +//> X86 registers +typedef enum x86_reg { + X86_REG_INVALID = 0, + X86_REG_AH, X86_REG_AL, X86_REG_AX, X86_REG_BH, X86_REG_BL, + X86_REG_BP, X86_REG_BPL, X86_REG_BX, X86_REG_CH, X86_REG_CL, + X86_REG_CS, X86_REG_CX, X86_REG_DH, X86_REG_DI, X86_REG_DIL, + X86_REG_DL, X86_REG_DS, X86_REG_DX, X86_REG_EAX, X86_REG_EBP, + X86_REG_EBX, X86_REG_ECX, X86_REG_EDI, X86_REG_EDX, X86_REG_EFLAGS, + X86_REG_EIP, X86_REG_EIZ, X86_REG_ES, X86_REG_ESI, X86_REG_ESP, + X86_REG_FPSW, X86_REG_FS, X86_REG_GS, X86_REG_IP, X86_REG_RAX, + X86_REG_RBP, X86_REG_RBX, X86_REG_RCX, X86_REG_RDI, X86_REG_RDX, + X86_REG_RIP, X86_REG_RIZ, X86_REG_RSI, X86_REG_RSP, X86_REG_SI, + X86_REG_SIL, X86_REG_SP, X86_REG_SPL, X86_REG_SS, X86_REG_CR0, + X86_REG_CR1, X86_REG_CR2, X86_REG_CR3, X86_REG_CR4, X86_REG_CR5, + X86_REG_CR6, X86_REG_CR7, X86_REG_CR8, X86_REG_CR9, X86_REG_CR10, + X86_REG_CR11, X86_REG_CR12, X86_REG_CR13, X86_REG_CR14, X86_REG_CR15, + X86_REG_DR0, X86_REG_DR1, X86_REG_DR2, X86_REG_DR3, X86_REG_DR4, + X86_REG_DR5, X86_REG_DR6, X86_REG_DR7, X86_REG_DR8, X86_REG_DR9, + X86_REG_DR10, X86_REG_DR11, X86_REG_DR12, X86_REG_DR13, X86_REG_DR14, + X86_REG_DR15, X86_REG_FP0, X86_REG_FP1, X86_REG_FP2, X86_REG_FP3, + X86_REG_FP4, X86_REG_FP5, X86_REG_FP6, X86_REG_FP7, + X86_REG_K0, X86_REG_K1, X86_REG_K2, X86_REG_K3, X86_REG_K4, + X86_REG_K5, X86_REG_K6, X86_REG_K7, X86_REG_MM0, X86_REG_MM1, + X86_REG_MM2, X86_REG_MM3, X86_REG_MM4, X86_REG_MM5, X86_REG_MM6, + X86_REG_MM7, X86_REG_R8, X86_REG_R9, X86_REG_R10, X86_REG_R11, + X86_REG_R12, X86_REG_R13, X86_REG_R14, X86_REG_R15, + X86_REG_ST0, X86_REG_ST1, X86_REG_ST2, X86_REG_ST3, + X86_REG_ST4, X86_REG_ST5, X86_REG_ST6, X86_REG_ST7, + X86_REG_XMM0, X86_REG_XMM1, X86_REG_XMM2, X86_REG_XMM3, X86_REG_XMM4, + X86_REG_XMM5, X86_REG_XMM6, X86_REG_XMM7, X86_REG_XMM8, X86_REG_XMM9, + X86_REG_XMM10, X86_REG_XMM11, X86_REG_XMM12, X86_REG_XMM13, X86_REG_XMM14, + X86_REG_XMM15, X86_REG_XMM16, X86_REG_XMM17, X86_REG_XMM18, X86_REG_XMM19, + X86_REG_XMM20, X86_REG_XMM21, X86_REG_XMM22, X86_REG_XMM23, X86_REG_XMM24, + X86_REG_XMM25, X86_REG_XMM26, X86_REG_XMM27, X86_REG_XMM28, X86_REG_XMM29, + X86_REG_XMM30, X86_REG_XMM31, X86_REG_YMM0, X86_REG_YMM1, X86_REG_YMM2, + X86_REG_YMM3, X86_REG_YMM4, X86_REG_YMM5, X86_REG_YMM6, X86_REG_YMM7, + X86_REG_YMM8, X86_REG_YMM9, X86_REG_YMM10, X86_REG_YMM11, X86_REG_YMM12, + X86_REG_YMM13, X86_REG_YMM14, X86_REG_YMM15, X86_REG_YMM16, X86_REG_YMM17, + X86_REG_YMM18, X86_REG_YMM19, X86_REG_YMM20, X86_REG_YMM21, X86_REG_YMM22, + X86_REG_YMM23, X86_REG_YMM24, X86_REG_YMM25, X86_REG_YMM26, X86_REG_YMM27, + X86_REG_YMM28, X86_REG_YMM29, X86_REG_YMM30, X86_REG_YMM31, X86_REG_ZMM0, + X86_REG_ZMM1, X86_REG_ZMM2, X86_REG_ZMM3, X86_REG_ZMM4, X86_REG_ZMM5, + X86_REG_ZMM6, X86_REG_ZMM7, X86_REG_ZMM8, X86_REG_ZMM9, X86_REG_ZMM10, + X86_REG_ZMM11, X86_REG_ZMM12, X86_REG_ZMM13, X86_REG_ZMM14, X86_REG_ZMM15, + X86_REG_ZMM16, X86_REG_ZMM17, X86_REG_ZMM18, X86_REG_ZMM19, X86_REG_ZMM20, + X86_REG_ZMM21, X86_REG_ZMM22, X86_REG_ZMM23, X86_REG_ZMM24, X86_REG_ZMM25, + X86_REG_ZMM26, X86_REG_ZMM27, X86_REG_ZMM28, X86_REG_ZMM29, X86_REG_ZMM30, + X86_REG_ZMM31, X86_REG_R8B, X86_REG_R9B, X86_REG_R10B, X86_REG_R11B, + X86_REG_R12B, X86_REG_R13B, X86_REG_R14B, X86_REG_R15B, X86_REG_R8D, + X86_REG_R9D, X86_REG_R10D, X86_REG_R11D, X86_REG_R12D, X86_REG_R13D, + X86_REG_R14D, X86_REG_R15D, X86_REG_R8W, X86_REG_R9W, X86_REG_R10W, + X86_REG_R11W, X86_REG_R12W, X86_REG_R13W, X86_REG_R14W, X86_REG_R15W, + + X86_REG_ENDING // <-- mark the end of the list of registers +} x86_reg; + +//> X86 instructions +typedef enum x86_insn { + X86_INS_INVALID = 0, + + X86_INS_AAA, + X86_INS_AAD, + X86_INS_AAM, + X86_INS_AAS, + X86_INS_FABS, + X86_INS_ADC, + X86_INS_ADCX, + X86_INS_ADD, + X86_INS_ADDPD, + X86_INS_ADDPS, + X86_INS_ADDSD, + X86_INS_ADDSS, + X86_INS_ADDSUBPD, + X86_INS_ADDSUBPS, + X86_INS_FADD, + X86_INS_FIADD, + X86_INS_FADDP, + X86_INS_ADOX, + X86_INS_AESDECLAST, + X86_INS_AESDEC, + X86_INS_AESENCLAST, + X86_INS_AESENC, + X86_INS_AESIMC, + X86_INS_AESKEYGENASSIST, + X86_INS_AND, + X86_INS_ANDN, + X86_INS_ANDNPD, + X86_INS_ANDNPS, + X86_INS_ANDPD, + X86_INS_ANDPS, + X86_INS_ARPL, + X86_INS_BEXTR, + X86_INS_BLCFILL, + X86_INS_BLCI, + X86_INS_BLCIC, + X86_INS_BLCMSK, + X86_INS_BLCS, + X86_INS_BLENDPD, + X86_INS_BLENDPS, + X86_INS_BLENDVPD, + X86_INS_BLENDVPS, + X86_INS_BLSFILL, + X86_INS_BLSI, + X86_INS_BLSIC, + X86_INS_BLSMSK, + X86_INS_BLSR, + X86_INS_BOUND, + X86_INS_BSF, + X86_INS_BSR, + X86_INS_BSWAP, + X86_INS_BT, + X86_INS_BTC, + X86_INS_BTR, + X86_INS_BTS, + X86_INS_BZHI, + X86_INS_CALL, + X86_INS_CBW, + X86_INS_CDQ, + X86_INS_CDQE, + X86_INS_FCHS, + X86_INS_CLAC, + X86_INS_CLC, + X86_INS_CLD, + X86_INS_CLFLUSH, + X86_INS_CLFLUSHOPT, + X86_INS_CLGI, + X86_INS_CLI, + X86_INS_CLTS, + X86_INS_CLWB, + X86_INS_CMC, + X86_INS_CMOVA, + X86_INS_CMOVAE, + X86_INS_CMOVB, + X86_INS_CMOVBE, + X86_INS_FCMOVBE, + X86_INS_FCMOVB, + X86_INS_CMOVE, + X86_INS_FCMOVE, + X86_INS_CMOVG, + X86_INS_CMOVGE, + X86_INS_CMOVL, + X86_INS_CMOVLE, + X86_INS_FCMOVNBE, + X86_INS_FCMOVNB, + X86_INS_CMOVNE, + X86_INS_FCMOVNE, + X86_INS_CMOVNO, + X86_INS_CMOVNP, + X86_INS_FCMOVNU, + X86_INS_CMOVNS, + X86_INS_CMOVO, + X86_INS_CMOVP, + X86_INS_FCMOVU, + X86_INS_CMOVS, + X86_INS_CMP, + X86_INS_CMPPD, + X86_INS_CMPPS, + X86_INS_CMPSB, + X86_INS_CMPSD, + X86_INS_CMPSQ, + X86_INS_CMPSS, + X86_INS_CMPSW, + X86_INS_CMPXCHG16B, + X86_INS_CMPXCHG, + X86_INS_CMPXCHG8B, + X86_INS_COMISD, + X86_INS_COMISS, + X86_INS_FCOMP, + X86_INS_FCOMPI, + X86_INS_FCOMI, + X86_INS_FCOM, + X86_INS_FCOS, + X86_INS_CPUID, + X86_INS_CQO, + X86_INS_CRC32, + X86_INS_CVTDQ2PD, + X86_INS_CVTDQ2PS, + X86_INS_CVTPD2DQ, + X86_INS_CVTPD2PS, + X86_INS_CVTPS2DQ, + X86_INS_CVTPS2PD, + X86_INS_CVTSD2SI, + X86_INS_CVTSD2SS, + X86_INS_CVTSI2SD, + X86_INS_CVTSI2SS, + X86_INS_CVTSS2SD, + X86_INS_CVTSS2SI, + X86_INS_CVTTPD2DQ, + X86_INS_CVTTPS2DQ, + X86_INS_CVTTSD2SI, + X86_INS_CVTTSS2SI, + X86_INS_CWD, + X86_INS_CWDE, + X86_INS_DAA, + X86_INS_DAS, + X86_INS_DATA16, + X86_INS_DEC, + X86_INS_DIV, + X86_INS_DIVPD, + X86_INS_DIVPS, + X86_INS_FDIVR, + X86_INS_FIDIVR, + X86_INS_FDIVRP, + X86_INS_DIVSD, + X86_INS_DIVSS, + X86_INS_FDIV, + X86_INS_FIDIV, + X86_INS_FDIVP, + X86_INS_DPPD, + X86_INS_DPPS, + X86_INS_RET, + X86_INS_ENCLS, + X86_INS_ENCLU, + X86_INS_ENTER, + X86_INS_EXTRACTPS, + X86_INS_EXTRQ, + X86_INS_F2XM1, + X86_INS_LCALL, + X86_INS_LJMP, + X86_INS_FBLD, + X86_INS_FBSTP, + X86_INS_FCOMPP, + X86_INS_FDECSTP, + X86_INS_FEMMS, + X86_INS_FFREE, + X86_INS_FICOM, + X86_INS_FICOMP, + X86_INS_FINCSTP, + X86_INS_FLDCW, + X86_INS_FLDENV, + X86_INS_FLDL2E, + X86_INS_FLDL2T, + X86_INS_FLDLG2, + X86_INS_FLDLN2, + X86_INS_FLDPI, + X86_INS_FNCLEX, + X86_INS_FNINIT, + X86_INS_FNOP, + X86_INS_FNSTCW, + X86_INS_FNSTSW, + X86_INS_FPATAN, + X86_INS_FPREM, + X86_INS_FPREM1, + X86_INS_FPTAN, + X86_INS_FFREEP, + X86_INS_FRNDINT, + X86_INS_FRSTOR, + X86_INS_FNSAVE, + X86_INS_FSCALE, + X86_INS_FSETPM, + X86_INS_FSINCOS, + X86_INS_FNSTENV, + X86_INS_FXAM, + X86_INS_FXRSTOR, + X86_INS_FXRSTOR64, + X86_INS_FXSAVE, + X86_INS_FXSAVE64, + X86_INS_FXTRACT, + X86_INS_FYL2X, + X86_INS_FYL2XP1, + X86_INS_MOVAPD, + X86_INS_MOVAPS, + X86_INS_ORPD, + X86_INS_ORPS, + X86_INS_VMOVAPD, + X86_INS_VMOVAPS, + X86_INS_XORPD, + X86_INS_XORPS, + X86_INS_GETSEC, + X86_INS_HADDPD, + X86_INS_HADDPS, + X86_INS_HLT, + X86_INS_HSUBPD, + X86_INS_HSUBPS, + X86_INS_IDIV, + X86_INS_FILD, + X86_INS_IMUL, + X86_INS_IN, + X86_INS_INC, + X86_INS_INSB, + X86_INS_INSERTPS, + X86_INS_INSERTQ, + X86_INS_INSD, + X86_INS_INSW, + X86_INS_INT, + X86_INS_INT1, + X86_INS_INT3, + X86_INS_INTO, + X86_INS_INVD, + X86_INS_INVEPT, + X86_INS_INVLPG, + X86_INS_INVLPGA, + X86_INS_INVPCID, + X86_INS_INVVPID, + X86_INS_IRET, + X86_INS_IRETD, + X86_INS_IRETQ, + X86_INS_FISTTP, + X86_INS_FIST, + X86_INS_FISTP, + X86_INS_UCOMISD, + X86_INS_UCOMISS, + X86_INS_VCOMISD, + X86_INS_VCOMISS, + X86_INS_VCVTSD2SS, + X86_INS_VCVTSI2SD, + X86_INS_VCVTSI2SS, + X86_INS_VCVTSS2SD, + X86_INS_VCVTTSD2SI, + X86_INS_VCVTTSD2USI, + X86_INS_VCVTTSS2SI, + X86_INS_VCVTTSS2USI, + X86_INS_VCVTUSI2SD, + X86_INS_VCVTUSI2SS, + X86_INS_VUCOMISD, + X86_INS_VUCOMISS, + X86_INS_JAE, + X86_INS_JA, + X86_INS_JBE, + X86_INS_JB, + X86_INS_JCXZ, + X86_INS_JECXZ, + X86_INS_JE, + X86_INS_JGE, + X86_INS_JG, + X86_INS_JLE, + X86_INS_JL, + X86_INS_JMP, + X86_INS_JNE, + X86_INS_JNO, + X86_INS_JNP, + X86_INS_JNS, + X86_INS_JO, + X86_INS_JP, + X86_INS_JRCXZ, + X86_INS_JS, + X86_INS_KANDB, + X86_INS_KANDD, + X86_INS_KANDNB, + X86_INS_KANDND, + X86_INS_KANDNQ, + X86_INS_KANDNW, + X86_INS_KANDQ, + X86_INS_KANDW, + X86_INS_KMOVB, + X86_INS_KMOVD, + X86_INS_KMOVQ, + X86_INS_KMOVW, + X86_INS_KNOTB, + X86_INS_KNOTD, + X86_INS_KNOTQ, + X86_INS_KNOTW, + X86_INS_KORB, + X86_INS_KORD, + X86_INS_KORQ, + X86_INS_KORTESTB, + X86_INS_KORTESTD, + X86_INS_KORTESTQ, + X86_INS_KORTESTW, + X86_INS_KORW, + X86_INS_KSHIFTLB, + X86_INS_KSHIFTLD, + X86_INS_KSHIFTLQ, + X86_INS_KSHIFTLW, + X86_INS_KSHIFTRB, + X86_INS_KSHIFTRD, + X86_INS_KSHIFTRQ, + X86_INS_KSHIFTRW, + X86_INS_KUNPCKBW, + X86_INS_KXNORB, + X86_INS_KXNORD, + X86_INS_KXNORQ, + X86_INS_KXNORW, + X86_INS_KXORB, + X86_INS_KXORD, + X86_INS_KXORQ, + X86_INS_KXORW, + X86_INS_LAHF, + X86_INS_LAR, + X86_INS_LDDQU, + X86_INS_LDMXCSR, + X86_INS_LDS, + X86_INS_FLDZ, + X86_INS_FLD1, + X86_INS_FLD, + X86_INS_LEA, + X86_INS_LEAVE, + X86_INS_LES, + X86_INS_LFENCE, + X86_INS_LFS, + X86_INS_LGDT, + X86_INS_LGS, + X86_INS_LIDT, + X86_INS_LLDT, + X86_INS_LMSW, + X86_INS_OR, + X86_INS_SUB, + X86_INS_XOR, + X86_INS_LODSB, + X86_INS_LODSD, + X86_INS_LODSQ, + X86_INS_LODSW, + X86_INS_LOOP, + X86_INS_LOOPE, + X86_INS_LOOPNE, + X86_INS_RETF, + X86_INS_RETFQ, + X86_INS_LSL, + X86_INS_LSS, + X86_INS_LTR, + X86_INS_XADD, + X86_INS_LZCNT, + X86_INS_MASKMOVDQU, + X86_INS_MAXPD, + X86_INS_MAXPS, + X86_INS_MAXSD, + X86_INS_MAXSS, + X86_INS_MFENCE, + X86_INS_MINPD, + X86_INS_MINPS, + X86_INS_MINSD, + X86_INS_MINSS, + X86_INS_CVTPD2PI, + X86_INS_CVTPI2PD, + X86_INS_CVTPI2PS, + X86_INS_CVTPS2PI, + X86_INS_CVTTPD2PI, + X86_INS_CVTTPS2PI, + X86_INS_EMMS, + X86_INS_MASKMOVQ, + X86_INS_MOVD, + X86_INS_MOVDQ2Q, + X86_INS_MOVNTQ, + X86_INS_MOVQ2DQ, + X86_INS_MOVQ, + X86_INS_PABSB, + X86_INS_PABSD, + X86_INS_PABSW, + X86_INS_PACKSSDW, + X86_INS_PACKSSWB, + X86_INS_PACKUSWB, + X86_INS_PADDB, + X86_INS_PADDD, + X86_INS_PADDQ, + X86_INS_PADDSB, + X86_INS_PADDSW, + X86_INS_PADDUSB, + X86_INS_PADDUSW, + X86_INS_PADDW, + X86_INS_PALIGNR, + X86_INS_PANDN, + X86_INS_PAND, + X86_INS_PAVGB, + X86_INS_PAVGW, + X86_INS_PCMPEQB, + X86_INS_PCMPEQD, + X86_INS_PCMPEQW, + X86_INS_PCMPGTB, + X86_INS_PCMPGTD, + X86_INS_PCMPGTW, + X86_INS_PEXTRW, + X86_INS_PHADDSW, + X86_INS_PHADDW, + X86_INS_PHADDD, + X86_INS_PHSUBD, + X86_INS_PHSUBSW, + X86_INS_PHSUBW, + X86_INS_PINSRW, + X86_INS_PMADDUBSW, + X86_INS_PMADDWD, + X86_INS_PMAXSW, + X86_INS_PMAXUB, + X86_INS_PMINSW, + X86_INS_PMINUB, + X86_INS_PMOVMSKB, + X86_INS_PMULHRSW, + X86_INS_PMULHUW, + X86_INS_PMULHW, + X86_INS_PMULLW, + X86_INS_PMULUDQ, + X86_INS_POR, + X86_INS_PSADBW, + X86_INS_PSHUFB, + X86_INS_PSHUFW, + X86_INS_PSIGNB, + X86_INS_PSIGND, + X86_INS_PSIGNW, + X86_INS_PSLLD, + X86_INS_PSLLQ, + X86_INS_PSLLW, + X86_INS_PSRAD, + X86_INS_PSRAW, + X86_INS_PSRLD, + X86_INS_PSRLQ, + X86_INS_PSRLW, + X86_INS_PSUBB, + X86_INS_PSUBD, + X86_INS_PSUBQ, + X86_INS_PSUBSB, + X86_INS_PSUBSW, + X86_INS_PSUBUSB, + X86_INS_PSUBUSW, + X86_INS_PSUBW, + X86_INS_PUNPCKHBW, + X86_INS_PUNPCKHDQ, + X86_INS_PUNPCKHWD, + X86_INS_PUNPCKLBW, + X86_INS_PUNPCKLDQ, + X86_INS_PUNPCKLWD, + X86_INS_PXOR, + X86_INS_MONITOR, + X86_INS_MONTMUL, + X86_INS_MOV, + X86_INS_MOVABS, + X86_INS_MOVBE, + X86_INS_MOVDDUP, + X86_INS_MOVDQA, + X86_INS_MOVDQU, + X86_INS_MOVHLPS, + X86_INS_MOVHPD, + X86_INS_MOVHPS, + X86_INS_MOVLHPS, + X86_INS_MOVLPD, + X86_INS_MOVLPS, + X86_INS_MOVMSKPD, + X86_INS_MOVMSKPS, + X86_INS_MOVNTDQA, + X86_INS_MOVNTDQ, + X86_INS_MOVNTI, + X86_INS_MOVNTPD, + X86_INS_MOVNTPS, + X86_INS_MOVNTSD, + X86_INS_MOVNTSS, + X86_INS_MOVSB, + X86_INS_MOVSD, + X86_INS_MOVSHDUP, + X86_INS_MOVSLDUP, + X86_INS_MOVSQ, + X86_INS_MOVSS, + X86_INS_MOVSW, + X86_INS_MOVSX, + X86_INS_MOVSXD, + X86_INS_MOVUPD, + X86_INS_MOVUPS, + X86_INS_MOVZX, + X86_INS_MPSADBW, + X86_INS_MUL, + X86_INS_MULPD, + X86_INS_MULPS, + X86_INS_MULSD, + X86_INS_MULSS, + X86_INS_MULX, + X86_INS_FMUL, + X86_INS_FIMUL, + X86_INS_FMULP, + X86_INS_MWAIT, + X86_INS_NEG, + X86_INS_NOP, + X86_INS_NOT, + X86_INS_OUT, + X86_INS_OUTSB, + X86_INS_OUTSD, + X86_INS_OUTSW, + X86_INS_PACKUSDW, + X86_INS_PAUSE, + X86_INS_PAVGUSB, + X86_INS_PBLENDVB, + X86_INS_PBLENDW, + X86_INS_PCLMULQDQ, + X86_INS_PCMPEQQ, + X86_INS_PCMPESTRI, + X86_INS_PCMPESTRM, + X86_INS_PCMPGTQ, + X86_INS_PCMPISTRI, + X86_INS_PCMPISTRM, + X86_INS_PCOMMIT, + X86_INS_PDEP, + X86_INS_PEXT, + X86_INS_PEXTRB, + X86_INS_PEXTRD, + X86_INS_PEXTRQ, + X86_INS_PF2ID, + X86_INS_PF2IW, + X86_INS_PFACC, + X86_INS_PFADD, + X86_INS_PFCMPEQ, + X86_INS_PFCMPGE, + X86_INS_PFCMPGT, + X86_INS_PFMAX, + X86_INS_PFMIN, + X86_INS_PFMUL, + X86_INS_PFNACC, + X86_INS_PFPNACC, + X86_INS_PFRCPIT1, + X86_INS_PFRCPIT2, + X86_INS_PFRCP, + X86_INS_PFRSQIT1, + X86_INS_PFRSQRT, + X86_INS_PFSUBR, + X86_INS_PFSUB, + X86_INS_PHMINPOSUW, + X86_INS_PI2FD, + X86_INS_PI2FW, + X86_INS_PINSRB, + X86_INS_PINSRD, + X86_INS_PINSRQ, + X86_INS_PMAXSB, + X86_INS_PMAXSD, + X86_INS_PMAXUD, + X86_INS_PMAXUW, + X86_INS_PMINSB, + X86_INS_PMINSD, + X86_INS_PMINUD, + X86_INS_PMINUW, + X86_INS_PMOVSXBD, + X86_INS_PMOVSXBQ, + X86_INS_PMOVSXBW, + X86_INS_PMOVSXDQ, + X86_INS_PMOVSXWD, + X86_INS_PMOVSXWQ, + X86_INS_PMOVZXBD, + X86_INS_PMOVZXBQ, + X86_INS_PMOVZXBW, + X86_INS_PMOVZXDQ, + X86_INS_PMOVZXWD, + X86_INS_PMOVZXWQ, + X86_INS_PMULDQ, + X86_INS_PMULHRW, + X86_INS_PMULLD, + X86_INS_POP, + X86_INS_POPAW, + X86_INS_POPAL, + X86_INS_POPCNT, + X86_INS_POPF, + X86_INS_POPFD, + X86_INS_POPFQ, + X86_INS_PREFETCH, + X86_INS_PREFETCHNTA, + X86_INS_PREFETCHT0, + X86_INS_PREFETCHT1, + X86_INS_PREFETCHT2, + X86_INS_PREFETCHW, + X86_INS_PSHUFD, + X86_INS_PSHUFHW, + X86_INS_PSHUFLW, + X86_INS_PSLLDQ, + X86_INS_PSRLDQ, + X86_INS_PSWAPD, + X86_INS_PTEST, + X86_INS_PUNPCKHQDQ, + X86_INS_PUNPCKLQDQ, + X86_INS_PUSH, + X86_INS_PUSHAW, + X86_INS_PUSHAL, + X86_INS_PUSHF, + X86_INS_PUSHFD, + X86_INS_PUSHFQ, + X86_INS_RCL, + X86_INS_RCPPS, + X86_INS_RCPSS, + X86_INS_RCR, + X86_INS_RDFSBASE, + X86_INS_RDGSBASE, + X86_INS_RDMSR, + X86_INS_RDPMC, + X86_INS_RDRAND, + X86_INS_RDSEED, + X86_INS_RDTSC, + X86_INS_RDTSCP, + X86_INS_ROL, + X86_INS_ROR, + X86_INS_RORX, + X86_INS_ROUNDPD, + X86_INS_ROUNDPS, + X86_INS_ROUNDSD, + X86_INS_ROUNDSS, + X86_INS_RSM, + X86_INS_RSQRTPS, + X86_INS_RSQRTSS, + X86_INS_SAHF, + X86_INS_SAL, + X86_INS_SALC, + X86_INS_SAR, + X86_INS_SARX, + X86_INS_SBB, + X86_INS_SCASB, + X86_INS_SCASD, + X86_INS_SCASQ, + X86_INS_SCASW, + X86_INS_SETAE, + X86_INS_SETA, + X86_INS_SETBE, + X86_INS_SETB, + X86_INS_SETE, + X86_INS_SETGE, + X86_INS_SETG, + X86_INS_SETLE, + X86_INS_SETL, + X86_INS_SETNE, + X86_INS_SETNO, + X86_INS_SETNP, + X86_INS_SETNS, + X86_INS_SETO, + X86_INS_SETP, + X86_INS_SETS, + X86_INS_SFENCE, + X86_INS_SGDT, + X86_INS_SHA1MSG1, + X86_INS_SHA1MSG2, + X86_INS_SHA1NEXTE, + X86_INS_SHA1RNDS4, + X86_INS_SHA256MSG1, + X86_INS_SHA256MSG2, + X86_INS_SHA256RNDS2, + X86_INS_SHL, + X86_INS_SHLD, + X86_INS_SHLX, + X86_INS_SHR, + X86_INS_SHRD, + X86_INS_SHRX, + X86_INS_SHUFPD, + X86_INS_SHUFPS, + X86_INS_SIDT, + X86_INS_FSIN, + X86_INS_SKINIT, + X86_INS_SLDT, + X86_INS_SMSW, + X86_INS_SQRTPD, + X86_INS_SQRTPS, + X86_INS_SQRTSD, + X86_INS_SQRTSS, + X86_INS_FSQRT, + X86_INS_STAC, + X86_INS_STC, + X86_INS_STD, + X86_INS_STGI, + X86_INS_STI, + X86_INS_STMXCSR, + X86_INS_STOSB, + X86_INS_STOSD, + X86_INS_STOSQ, + X86_INS_STOSW, + X86_INS_STR, + X86_INS_FST, + X86_INS_FSTP, + X86_INS_FSTPNCE, + X86_INS_FXCH, + X86_INS_SUBPD, + X86_INS_SUBPS, + X86_INS_FSUBR, + X86_INS_FISUBR, + X86_INS_FSUBRP, + X86_INS_SUBSD, + X86_INS_SUBSS, + X86_INS_FSUB, + X86_INS_FISUB, + X86_INS_FSUBP, + X86_INS_SWAPGS, + X86_INS_SYSCALL, + X86_INS_SYSENTER, + X86_INS_SYSEXIT, + X86_INS_SYSRET, + X86_INS_T1MSKC, + X86_INS_TEST, + X86_INS_UD2, + X86_INS_FTST, + X86_INS_TZCNT, + X86_INS_TZMSK, + X86_INS_FUCOMPI, + X86_INS_FUCOMI, + X86_INS_FUCOMPP, + X86_INS_FUCOMP, + X86_INS_FUCOM, + X86_INS_UD2B, + X86_INS_UNPCKHPD, + X86_INS_UNPCKHPS, + X86_INS_UNPCKLPD, + X86_INS_UNPCKLPS, + X86_INS_VADDPD, + X86_INS_VADDPS, + X86_INS_VADDSD, + X86_INS_VADDSS, + X86_INS_VADDSUBPD, + X86_INS_VADDSUBPS, + X86_INS_VAESDECLAST, + X86_INS_VAESDEC, + X86_INS_VAESENCLAST, + X86_INS_VAESENC, + X86_INS_VAESIMC, + X86_INS_VAESKEYGENASSIST, + X86_INS_VALIGND, + X86_INS_VALIGNQ, + X86_INS_VANDNPD, + X86_INS_VANDNPS, + X86_INS_VANDPD, + X86_INS_VANDPS, + X86_INS_VBLENDMPD, + X86_INS_VBLENDMPS, + X86_INS_VBLENDPD, + X86_INS_VBLENDPS, + X86_INS_VBLENDVPD, + X86_INS_VBLENDVPS, + X86_INS_VBROADCASTF128, + X86_INS_VBROADCASTI32X4, + X86_INS_VBROADCASTI64X4, + X86_INS_VBROADCASTSD, + X86_INS_VBROADCASTSS, + X86_INS_VCMPPD, + X86_INS_VCMPPS, + X86_INS_VCMPSD, + X86_INS_VCMPSS, + X86_INS_VCOMPRESSPD, + X86_INS_VCOMPRESSPS, + X86_INS_VCVTDQ2PD, + X86_INS_VCVTDQ2PS, + X86_INS_VCVTPD2DQX, + X86_INS_VCVTPD2DQ, + X86_INS_VCVTPD2PSX, + X86_INS_VCVTPD2PS, + X86_INS_VCVTPD2UDQ, + X86_INS_VCVTPH2PS, + X86_INS_VCVTPS2DQ, + X86_INS_VCVTPS2PD, + X86_INS_VCVTPS2PH, + X86_INS_VCVTPS2UDQ, + X86_INS_VCVTSD2SI, + X86_INS_VCVTSD2USI, + X86_INS_VCVTSS2SI, + X86_INS_VCVTSS2USI, + X86_INS_VCVTTPD2DQX, + X86_INS_VCVTTPD2DQ, + X86_INS_VCVTTPD2UDQ, + X86_INS_VCVTTPS2DQ, + X86_INS_VCVTTPS2UDQ, + X86_INS_VCVTUDQ2PD, + X86_INS_VCVTUDQ2PS, + X86_INS_VDIVPD, + X86_INS_VDIVPS, + X86_INS_VDIVSD, + X86_INS_VDIVSS, + X86_INS_VDPPD, + X86_INS_VDPPS, + X86_INS_VERR, + X86_INS_VERW, + X86_INS_VEXP2PD, + X86_INS_VEXP2PS, + X86_INS_VEXPANDPD, + X86_INS_VEXPANDPS, + X86_INS_VEXTRACTF128, + X86_INS_VEXTRACTF32X4, + X86_INS_VEXTRACTF64X4, + X86_INS_VEXTRACTI128, + X86_INS_VEXTRACTI32X4, + X86_INS_VEXTRACTI64X4, + X86_INS_VEXTRACTPS, + X86_INS_VFMADD132PD, + X86_INS_VFMADD132PS, + X86_INS_VFMADDPD, + X86_INS_VFMADD213PD, + X86_INS_VFMADD231PD, + X86_INS_VFMADDPS, + X86_INS_VFMADD213PS, + X86_INS_VFMADD231PS, + X86_INS_VFMADDSD, + X86_INS_VFMADD213SD, + X86_INS_VFMADD132SD, + X86_INS_VFMADD231SD, + X86_INS_VFMADDSS, + X86_INS_VFMADD213SS, + X86_INS_VFMADD132SS, + X86_INS_VFMADD231SS, + X86_INS_VFMADDSUB132PD, + X86_INS_VFMADDSUB132PS, + X86_INS_VFMADDSUBPD, + X86_INS_VFMADDSUB213PD, + X86_INS_VFMADDSUB231PD, + X86_INS_VFMADDSUBPS, + X86_INS_VFMADDSUB213PS, + X86_INS_VFMADDSUB231PS, + X86_INS_VFMSUB132PD, + X86_INS_VFMSUB132PS, + X86_INS_VFMSUBADD132PD, + X86_INS_VFMSUBADD132PS, + X86_INS_VFMSUBADDPD, + X86_INS_VFMSUBADD213PD, + X86_INS_VFMSUBADD231PD, + X86_INS_VFMSUBADDPS, + X86_INS_VFMSUBADD213PS, + X86_INS_VFMSUBADD231PS, + X86_INS_VFMSUBPD, + X86_INS_VFMSUB213PD, + X86_INS_VFMSUB231PD, + X86_INS_VFMSUBPS, + X86_INS_VFMSUB213PS, + X86_INS_VFMSUB231PS, + X86_INS_VFMSUBSD, + X86_INS_VFMSUB213SD, + X86_INS_VFMSUB132SD, + X86_INS_VFMSUB231SD, + X86_INS_VFMSUBSS, + X86_INS_VFMSUB213SS, + X86_INS_VFMSUB132SS, + X86_INS_VFMSUB231SS, + X86_INS_VFNMADD132PD, + X86_INS_VFNMADD132PS, + X86_INS_VFNMADDPD, + X86_INS_VFNMADD213PD, + X86_INS_VFNMADD231PD, + X86_INS_VFNMADDPS, + X86_INS_VFNMADD213PS, + X86_INS_VFNMADD231PS, + X86_INS_VFNMADDSD, + X86_INS_VFNMADD213SD, + X86_INS_VFNMADD132SD, + X86_INS_VFNMADD231SD, + X86_INS_VFNMADDSS, + X86_INS_VFNMADD213SS, + X86_INS_VFNMADD132SS, + X86_INS_VFNMADD231SS, + X86_INS_VFNMSUB132PD, + X86_INS_VFNMSUB132PS, + X86_INS_VFNMSUBPD, + X86_INS_VFNMSUB213PD, + X86_INS_VFNMSUB231PD, + X86_INS_VFNMSUBPS, + X86_INS_VFNMSUB213PS, + X86_INS_VFNMSUB231PS, + X86_INS_VFNMSUBSD, + X86_INS_VFNMSUB213SD, + X86_INS_VFNMSUB132SD, + X86_INS_VFNMSUB231SD, + X86_INS_VFNMSUBSS, + X86_INS_VFNMSUB213SS, + X86_INS_VFNMSUB132SS, + X86_INS_VFNMSUB231SS, + X86_INS_VFRCZPD, + X86_INS_VFRCZPS, + X86_INS_VFRCZSD, + X86_INS_VFRCZSS, + X86_INS_VORPD, + X86_INS_VORPS, + X86_INS_VXORPD, + X86_INS_VXORPS, + X86_INS_VGATHERDPD, + X86_INS_VGATHERDPS, + X86_INS_VGATHERPF0DPD, + X86_INS_VGATHERPF0DPS, + X86_INS_VGATHERPF0QPD, + X86_INS_VGATHERPF0QPS, + X86_INS_VGATHERPF1DPD, + X86_INS_VGATHERPF1DPS, + X86_INS_VGATHERPF1QPD, + X86_INS_VGATHERPF1QPS, + X86_INS_VGATHERQPD, + X86_INS_VGATHERQPS, + X86_INS_VHADDPD, + X86_INS_VHADDPS, + X86_INS_VHSUBPD, + X86_INS_VHSUBPS, + X86_INS_VINSERTF128, + X86_INS_VINSERTF32X4, + X86_INS_VINSERTF32X8, + X86_INS_VINSERTF64X2, + X86_INS_VINSERTF64X4, + X86_INS_VINSERTI128, + X86_INS_VINSERTI32X4, + X86_INS_VINSERTI32X8, + X86_INS_VINSERTI64X2, + X86_INS_VINSERTI64X4, + X86_INS_VINSERTPS, + X86_INS_VLDDQU, + X86_INS_VLDMXCSR, + X86_INS_VMASKMOVDQU, + X86_INS_VMASKMOVPD, + X86_INS_VMASKMOVPS, + X86_INS_VMAXPD, + X86_INS_VMAXPS, + X86_INS_VMAXSD, + X86_INS_VMAXSS, + X86_INS_VMCALL, + X86_INS_VMCLEAR, + X86_INS_VMFUNC, + X86_INS_VMINPD, + X86_INS_VMINPS, + X86_INS_VMINSD, + X86_INS_VMINSS, + X86_INS_VMLAUNCH, + X86_INS_VMLOAD, + X86_INS_VMMCALL, + X86_INS_VMOVQ, + X86_INS_VMOVDDUP, + X86_INS_VMOVD, + X86_INS_VMOVDQA32, + X86_INS_VMOVDQA64, + X86_INS_VMOVDQA, + X86_INS_VMOVDQU16, + X86_INS_VMOVDQU32, + X86_INS_VMOVDQU64, + X86_INS_VMOVDQU8, + X86_INS_VMOVDQU, + X86_INS_VMOVHLPS, + X86_INS_VMOVHPD, + X86_INS_VMOVHPS, + X86_INS_VMOVLHPS, + X86_INS_VMOVLPD, + X86_INS_VMOVLPS, + X86_INS_VMOVMSKPD, + X86_INS_VMOVMSKPS, + X86_INS_VMOVNTDQA, + X86_INS_VMOVNTDQ, + X86_INS_VMOVNTPD, + X86_INS_VMOVNTPS, + X86_INS_VMOVSD, + X86_INS_VMOVSHDUP, + X86_INS_VMOVSLDUP, + X86_INS_VMOVSS, + X86_INS_VMOVUPD, + X86_INS_VMOVUPS, + X86_INS_VMPSADBW, + X86_INS_VMPTRLD, + X86_INS_VMPTRST, + X86_INS_VMREAD, + X86_INS_VMRESUME, + X86_INS_VMRUN, + X86_INS_VMSAVE, + X86_INS_VMULPD, + X86_INS_VMULPS, + X86_INS_VMULSD, + X86_INS_VMULSS, + X86_INS_VMWRITE, + X86_INS_VMXOFF, + X86_INS_VMXON, + X86_INS_VPABSB, + X86_INS_VPABSD, + X86_INS_VPABSQ, + X86_INS_VPABSW, + X86_INS_VPACKSSDW, + X86_INS_VPACKSSWB, + X86_INS_VPACKUSDW, + X86_INS_VPACKUSWB, + X86_INS_VPADDB, + X86_INS_VPADDD, + X86_INS_VPADDQ, + X86_INS_VPADDSB, + X86_INS_VPADDSW, + X86_INS_VPADDUSB, + X86_INS_VPADDUSW, + X86_INS_VPADDW, + X86_INS_VPALIGNR, + X86_INS_VPANDD, + X86_INS_VPANDND, + X86_INS_VPANDNQ, + X86_INS_VPANDN, + X86_INS_VPANDQ, + X86_INS_VPAND, + X86_INS_VPAVGB, + X86_INS_VPAVGW, + X86_INS_VPBLENDD, + X86_INS_VPBLENDMB, + X86_INS_VPBLENDMD, + X86_INS_VPBLENDMQ, + X86_INS_VPBLENDMW, + X86_INS_VPBLENDVB, + X86_INS_VPBLENDW, + X86_INS_VPBROADCASTB, + X86_INS_VPBROADCASTD, + X86_INS_VPBROADCASTMB2Q, + X86_INS_VPBROADCASTMW2D, + X86_INS_VPBROADCASTQ, + X86_INS_VPBROADCASTW, + X86_INS_VPCLMULQDQ, + X86_INS_VPCMOV, + X86_INS_VPCMPB, + X86_INS_VPCMPD, + X86_INS_VPCMPEQB, + X86_INS_VPCMPEQD, + X86_INS_VPCMPEQQ, + X86_INS_VPCMPEQW, + X86_INS_VPCMPESTRI, + X86_INS_VPCMPESTRM, + X86_INS_VPCMPGTB, + X86_INS_VPCMPGTD, + X86_INS_VPCMPGTQ, + X86_INS_VPCMPGTW, + X86_INS_VPCMPISTRI, + X86_INS_VPCMPISTRM, + X86_INS_VPCMPQ, + X86_INS_VPCMPUB, + X86_INS_VPCMPUD, + X86_INS_VPCMPUQ, + X86_INS_VPCMPUW, + X86_INS_VPCMPW, + X86_INS_VPCOMB, + X86_INS_VPCOMD, + X86_INS_VPCOMPRESSD, + X86_INS_VPCOMPRESSQ, + X86_INS_VPCOMQ, + X86_INS_VPCOMUB, + X86_INS_VPCOMUD, + X86_INS_VPCOMUQ, + X86_INS_VPCOMUW, + X86_INS_VPCOMW, + X86_INS_VPCONFLICTD, + X86_INS_VPCONFLICTQ, + X86_INS_VPERM2F128, + X86_INS_VPERM2I128, + X86_INS_VPERMD, + X86_INS_VPERMI2D, + X86_INS_VPERMI2PD, + X86_INS_VPERMI2PS, + X86_INS_VPERMI2Q, + X86_INS_VPERMIL2PD, + X86_INS_VPERMIL2PS, + X86_INS_VPERMILPD, + X86_INS_VPERMILPS, + X86_INS_VPERMPD, + X86_INS_VPERMPS, + X86_INS_VPERMQ, + X86_INS_VPERMT2D, + X86_INS_VPERMT2PD, + X86_INS_VPERMT2PS, + X86_INS_VPERMT2Q, + X86_INS_VPEXPANDD, + X86_INS_VPEXPANDQ, + X86_INS_VPEXTRB, + X86_INS_VPEXTRD, + X86_INS_VPEXTRQ, + X86_INS_VPEXTRW, + X86_INS_VPGATHERDD, + X86_INS_VPGATHERDQ, + X86_INS_VPGATHERQD, + X86_INS_VPGATHERQQ, + X86_INS_VPHADDBD, + X86_INS_VPHADDBQ, + X86_INS_VPHADDBW, + X86_INS_VPHADDDQ, + X86_INS_VPHADDD, + X86_INS_VPHADDSW, + X86_INS_VPHADDUBD, + X86_INS_VPHADDUBQ, + X86_INS_VPHADDUBW, + X86_INS_VPHADDUDQ, + X86_INS_VPHADDUWD, + X86_INS_VPHADDUWQ, + X86_INS_VPHADDWD, + X86_INS_VPHADDWQ, + X86_INS_VPHADDW, + X86_INS_VPHMINPOSUW, + X86_INS_VPHSUBBW, + X86_INS_VPHSUBDQ, + X86_INS_VPHSUBD, + X86_INS_VPHSUBSW, + X86_INS_VPHSUBWD, + X86_INS_VPHSUBW, + X86_INS_VPINSRB, + X86_INS_VPINSRD, + X86_INS_VPINSRQ, + X86_INS_VPINSRW, + X86_INS_VPLZCNTD, + X86_INS_VPLZCNTQ, + X86_INS_VPMACSDD, + X86_INS_VPMACSDQH, + X86_INS_VPMACSDQL, + X86_INS_VPMACSSDD, + X86_INS_VPMACSSDQH, + X86_INS_VPMACSSDQL, + X86_INS_VPMACSSWD, + X86_INS_VPMACSSWW, + X86_INS_VPMACSWD, + X86_INS_VPMACSWW, + X86_INS_VPMADCSSWD, + X86_INS_VPMADCSWD, + X86_INS_VPMADDUBSW, + X86_INS_VPMADDWD, + X86_INS_VPMASKMOVD, + X86_INS_VPMASKMOVQ, + X86_INS_VPMAXSB, + X86_INS_VPMAXSD, + X86_INS_VPMAXSQ, + X86_INS_VPMAXSW, + X86_INS_VPMAXUB, + X86_INS_VPMAXUD, + X86_INS_VPMAXUQ, + X86_INS_VPMAXUW, + X86_INS_VPMINSB, + X86_INS_VPMINSD, + X86_INS_VPMINSQ, + X86_INS_VPMINSW, + X86_INS_VPMINUB, + X86_INS_VPMINUD, + X86_INS_VPMINUQ, + X86_INS_VPMINUW, + X86_INS_VPMOVDB, + X86_INS_VPMOVDW, + X86_INS_VPMOVM2B, + X86_INS_VPMOVM2D, + X86_INS_VPMOVM2Q, + X86_INS_VPMOVM2W, + X86_INS_VPMOVMSKB, + X86_INS_VPMOVQB, + X86_INS_VPMOVQD, + X86_INS_VPMOVQW, + X86_INS_VPMOVSDB, + X86_INS_VPMOVSDW, + X86_INS_VPMOVSQB, + X86_INS_VPMOVSQD, + X86_INS_VPMOVSQW, + X86_INS_VPMOVSXBD, + X86_INS_VPMOVSXBQ, + X86_INS_VPMOVSXBW, + X86_INS_VPMOVSXDQ, + X86_INS_VPMOVSXWD, + X86_INS_VPMOVSXWQ, + X86_INS_VPMOVUSDB, + X86_INS_VPMOVUSDW, + X86_INS_VPMOVUSQB, + X86_INS_VPMOVUSQD, + X86_INS_VPMOVUSQW, + X86_INS_VPMOVZXBD, + X86_INS_VPMOVZXBQ, + X86_INS_VPMOVZXBW, + X86_INS_VPMOVZXDQ, + X86_INS_VPMOVZXWD, + X86_INS_VPMOVZXWQ, + X86_INS_VPMULDQ, + X86_INS_VPMULHRSW, + X86_INS_VPMULHUW, + X86_INS_VPMULHW, + X86_INS_VPMULLD, + X86_INS_VPMULLQ, + X86_INS_VPMULLW, + X86_INS_VPMULUDQ, + X86_INS_VPORD, + X86_INS_VPORQ, + X86_INS_VPOR, + X86_INS_VPPERM, + X86_INS_VPROTB, + X86_INS_VPROTD, + X86_INS_VPROTQ, + X86_INS_VPROTW, + X86_INS_VPSADBW, + X86_INS_VPSCATTERDD, + X86_INS_VPSCATTERDQ, + X86_INS_VPSCATTERQD, + X86_INS_VPSCATTERQQ, + X86_INS_VPSHAB, + X86_INS_VPSHAD, + X86_INS_VPSHAQ, + X86_INS_VPSHAW, + X86_INS_VPSHLB, + X86_INS_VPSHLD, + X86_INS_VPSHLQ, + X86_INS_VPSHLW, + X86_INS_VPSHUFB, + X86_INS_VPSHUFD, + X86_INS_VPSHUFHW, + X86_INS_VPSHUFLW, + X86_INS_VPSIGNB, + X86_INS_VPSIGND, + X86_INS_VPSIGNW, + X86_INS_VPSLLDQ, + X86_INS_VPSLLD, + X86_INS_VPSLLQ, + X86_INS_VPSLLVD, + X86_INS_VPSLLVQ, + X86_INS_VPSLLW, + X86_INS_VPSRAD, + X86_INS_VPSRAQ, + X86_INS_VPSRAVD, + X86_INS_VPSRAVQ, + X86_INS_VPSRAW, + X86_INS_VPSRLDQ, + X86_INS_VPSRLD, + X86_INS_VPSRLQ, + X86_INS_VPSRLVD, + X86_INS_VPSRLVQ, + X86_INS_VPSRLW, + X86_INS_VPSUBB, + X86_INS_VPSUBD, + X86_INS_VPSUBQ, + X86_INS_VPSUBSB, + X86_INS_VPSUBSW, + X86_INS_VPSUBUSB, + X86_INS_VPSUBUSW, + X86_INS_VPSUBW, + X86_INS_VPTESTMD, + X86_INS_VPTESTMQ, + X86_INS_VPTESTNMD, + X86_INS_VPTESTNMQ, + X86_INS_VPTEST, + X86_INS_VPUNPCKHBW, + X86_INS_VPUNPCKHDQ, + X86_INS_VPUNPCKHQDQ, + X86_INS_VPUNPCKHWD, + X86_INS_VPUNPCKLBW, + X86_INS_VPUNPCKLDQ, + X86_INS_VPUNPCKLQDQ, + X86_INS_VPUNPCKLWD, + X86_INS_VPXORD, + X86_INS_VPXORQ, + X86_INS_VPXOR, + X86_INS_VRCP14PD, + X86_INS_VRCP14PS, + X86_INS_VRCP14SD, + X86_INS_VRCP14SS, + X86_INS_VRCP28PD, + X86_INS_VRCP28PS, + X86_INS_VRCP28SD, + X86_INS_VRCP28SS, + X86_INS_VRCPPS, + X86_INS_VRCPSS, + X86_INS_VRNDSCALEPD, + X86_INS_VRNDSCALEPS, + X86_INS_VRNDSCALESD, + X86_INS_VRNDSCALESS, + X86_INS_VROUNDPD, + X86_INS_VROUNDPS, + X86_INS_VROUNDSD, + X86_INS_VROUNDSS, + X86_INS_VRSQRT14PD, + X86_INS_VRSQRT14PS, + X86_INS_VRSQRT14SD, + X86_INS_VRSQRT14SS, + X86_INS_VRSQRT28PD, + X86_INS_VRSQRT28PS, + X86_INS_VRSQRT28SD, + X86_INS_VRSQRT28SS, + X86_INS_VRSQRTPS, + X86_INS_VRSQRTSS, + X86_INS_VSCATTERDPD, + X86_INS_VSCATTERDPS, + X86_INS_VSCATTERPF0DPD, + X86_INS_VSCATTERPF0DPS, + X86_INS_VSCATTERPF0QPD, + X86_INS_VSCATTERPF0QPS, + X86_INS_VSCATTERPF1DPD, + X86_INS_VSCATTERPF1DPS, + X86_INS_VSCATTERPF1QPD, + X86_INS_VSCATTERPF1QPS, + X86_INS_VSCATTERQPD, + X86_INS_VSCATTERQPS, + X86_INS_VSHUFPD, + X86_INS_VSHUFPS, + X86_INS_VSQRTPD, + X86_INS_VSQRTPS, + X86_INS_VSQRTSD, + X86_INS_VSQRTSS, + X86_INS_VSTMXCSR, + X86_INS_VSUBPD, + X86_INS_VSUBPS, + X86_INS_VSUBSD, + X86_INS_VSUBSS, + X86_INS_VTESTPD, + X86_INS_VTESTPS, + X86_INS_VUNPCKHPD, + X86_INS_VUNPCKHPS, + X86_INS_VUNPCKLPD, + X86_INS_VUNPCKLPS, + X86_INS_VZEROALL, + X86_INS_VZEROUPPER, + X86_INS_WAIT, + X86_INS_WBINVD, + X86_INS_WRFSBASE, + X86_INS_WRGSBASE, + X86_INS_WRMSR, + X86_INS_XABORT, + X86_INS_XACQUIRE, + X86_INS_XBEGIN, + X86_INS_XCHG, + X86_INS_XCRYPTCBC, + X86_INS_XCRYPTCFB, + X86_INS_XCRYPTCTR, + X86_INS_XCRYPTECB, + X86_INS_XCRYPTOFB, + X86_INS_XEND, + X86_INS_XGETBV, + X86_INS_XLATB, + X86_INS_XRELEASE, + X86_INS_XRSTOR, + X86_INS_XRSTOR64, + X86_INS_XRSTORS, + X86_INS_XRSTORS64, + X86_INS_XSAVE, + X86_INS_XSAVE64, + X86_INS_XSAVEC, + X86_INS_XSAVEC64, + X86_INS_XSAVEOPT, + X86_INS_XSAVEOPT64, + X86_INS_XSAVES, + X86_INS_XSAVES64, + X86_INS_XSETBV, + X86_INS_XSHA1, + X86_INS_XSHA256, + X86_INS_XSTORE, + X86_INS_XTEST, + X86_INS_FDISI8087_NOP, + X86_INS_FENI8087_NOP, + + X86_INS_ENDING, // mark the end of the list of insn +} x86_insn; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/make.sh b/make.sh new file mode 100755 index 00000000..36e9f5e5 --- /dev/null +++ b/make.sh @@ -0,0 +1,108 @@ +#!/bin/sh + +# Unicorn Engine +# By Nguyen Anh Quynh , 2015 + +# Note: to cross-compile to Windows on Linux, Mingw-glib2 is required. +# See README on how to install Mingw-glib2. + +MAKE_JOBS=$((${MAKE_JOBS}+0)) +[ ${MAKE_JOBS} -lt 1 ] && \ + MAKE_JOBS=4 + +# build iOS lib for all iDevices, or only specific device +build_iOS() { + IOS_SDK=`xcrun --sdk iphoneos --show-sdk-path` + IOS_CC=`xcrun --sdk iphoneos -f clang` + IOS_CFLAGS="-Os -Wimplicit -isysroot $IOS_SDK" + IOS_LDFLAGS="-isysroot $IOS_SDK" + if [ -z "$1" ]; then + # build for all iDevices + IOS_ARCHS="armv7 armv7s arm64" + else + IOS_ARCHS="$1" + fi + CC="$IOS_CC" \ + CFLAGS="$IOS_CFLAGS" \ + LDFLAGS="$IOS_LDFLAGS" \ + LIBARCHS="$IOS_ARCHS" \ + ${MAKE} +} + +build() { + [ "$UNAME" = Darwin ] && LIBARCHS="i386 x86_64" + ${MAKE} +} + +build_cross() { + [ "$UNAME" = Darwin ] && LIBARCHS="i386 x86_64" + CROSS=$1 + CC=$CROSS-gcc \ + AR=$CROSS-ar \ + RANLIB=$CROSS-ranlib \ + GLIB="-L/usr/$CROSS/lib/ -lglib-2.0" \ + ${MAKE} +} + +install() { + # Mac OSX needs to find the right directory for pkgconfig + if [ "$UNAME" = Darwin ]; then + # we are going to install into /usr/local, so remove old installs under /usr + rm -rf /usr/lib/libunicorn* + rm -rf /usr/include/unicorn + # install into /usr/local + PREFIX=/usr/local + ${MAKE} install + else # not OSX + test -d /usr/lib64 && ${MAKE} LIBDIRARCH=lib64 + ${MAKE} install + fi +} + +uninstall() { + # Mac OSX needs to find the right directory for pkgconfig + if [ "$UNAME" = "Darwin" ]; then + # find the directory automatically, so we can support both Macport & Brew + PKGCFGDIR="$(pkg-config --variable pc_path pkg-config | cut -d ':' -f 1)" + PREFIX=/usr/local + ${MAKE} uninstall + else # not OSX + test -d /usr/lib64 && LIBDIRARCH=lib64 + ${MAKE} uninstall + fi +} + +if [ "$UNAME" = SunOS ]; then + [ -z "${MAKE}" ] && MAKE=gmake + INSTALL_BIN=ginstall + CC=gcc +fi + +if [ -n "`echo "$UNAME" | grep BSD`" ]; then + MAKE=gmake + PREFIX=/usr/local +fi + +[ -z "${UNAME}" ] && UNAME=$(uname) +[ -z "${MAKE}" ] && MAKE=make +#[ -n "${MAKE_JOBS}" ] && MAKE="$MAKE -j${MAKE_JOBS}" +export CC INSTALL_BIN PREFIX PKGCFGDIR LIBDIRARCH LIBARCHS CFLAGS LDFLAGS + +case "$1" in + "" ) build;; + "default" ) build;; + "install" ) install;; + "uninstall" ) uninstall;; + "cross-win32" ) build_cross i686-w64-mingw32;; + "cross-win64" ) build_cross x86_64-w64-mingw32;; + "cross-android" ) CROSS=arm-linux-androideabi build;; + "clang" ) CC=clang build;; + "gcc" ) CC=gcc build;; + "ios" ) build_iOS;; + "ios_armv7" ) build_iOS armv7;; + "ios_armv7s" ) build_iOS armv7s;; + "ios_arm64" ) build_iOS arm64;; + * ) + echo "Usage: $0 ["`grep '^ "' $0 | cut -d '"' -f 2 | tr "\\n" "|"`"]" + exit 1;; +esac diff --git a/pkgconfig.mk b/pkgconfig.mk new file mode 100644 index 00000000..fb869b03 --- /dev/null +++ b/pkgconfig.mk @@ -0,0 +1,9 @@ +# Package version of Unicorn for Makefile. +# To be used to generate unicorn.pc for pkg-config + +# version major & minor +PKG_MAJOR = 0 +PKG_MINOR = 9 + +# version bugfix level. Example: PKG_EXTRA = 1 +PKG_EXTRA = diff --git a/qemu/CODING_STYLE b/qemu/CODING_STYLE new file mode 100644 index 00000000..d46cfa5f --- /dev/null +++ b/qemu/CODING_STYLE @@ -0,0 +1,107 @@ +QEMU Coding Style +================= + +Please use the script checkpatch.pl in the scripts directory to check +patches before submitting. + +1. Whitespace + +Of course, the most important aspect in any coding style is whitespace. +Crusty old coders who have trouble spotting the glasses on their noses +can tell the difference between a tab and eight spaces from a distance +of approximately fifteen parsecs. Many a flamewar have been fought and +lost on this issue. + +QEMU indents are four spaces. Tabs are never used, except in Makefiles +where they have been irreversibly coded into the syntax. +Spaces of course are superior to tabs because: + + - You have just one way to specify whitespace, not two. Ambiguity breeds + mistakes. + - The confusion surrounding 'use tabs to indent, spaces to justify' is gone. + - Tab indents push your code to the right, making your screen seriously + unbalanced. + - Tabs will be rendered incorrectly on editors who are misconfigured not + to use tab stops of eight positions. + - Tabs are rendered badly in patches, causing off-by-one errors in almost + every line. + - It is the QEMU coding style. + +Do not leave whitespace dangling off the ends of lines. + +2. Line width + +Lines are 80 characters; not longer. + +Rationale: + - Some people like to tile their 24" screens with a 6x4 matrix of 80x24 + xterms and use vi in all of them. The best way to punish them is to + let them keep doing it. + - Code and especially patches is much more readable if limited to a sane + line length. Eighty is traditional. + - It is the QEMU coding style. + +3. Naming + +Variables are lower_case_with_underscores; easy to type and read. Structured +type names are in CamelCase; harder to type but standing out. Enum type +names and function type names should also be in CamelCase. Scalar type +names are lower_case_with_underscores_ending_with_a_t, like the POSIX +uint64_t and family. Note that this last convention contradicts POSIX +and is therefore likely to be changed. + +When wrapping standard library functions, use the prefix qemu_ to alert +readers that they are seeing a wrapped version; otherwise avoid this prefix. + +4. Block structure + +Every indented statement is braced; even if the block contains just one +statement. The opening brace is on the line that contains the control +flow statement that introduces the new block; the closing brace is on the +same line as the else keyword, or on a line by itself if there is no else +keyword. Example: + + if (a == 5) { + printf("a was 5.\n"); + } else if (a == 6) { + printf("a was 6.\n"); + } else { + printf("a was something else entirely.\n"); + } + +Note that 'else if' is considered a single statement; otherwise a long if/ +else if/else if/.../else sequence would need an indent for every else +statement. + +An exception is the opening brace for a function; for reasons of tradition +and clarity it comes on a line by itself: + + void a_function(void) + { + do_something(); + } + +Rationale: a consistent (except for functions...) bracing style reduces +ambiguity and avoids needless churn when lines are added or removed. +Furthermore, it is the QEMU coding style. + +5. Declarations + +Mixed declarations (interleaving statements and declarations within blocks) +are not allowed; declarations should be at the beginning of blocks. In other +words, the code should not generate warnings if using GCC's +-Wdeclaration-after-statement option. + +6. Conditional statements + +When comparing a variable for (in)equality with a constant, list the +constant on the right, as in: + +if (a == 1) { + /* Reads like: "If a equals 1" */ + do_something(); +} + +Rationale: Yoda conditions (as in 'if (1 == a)') are awkward to read. +Besides, good compilers already warn users when '==' is mis-typed as '=', +even when the constant is on the right. diff --git a/qemu/COPYING b/qemu/COPYING new file mode 100644 index 00000000..00ccfbb6 --- /dev/null +++ b/qemu/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Lesser General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. To prevent this, we have made it clear that any +patent must be licensed for everyone's free use or not licensed at all. + + The precise terms and conditions for copying, distribution and +modification follow. + + GNU GENERAL PUBLIC LICENSE + TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION + + 0. This License applies to any program or other work which contains +a notice placed by the copyright holder saying it may be distributed +under the terms of this General Public License. The "Program", below, +refers to any such program or work, and a "work based on the Program" +means either the Program or any derivative work under copyright law: +that is to say, a work containing the Program or a portion of it, +either verbatim or with modifications and/or translated into another +language. (Hereinafter, translation is included without limitation in +the term "modification".) Each licensee is addressed as "you". + +Activities other than copying, distribution and modification are not +covered by this License; they are outside its scope. The act of +running the Program is not restricted, and the output from the Program +is covered only if its contents constitute a work based on the +Program (independent of having been made by running the Program). +Whether that is true depends on what the Program does. + + 1. You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. You may modify your copy or copies of the Program or any portion +of it, thus forming a work based on the Program, and copy and +distribute such modifications or work under the terms of Section 1 +above, provided that you also meet all of these conditions: + + a) You must cause the modified files to carry prominent notices + stating that you changed the files and the date of any change. + + b) You must cause any work that you distribute or publish, that in + whole or in part contains or is derived from the Program or any + part thereof, to be licensed as a whole at no charge to all third + parties under the terms of this License. + + c) If the modified program normally reads commands interactively + when run, you must cause it, when started running for such + interactive use in the most ordinary way, to print or display an + announcement including an appropriate copyright notice and a + notice that there is no warranty (or else, saying that you provide + a warranty) and that users may redistribute the program under + these conditions, and telling the user how to view a copy of this + License. (Exception: if the Program itself is interactive but + does not normally print such an announcement, your work based on + the Program is not required to print an announcement.) + +These requirements apply to the modified work as a whole. If +identifiable sections of that work are not derived from the Program, +and can be reasonably considered independent and separate works in +themselves, then this License, and its terms, do not apply to those +sections when you distribute them as separate works. But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. (This alternative is + allowed only for noncommercial distribution and only if you + received the program in object code or executable form with such + an offer, in accord with Subsection b above.) + +The source code for a work means the preferred form of the work for +making modifications to it. For an executable work, complete source +code means all the source code for all modules it contains, plus any +associated interface definition files, plus the scripts used to +control compilation and installation of the executable. However, as a +special exception, the source code distributed need not include +anything that is normally distributed (in either source or binary +form) with the major components (compiler, kernel, and so on) of the +operating system on which the executable runs, unless that component +itself accompanies the executable. + +If distribution of executable or object code is made by offering +access to copy from a designated place, then offering equivalent +access to copy the source code from the same place counts as +distribution of the source code, even though third parties are not +compelled to copy the source along with the object code. + + 4. You may not copy, modify, sublicense, or distribute the Program +except as expressly provided under this License. Any attempt +otherwise to copy, modify, sublicense or distribute the Program is +void, and will automatically terminate your rights under this License. +However, parties who have received copies, or rights, from you under +this License will not have their licenses terminated so long as such +parties remain in full compliance. + + 5. You are not required to accept this License, since you have not +signed it. However, nothing else grants you permission to modify or +distribute the Program or its derivative works. These actions are +prohibited by law if you do not accept this License. Therefore, by +modifying or distributing the Program (or any work based on the +Program), you indicate your acceptance of this License to do so, and +all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + + 6. Each time you redistribute the Program (or any work based on the +Program), the recipient automatically receives a license from the +original licensor to copy, distribute or modify the Program subject to +these terms and conditions. You may not impose any further +restrictions on the recipients' exercise of the rights granted herein. +You are not responsible for enforcing compliance by third parties to +this License. + + 7. If, as a consequence of a court judgment or allegation of patent +infringement or for any other reason (not limited to patent issues), +conditions are imposed on you (whether by court order, agreement or +otherwise) that contradict the conditions of this License, they do not +excuse you from the conditions of this License. If you cannot +distribute so as to satisfy simultaneously your obligations under this +License and any other pertinent obligations, then as a consequence you +may not distribute the Program at all. For example, if a patent +license would not permit royalty-free redistribution of the Program by +all those who receive copies directly or indirectly through you, then +the only way you could satisfy both it and this License would be to +refrain entirely from distribution of the Program. + +If any portion of this section is held invalid or unenforceable under +any particular circumstance, the balance of the section is intended to +apply and the section as a whole is intended to apply in other +circumstances. + +It is not the purpose of this section to induce you to infringe any +patents or other property right claims or to contest validity of any +such claims; this section has the sole purpose of protecting the +integrity of the free software distribution system, which is +implemented by public license practices. Many people have made +generous contributions to the wide range of software distributed +through that system in reliance on consistent application of that +system; it is up to the author/donor to decide if he or she is willing +to distribute software through any other system and a licensee cannot +impose that choice. + +This section is intended to make thoroughly clear what is believed to +be a consequence of the rest of this License. + + 8. If the distribution and/or use of the Program is restricted in +certain countries either by patents or by copyrighted interfaces, the +original copyright holder who places the Program under this License +may add an explicit geographical distribution limitation excluding +those countries, so that distribution is permitted only in or among +countries not thus excluded. In such case, this License incorporates +the limitation as if written in the body of this License. + + 9. The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. 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See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + +Also add information on how to contact you by electronic and paper mail. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the library, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! + + diff --git a/qemu/HACKING b/qemu/HACKING new file mode 100644 index 00000000..12fbc8af --- /dev/null +++ b/qemu/HACKING @@ -0,0 +1,159 @@ +1. Preprocessor + +For variadic macros, stick with this C99-like syntax: + +#define DPRINTF(fmt, ...) \ + do { printf("IRQ: " fmt, ## __VA_ARGS__); } while (0) + +2. C types + +It should be common sense to use the right type, but we have collected +a few useful guidelines here. + +2.1. Scalars + +If you're using "int" or "long", odds are good that there's a better type. +If a variable is counting something, it should be declared with an +unsigned type. + +If it's host memory-size related, size_t should be a good choice (use +ssize_t only if required). Guest RAM memory offsets must use ram_addr_t, +but only for RAM, it may not cover whole guest address space. + +If it's file-size related, use off_t. +If it's file-offset related (i.e., signed), use off_t. +If it's just counting small numbers use "unsigned int"; +(on all but oddball embedded systems, you can assume that that +type is at least four bytes wide). + +In the event that you require a specific width, use a standard type +like int32_t, uint32_t, uint64_t, etc. The specific types are +mandatory for VMState fields. + +Don't use Linux kernel internal types like u32, __u32 or __le32. + +Use hwaddr for guest physical addresses except pcibus_t +for PCI addresses. In addition, ram_addr_t is a QEMU internal address +space that maps guest RAM physical addresses into an intermediate +address space that can map to host virtual address spaces. Generally +speaking, the size of guest memory can always fit into ram_addr_t but +it would not be correct to store an actual guest physical address in a +ram_addr_t. + +For CPU virtual addresses there are several possible types. +vaddr is the best type to use to hold a CPU virtual address in +target-independent code. It is guaranteed to be large enough to hold a +virtual address for any target, and it does not change size from target +to target. It is always unsigned. +target_ulong is a type the size of a virtual address on the CPU; this means +it may be 32 or 64 bits depending on which target is being built. It should +therefore be used only in target-specific code, and in some +performance-critical built-per-target core code such as the TLB code. +There is also a signed version, target_long. +abi_ulong is for the *-user targets, and represents a type the size of +'void *' in that target's ABI. (This may not be the same as the size of a +full CPU virtual address in the case of target ABIs which use 32 bit pointers +on 64 bit CPUs, like sparc32plus.) Definitions of structures that must match +the target's ABI must use this type for anything that on the target is defined +to be an 'unsigned long' or a pointer type. +There is also a signed version, abi_long. + +Of course, take all of the above with a grain of salt. If you're about +to use some system interface that requires a type like size_t, pid_t or +off_t, use matching types for any corresponding variables. + +Also, if you try to use e.g., "unsigned int" as a type, and that +conflicts with the signedness of a related variable, sometimes +it's best just to use the *wrong* type, if "pulling the thread" +and fixing all related variables would be too invasive. + +Finally, while using descriptive types is important, be careful not to +go overboard. If whatever you're doing causes warnings, or requires +casts, then reconsider or ask for help. + +2.2. Pointers + +Ensure that all of your pointers are "const-correct". +Unless a pointer is used to modify the pointed-to storage, +give it the "const" attribute. That way, the reader knows +up-front that this is a read-only pointer. Perhaps more +importantly, if we're diligent about this, when you see a non-const +pointer, you're guaranteed that it is used to modify the storage +it points to, or it is aliased to another pointer that is. + +2.3. Typedefs +Typedefs are used to eliminate the redundant 'struct' keyword. + +2.4. Reserved namespaces in C and POSIX +Underscore capital, double underscore, and underscore 't' suffixes should be +avoided. + +3. Low level memory management + +Use of the malloc/free/realloc/calloc/valloc/memalign/posix_memalign +APIs is not allowed in the QEMU codebase. Instead of these routines, +use the GLib memory allocation routines g_malloc/g_malloc0/g_new/ +g_new0/g_realloc/g_free or QEMU's qemu_memalign/qemu_blockalign/qemu_vfree +APIs. + +Please note that g_malloc will exit on allocation failure, so there +is no need to test for failure (as you would have to with malloc). +Calling g_malloc with a zero size is valid and will return NULL. + +Memory allocated by qemu_memalign or qemu_blockalign must be freed with +qemu_vfree, since breaking this will cause problems on Win32. + +4. String manipulation + +Do not use the strncpy function. As mentioned in the man page, it does *not* +guarantee a NULL-terminated buffer, which makes it extremely dangerous to use. +It also zeros trailing destination bytes out to the specified length. Instead, +use this similar function when possible, but note its different signature: +void pstrcpy(char *dest, int dest_buf_size, const char *src) + +Don't use strcat because it can't check for buffer overflows, but: +char *pstrcat(char *buf, int buf_size, const char *s) + +The same limitation exists with sprintf and vsprintf, so use snprintf and +vsnprintf. + +QEMU provides other useful string functions: +int strstart(const char *str, const char *val, const char **ptr) +int stristart(const char *str, const char *val, const char **ptr) +int qemu_strnlen(const char *s, int max_len) + +There are also replacement character processing macros for isxyz and toxyz, +so instead of e.g. isalnum you should use qemu_isalnum. + +Because of the memory management rules, you must use g_strdup/g_strndup +instead of plain strdup/strndup. + +5. Printf-style functions + +Whenever you add a new printf-style function, i.e., one with a format +string argument and following "..." in its prototype, be sure to use +gcc's printf attribute directive in the prototype. + +This makes it so gcc's -Wformat and -Wformat-security options can do +their jobs and cross-check format strings with the number and types +of arguments. + +6. C standard, implementation defined and undefined behaviors + +C code in QEMU should be written to the C99 language specification. A copy +of the final version of the C99 standard with corrigenda TC1, TC2, and TC3 +included, formatted as a draft, can be downloaded from: + http://www.open-std.org/jtc1/sc22/WG14/www/docs/n1256.pdf + +The C language specification defines regions of undefined behavior and +implementation defined behavior (to give compiler authors enough leeway to +produce better code). In general, code in QEMU should follow the language +specification and avoid both undefined and implementation defined +constructs. ("It works fine on the gcc I tested it with" is not a valid +argument...) However there are a few areas where we allow ourselves to +assume certain behaviors because in practice all the platforms we care about +behave in the same way and writing strictly conformant code would be +painful. These are: + * you may assume that integers are 2s complement representation + * you may assume that right shift of a signed integer duplicates + the sign bit (ie it is an arithmetic shift, not a logical shift) diff --git a/qemu/LICENSE b/qemu/LICENSE new file mode 100644 index 00000000..da70e949 --- /dev/null +++ b/qemu/LICENSE @@ -0,0 +1,21 @@ +The following points clarify the QEMU license: + +1) QEMU as a whole is released under the GNU General Public License, +version 2. + +2) Parts of QEMU have specific licenses which are compatible with the +GNU General Public License, version 2. Hence each source file contains +its own licensing information. Source files with no licensing information +are released under the GNU General Public License, version 2 or (at your +option) any later version. + +As of July 2013, contributions under version 2 of the GNU General Public +License (and no later version) are only accepted for the following files +or directories: bsd-user/, linux-user/, hw/misc/vfio.c, hw/xen/xen_pt*. + +3) The Tiny Code Generator (TCG) is released under the BSD license + (see license headers in files). + +4) QEMU is a trademark of Fabrice Bellard. + +Fabrice Bellard and the QEMU team diff --git a/qemu/Makefile b/qemu/Makefile new file mode 100644 index 00000000..656b523c --- /dev/null +++ b/qemu/Makefile @@ -0,0 +1,192 @@ +# Makefile for QEMU - modified for Unicorn engine. + +# Always point to the root of the build tree (needs GNU make). +BUILD_DIR=$(CURDIR) + +# All following code might depend on configuration variables +ifneq ($(wildcard config-host.mak),) +# Put the all: rule here so that config-host.mak can contain dependencies. +all: +include config-host.mak + +# Check that we're not trying to do an out-of-tree build from +# a tree that's been used for an in-tree build. +ifneq ($(realpath $(SRC_PATH)),$(realpath .)) +ifneq ($(wildcard $(SRC_PATH)/config-host.mak),) +$(error This is an out of tree build but your source tree ($(SRC_PATH)) \ +seems to have been used for an in-tree build. You can fix this by running \ +"make distclean && rm -rf *-linux-user *-softmmu" in your source tree) +endif +endif + +CONFIG_SOFTMMU := $(if $(filter %-softmmu,$(TARGET_DIRS)),y) +CONFIG_USER_ONLY := $(if $(filter %-user,$(TARGET_DIRS)),y) +CONFIG_ALL=y +-include config-all-devices.mak +-include config-all-disas.mak + +include $(SRC_PATH)/rules.mak +config-host.mak: $(SRC_PATH)/configure + @echo $@ is out-of-date, running configure + @# TODO: The next lines include code which supports a smooth + @# transition from old configurations without config.status. + @# This code can be removed after QEMU 1.7. + @if test -x config.status; then \ + ./config.status; \ + else \ + sed -n "/.*Configured with/s/[^:]*: //p" $@ | sh; \ + fi +else +config-host.mak: +ifneq ($(filter-out %clean,$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fail)) + @echo "Please call configure before running make!" + @exit 1 +endif +endif + +GENERATED_HEADERS = config-host.h +GENERATED_HEADERS += qapi-types.h qapi-visit.h +GENERATED_SOURCES += qapi-types.c qapi-visit.c + +# Don't try to regenerate Makefile or configure +# We don't generate any of them +Makefile: ; +configure: ; + +.PHONY: all clean cscope distclean install recurse-all + +$(call set-vpath, $(SRC_PATH)) + +LIBS+=-lz $(LIBS_TOOLS) + +SUBDIR_MAKEFLAGS=$(if $(V),,--no-print-directory) BUILD_DIR=$(BUILD_DIR) +SUBDIR_DEVICES_MAK=$(patsubst %, %/config-devices.mak, $(TARGET_DIRS)) +SUBDIR_DEVICES_MAK_DEP=$(patsubst %, %-config-devices.mak.d, $(TARGET_DIRS)) + +ifeq ($(SUBDIR_DEVICES_MAK),) +config-all-devices.mak: + $(call quiet-command,echo '# no devices' > $@," GEN $@") +else +config-all-devices.mak: $(SUBDIR_DEVICES_MAK) + $(call quiet-command, sed -n \ + 's|^\([^=]*\)=\(.*\)$$|\1:=$$(findstring y,$$(\1)\2)|p' \ + $(SUBDIR_DEVICES_MAK) | sort -u > $@, \ + " GEN $@") +endif + +-include $(SUBDIR_DEVICES_MAK_DEP) + +%/config-devices.mak: default-configs/%.mak + $(call quiet-command,$(SHELL) $(SRC_PATH)/scripts/make_device_config.sh $@ $<, " GEN $@") + @if test -f $@; then \ + if cmp -s $@.old $@; then \ + mv $@.tmp $@; \ + cp -p $@ $@.old; \ + else \ + if test -f $@.old; then \ + echo "WARNING: $@ (user modified) out of date.";\ + else \ + echo "WARNING: $@ out of date.";\ + fi; \ + echo "Run \"make defconfig\" to regenerate."; \ + rm $@.tmp; \ + fi; \ + else \ + mv $@.tmp $@; \ + cp -p $@ $@.old; \ + fi + +defconfig: + rm -f config-all-devices.mak $(SUBDIR_DEVICES_MAK) + +ifneq ($(wildcard config-host.mak),) +include $(SRC_PATH)/Makefile.objs +endif + +dummy := $(call unnest-vars,, \ + util-obj-y \ + block-obj-y \ + block-obj-m \ + common-obj-y \ + common-obj-m) + +all: $(TOOLS) $(HELPERS-y) recurse-all modules + +config-host.h: config-host.h-timestamp +config-host.h-timestamp: config-host.mak + +SUBDIR_RULES=$(patsubst %,subdir-%, $(TARGET_DIRS)) +SOFTMMU_SUBDIR_RULES=$(filter %-softmmu,$(SUBDIR_RULES)) + +$(SOFTMMU_SUBDIR_RULES): $(block-obj-y) +$(SOFTMMU_SUBDIR_RULES): config-all-devices.mak + +subdir-%: + $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" all,) + +$(SUBDIR_RULES): qapi-types.c qapi-types.h qapi-visit.c qapi-visit.h $(common-obj-y) $(util-obj-y) + +ALL_SUBDIRS=$(TARGET_DIRS) + +recurse-all: $(SUBDIR_RULES) + +###################################################################### +# Build libraries + +util/module.o-cflags = -D'CONFIG_BLOCK_MODULES=$(block-modules)' + +###################################################################### + +gen-out-type = $(subst .,-,$(suffix $@)) + +qapi-py = $(SRC_PATH)/scripts/qapi.py $(SRC_PATH)/scripts/ordereddict.py + +qapi-modules = $(SRC_PATH)/qapi-schema.json $(SRC_PATH)/qapi/common.json + +qapi-types.c qapi-types.h :\ +$(qapi-modules) $(SRC_PATH)/scripts/qapi-types.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-types.py \ + $(gen-out-type) -o "." -b -i $<, \ + " GEN $@") +qapi-visit.c qapi-visit.h :\ +$(qapi-modules) $(SRC_PATH)/scripts/qapi-visit.py $(qapi-py) + $(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-visit.py \ + $(gen-out-type) -o "." -b -i $<, \ + " GEN $@") + +clean: +# avoid old build problems by removing potentially incorrect old files + rm -f config.mak op-i386.h opc-i386.h gen-op-i386.h op-arm.h opc-arm.h gen-op-arm.h + find . \( -name '*.l[oa]' -o -name '*.so' -o -name '*.dll' -o -name '*.mo' -o -name '*.[oda]' \) -type f -exec rm {} + + rm -f $(filter-out %.tlb,$(TOOLS)) $(HELPERS-y) qemu-ga TAGS cscope.* *.pod *~ */*~ + rm -rf .libs */.libs + @# May not be present in GENERATED_HEADERS + rm -f $(foreach f,$(GENERATED_HEADERS),$(f) $(f)-timestamp) + rm -f $(foreach f,$(GENERATED_SOURCES),$(f) $(f)-timestamp) + rm -rf qapi-generated + for d in $(ALL_SUBDIRS); do \ + if test -d $$d; then $(MAKE) -C $$d $@ || exit 1; fi; \ + done + +distclean: clean + rm -f config-host.mak config-host.h* config-host.ld qemu-img-cmds.texi qemu-monitor.texi + rm -f config-all-devices.mak config-all-disas.mak + rm -f config.log + for d in $(TARGET_DIRS); do \ + rm -rf $$d || exit 1 ; \ + done + rm -Rf .sdk + + +cscope: + rm -f ./cscope.* + find "$(SRC_PATH)" -name "*.[chsS]" -print | sed 's,^\./,,' > ./cscope.files + cscope -b + + +# Add a dependency on the generated files, so that they are always +# rebuilt before other object files +ifneq ($(filter-out %clean,$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fail)) +Makefile: $(GENERATED_HEADERS) +endif + diff --git a/qemu/Makefile.objs b/qemu/Makefile.objs new file mode 100644 index 00000000..4e7cc899 --- /dev/null +++ b/qemu/Makefile.objs @@ -0,0 +1,31 @@ +####################################################################### +# Common libraries for tools and emulators +util-obj-y = util/ qobject/ qapi/ qapi-types.o qapi-visit.o + +####################################################################### +# block-obj-y is code used by both qemu system emulation and qemu-img + +block-obj-y = +block-obj-y += ../uc.o ../hook.o +#block-obj-$(CONFIG_POSIX) += aio-posix.o +#block-obj-$(CONFIG_WIN32) += aio-win32.o + +####################################################################### +# Target independent part of system emulation. The long term path is to +# suppress *all* target specific code in case of system emulation, i.e. a +# single QEMU executable should support all CPUs and machines. + +ifeq ($(CONFIG_SOFTMMU),y) +common-obj-y += hw/ +common-obj-y += accel.o + +common-obj-y += vl.o main-loop.o qemu-timer.o + +endif + +####################################################################### +# Target-independent parts used in system and user emulation +common-obj-y += qemu-log.o +common-obj-y += tcg-runtime.o +common-obj-y += hw/ +common-obj-y += qom/ diff --git a/qemu/Makefile.target b/qemu/Makefile.target new file mode 100644 index 00000000..82c6e466 --- /dev/null +++ b/qemu/Makefile.target @@ -0,0 +1,119 @@ +# -*- Mode: makefile -*- + +include ../config-host.mak +include config-target.mak +include config-devices.mak +include $(SRC_PATH)/rules.mak + +$(call set-vpath, $(SRC_PATH)) +QEMU_CFLAGS += -I.. -I$(SRC_PATH)/target-$(TARGET_BASE_ARCH) -DNEED_CPU_H + +QEMU_CFLAGS+=-I$(SRC_PATH)/include + +ifdef CONFIG_USER_ONLY +# user emulator name +QEMU_PROG=qemu-$(TARGET_NAME) +QEMU_PROG_BUILD = $(QEMU_PROG) +else +# system emulator name +QEMU_PROG=qemu-system-$(TARGET_NAME)$(EXESUF) +ifneq (,$(findstring -mwindows,$(libs_softmmu))) +# Terminate program name with a 'w' because the linker builds a windows executable. +QEMU_PROGW=qemu-system-$(TARGET_NAME)w$(EXESUF) +$(QEMU_PROG): $(QEMU_PROGW) + $(call quiet-command,$(OBJCOPY) --subsystem console $(QEMU_PROGW) $(QEMU_PROG)," GEN $(TARGET_DIR)$(QEMU_PROG)") +QEMU_PROG_BUILD = $(QEMU_PROGW) +else +QEMU_PROG_BUILD = $(QEMU_PROG) +endif +endif + +PROGS=$(QEMU_PROG) $(QEMU_PROGW) + +config-target.h: config-target.h-timestamp +config-target.h-timestamp: config-target.mak + +all: $(PROGS) + +# Dummy command so that make thinks it has done something + @true + +######################################################### +# cpu emulator library +obj-y = exec.o translate-all.o cpu-exec.o +obj-y += tcg/tcg.o tcg/optimize.o +obj-y += fpu/softfloat.o +obj-y += target-$(TARGET_BASE_ARCH)/ + +######################################################### +# System emulator target +ifdef CONFIG_SOFTMMU +obj-y += cpus.o ioport.o +obj-y += hw/ +obj-y += memory.o cputlb.o +obj-y += memory_mapping.o +LIBS+=$(libs_softmmu) + +# Hardware support +ifeq ($(TARGET_NAME), sparc64) +obj-y += hw/sparc64/ +else +obj-y += hw/$(TARGET_BASE_ARCH)/ +endif + +endif # CONFIG_SOFTMMU + +# Workaround for http://gcc.gnu.org/PR55489, see configure. +%/translate.o: QEMU_CFLAGS += $(TRANSLATE_OPT_CFLAGS) + +dummy := $(call unnest-vars,,obj-y) +all-obj-y := $(obj-y) + +block-obj-y := +common-obj-y := +include $(SRC_PATH)/Makefile.objs + +dummy := $(call unnest-vars,..,util-obj-y) + +target-obj-y-save := $(target-obj-y) $(util-obj-y) + +dummy := $(call unnest-vars,.., \ + block-obj-y \ + block-obj-m) + +dummy := $(call unnest-vars,..,common-obj-y,common-obj-m) + +target-obj-y := $(target-obj-y-save) +all-obj-y += $(common-obj-y) +all-obj-y += $(target-obj-y) +all-obj-$(CONFIG_SOFTMMU) += $(block-obj-y) + +# determine shared lib extension +IS_APPLE := $(shell $(CC) -dM -E - < /dev/null | grep __apple_build_version__ | wc -l | tr -d " ") +ifeq ($(IS_APPLE),1) +EXT = dylib +else +# Cygwin? +IS_CYGWIN := $(shell $(CC) -dumpmachine | grep -i cygwin | wc -l) +ifeq ($(IS_CYGWIN),1) +EXT = dll +else +EXT = so +endif +endif + +# build either PROG or PROGW +$(QEMU_PROG_BUILD): $(all-obj-y) + +clean: + rm -f *.a *~ $(PROGS) + rm -f $(shell find . -name '*.[od]') + +install: all +ifneq ($(PROGS),) + $(call install-prog,$(PROGS),$(DESTDIR)$(bindir)) +endif + +GENERATED_HEADERS += config-target.h +Makefile: $(GENERATED_HEADERS) + diff --git a/qemu/VERSION b/qemu/VERSION new file mode 100644 index 00000000..c043eea7 --- /dev/null +++ b/qemu/VERSION @@ -0,0 +1 @@ +2.2.1 diff --git a/qemu/aarch64.h b/qemu/aarch64.h new file mode 100644 index 00000000..9ab06273 --- /dev/null +++ b/qemu/aarch64.h @@ -0,0 +1,3168 @@ +/* Autogen header for Unicorn Engine - DONOT MODIFY */ +#ifndef UNICORN_AUTOGEN_AARCH64_H +#define UNICORN_AUTOGEN_AARCH64_H +#define check_exit_request check_exit_request_aarch64 +#define address_space_unregister address_space_unregister_aarch64 +#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_aarch64 +#define phys_mem_clean phys_mem_clean_aarch64 +#define tb_cleanup tb_cleanup_aarch64 +#define memory_map memory_map_aarch64 +#define memory_free memory_free_aarch64 +#define helper_raise_exception helper_raise_exception_aarch64 +#define tcg_enabled tcg_enabled_aarch64 +#define tcg_exec_init tcg_exec_init_aarch64 +#define memory_register_types memory_register_types_aarch64 +#define cpu_exec_init_all cpu_exec_init_all_aarch64 +#define vm_start vm_start_aarch64 +#define resume_all_vcpus resume_all_vcpus_aarch64 +#define a15_l2ctlr_read a15_l2ctlr_read_aarch64 +#define a64_translate_init a64_translate_init_aarch64 +#define aa32_generate_debug_exceptions aa32_generate_debug_exceptions_aarch64 +#define aa64_cacheop_access aa64_cacheop_access_aarch64 +#define aa64_daif_access aa64_daif_access_aarch64 +#define aa64_daif_write aa64_daif_write_aarch64 +#define aa64_dczid_read aa64_dczid_read_aarch64 +#define aa64_fpcr_read aa64_fpcr_read_aarch64 +#define aa64_fpcr_write aa64_fpcr_write_aarch64 +#define aa64_fpsr_read aa64_fpsr_read_aarch64 +#define aa64_fpsr_write aa64_fpsr_write_aarch64 +#define aa64_generate_debug_exceptions aa64_generate_debug_exceptions_aarch64 +#define aa64_zva_access aa64_zva_access_aarch64 +#define aarch64_banked_spsr_index aarch64_banked_spsr_index_aarch64 +#define aarch64_restore_sp aarch64_restore_sp_aarch64 +#define aarch64_save_sp aarch64_save_sp_aarch64 +#define accel_find accel_find_aarch64 +#define accel_init_machine accel_init_machine_aarch64 +#define accel_type accel_type_aarch64 +#define access_with_adjusted_size access_with_adjusted_size_aarch64 +#define add128 add128_aarch64 +#define add16_sat add16_sat_aarch64 +#define add16_usat add16_usat_aarch64 +#define add192 add192_aarch64 +#define add8_sat add8_sat_aarch64 +#define add8_usat add8_usat_aarch64 +#define add_cpreg_to_hashtable add_cpreg_to_hashtable_aarch64 +#define add_cpreg_to_list add_cpreg_to_list_aarch64 +#define addFloat128Sigs addFloat128Sigs_aarch64 +#define addFloat32Sigs addFloat32Sigs_aarch64 +#define addFloat64Sigs addFloat64Sigs_aarch64 +#define addFloatx80Sigs addFloatx80Sigs_aarch64 +#define add_qemu_ldst_label add_qemu_ldst_label_aarch64 +#define address_space_access_valid address_space_access_valid_aarch64 +#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_aarch64 +#define address_space_destroy address_space_destroy_aarch64 +#define address_space_destroy_dispatch address_space_destroy_dispatch_aarch64 +#define address_space_get_flatview address_space_get_flatview_aarch64 +#define address_space_init address_space_init_aarch64 +#define address_space_init_dispatch address_space_init_dispatch_aarch64 +#define address_space_lookup_region address_space_lookup_region_aarch64 +#define address_space_map address_space_map_aarch64 +#define address_space_read address_space_read_aarch64 +#define address_space_rw address_space_rw_aarch64 +#define address_space_translate address_space_translate_aarch64 +#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64 +#define address_space_translate_internal address_space_translate_internal_aarch64 +#define address_space_unmap address_space_unmap_aarch64 +#define address_space_update_ioeventfds address_space_update_ioeventfds_aarch64 +#define address_space_update_topology address_space_update_topology_aarch64 +#define address_space_update_topology_pass address_space_update_topology_pass_aarch64 +#define address_space_write address_space_write_aarch64 +#define addrrange_contains addrrange_contains_aarch64 +#define addrrange_end addrrange_end_aarch64 +#define addrrange_equal addrrange_equal_aarch64 +#define addrrange_intersection addrrange_intersection_aarch64 +#define addrrange_intersects addrrange_intersects_aarch64 +#define addrrange_make addrrange_make_aarch64 +#define addrrange_shift addrrange_shift_aarch64 +#define adjust_endianness adjust_endianness_aarch64 +#define AES_cbc_encrypt AES_cbc_encrypt_aarch64 +#define AES_decrypt AES_decrypt_aarch64 +#define AES_encrypt AES_encrypt_aarch64 +#define AES_imc AES_imc_aarch64 +#define AES_set_decrypt_key AES_set_decrypt_key_aarch64 +#define AES_set_encrypt_key AES_set_encrypt_key_aarch64 +#define all_helpers all_helpers_aarch64 +#define alloc_code_gen_buffer alloc_code_gen_buffer_aarch64 +#define alloc_entry alloc_entry_aarch64 +#define always_true always_true_aarch64 +#define arm1026_initfn arm1026_initfn_aarch64 +#define arm1136_initfn arm1136_initfn_aarch64 +#define arm1136_r2_initfn arm1136_r2_initfn_aarch64 +#define arm1176_initfn arm1176_initfn_aarch64 +#define arm11mpcore_initfn arm11mpcore_initfn_aarch64 +#define arm926_initfn arm926_initfn_aarch64 +#define arm946_initfn arm946_initfn_aarch64 +#define arm_ccnt_enabled arm_ccnt_enabled_aarch64 +#define arm_cp_read_zero arm_cp_read_zero_aarch64 +#define arm_cp_reset_ignore arm_cp_reset_ignore_aarch64 +#define arm_cpu_do_interrupt arm_cpu_do_interrupt_aarch64 +#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_aarch64 +#define arm_cpu_finalizefn arm_cpu_finalizefn_aarch64 +#define arm_cpu_get_phys_page_debug arm_cpu_get_phys_page_debug_aarch64 +#define arm_cpu_handle_mmu_fault arm_cpu_handle_mmu_fault_aarch64 +#define arm_cpu_initfn arm_cpu_initfn_aarch64 +#define arm_cpu_list arm_cpu_list_aarch64 +#define cpu_loop_exit cpu_loop_exit_aarch64 +#define arm_cpu_post_init arm_cpu_post_init_aarch64 +#define arm_cpu_realizefn arm_cpu_realizefn_aarch64 +#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_aarch64 +#define arm_cpu_register_types arm_cpu_register_types_aarch64 +#define cpu_resume_from_signal cpu_resume_from_signal_aarch64 +#define arm_cpus arm_cpus_aarch64 +#define arm_cpu_set_pc arm_cpu_set_pc_aarch64 +#define arm_cp_write_ignore arm_cp_write_ignore_aarch64 +#define arm_current_el arm_current_el_aarch64 +#define arm_dc_feature arm_dc_feature_aarch64 +#define arm_debug_excp_handler arm_debug_excp_handler_aarch64 +#define arm_debug_target_el arm_debug_target_el_aarch64 +#define arm_el_is_aa64 arm_el_is_aa64_aarch64 +#define arm_env_get_cpu arm_env_get_cpu_aarch64 +#define arm_excp_target_el arm_excp_target_el_aarch64 +#define arm_excp_unmasked arm_excp_unmasked_aarch64 +#define arm_feature arm_feature_aarch64 +#define arm_generate_debug_exceptions arm_generate_debug_exceptions_aarch64 +#define gen_intermediate_code gen_intermediate_code_aarch64 +#define gen_intermediate_code_pc gen_intermediate_code_pc_aarch64 +#define arm_gen_test_cc arm_gen_test_cc_aarch64 +#define arm_gt_ptimer_cb arm_gt_ptimer_cb_aarch64 +#define arm_gt_vtimer_cb arm_gt_vtimer_cb_aarch64 +#define arm_handle_psci_call arm_handle_psci_call_aarch64 +#define arm_is_psci_call arm_is_psci_call_aarch64 +#define arm_is_secure arm_is_secure_aarch64 +#define arm_is_secure_below_el3 arm_is_secure_below_el3_aarch64 +#define arm_ldl_code arm_ldl_code_aarch64 +#define arm_lduw_code arm_lduw_code_aarch64 +#define arm_log_exception arm_log_exception_aarch64 +#define arm_reg_read arm_reg_read_aarch64 +#define arm_reg_reset arm_reg_reset_aarch64 +#define arm_reg_write arm_reg_write_aarch64 +#define restore_state_to_opc restore_state_to_opc_aarch64 +#define arm_rmode_to_sf arm_rmode_to_sf_aarch64 +#define arm_singlestep_active arm_singlestep_active_aarch64 +#define tlb_fill tlb_fill_aarch64 +#define tlb_flush tlb_flush_aarch64 +#define tlb_flush_page tlb_flush_page_aarch64 +#define tlb_set_page tlb_set_page_aarch64 +#define arm_translate_init arm_translate_init_aarch64 +#define arm_v7m_class_init arm_v7m_class_init_aarch64 +#define arm_v7m_cpu_do_interrupt arm_v7m_cpu_do_interrupt_aarch64 +#define ats_access ats_access_aarch64 +#define ats_write ats_write_aarch64 +#define bad_mode_switch bad_mode_switch_aarch64 +#define bank_number bank_number_aarch64 +#define bitmap_find_next_zero_area bitmap_find_next_zero_area_aarch64 +#define bitmap_zero_extend bitmap_zero_extend_aarch64 +#define bp_wp_matches bp_wp_matches_aarch64 +#define breakpoint_invalidate breakpoint_invalidate_aarch64 +#define build_page_bitmap build_page_bitmap_aarch64 +#define bus_add_child bus_add_child_aarch64 +#define bus_class_init bus_class_init_aarch64 +#define bus_info bus_info_aarch64 +#define bus_unparent bus_unparent_aarch64 +#define cache_block_ops_cp_reginfo cache_block_ops_cp_reginfo_aarch64 +#define cache_dirty_status_cp_reginfo cache_dirty_status_cp_reginfo_aarch64 +#define cache_test_clean_cp_reginfo cache_test_clean_cp_reginfo_aarch64 +#define call_recip_estimate call_recip_estimate_aarch64 +#define can_merge can_merge_aarch64 +#define capacity_increase capacity_increase_aarch64 +#define ccsidr_read ccsidr_read_aarch64 +#define check_ap check_ap_aarch64 +#define check_breakpoints check_breakpoints_aarch64 +#define check_watchpoints check_watchpoints_aarch64 +#define cho cho_aarch64 +#define clear_bit clear_bit_aarch64 +#define clz32 clz32_aarch64 +#define clz64 clz64_aarch64 +#define cmp_flatrange_addr cmp_flatrange_addr_aarch64 +#define code_gen_alloc code_gen_alloc_aarch64 +#define commonNaNToFloat128 commonNaNToFloat128_aarch64 +#define commonNaNToFloat16 commonNaNToFloat16_aarch64 +#define commonNaNToFloat32 commonNaNToFloat32_aarch64 +#define commonNaNToFloat64 commonNaNToFloat64_aarch64 +#define commonNaNToFloatx80 commonNaNToFloatx80_aarch64 +#define compute_abs_deadline compute_abs_deadline_aarch64 +#define cond_name cond_name_aarch64 +#define configure_accelerator configure_accelerator_aarch64 +#define container_get container_get_aarch64 +#define container_info container_info_aarch64 +#define container_register_types container_register_types_aarch64 +#define contextidr_write contextidr_write_aarch64 +#define core_log_global_start core_log_global_start_aarch64 +#define core_log_global_stop core_log_global_stop_aarch64 +#define core_memory_listener core_memory_listener_aarch64 +#define cortexa15_cp_reginfo cortexa15_cp_reginfo_aarch64 +#define cortex_a15_initfn cortex_a15_initfn_aarch64 +#define cortexa8_cp_reginfo cortexa8_cp_reginfo_aarch64 +#define cortex_a8_initfn cortex_a8_initfn_aarch64 +#define cortexa9_cp_reginfo cortexa9_cp_reginfo_aarch64 +#define cortex_a9_initfn cortex_a9_initfn_aarch64 +#define cortex_m3_initfn cortex_m3_initfn_aarch64 +#define count_cpreg count_cpreg_aarch64 +#define countLeadingZeros32 countLeadingZeros32_aarch64 +#define countLeadingZeros64 countLeadingZeros64_aarch64 +#define count_opts_list count_opts_list_aarch64 +#define cp_access_ok cp_access_ok_aarch64 +#define cpacr_write cpacr_write_aarch64 +#define cpreg_field_is_64bit cpreg_field_is_64bit_aarch64 +#define cp_reginfo cp_reginfo_aarch64 +#define cpreg_key_compare cpreg_key_compare_aarch64 +#define cpreg_make_keylist cpreg_make_keylist_aarch64 +#define cp_reg_reset cp_reg_reset_aarch64 +#define cpreg_to_kvm_id cpreg_to_kvm_id_aarch64 +#define cpsr_read cpsr_read_aarch64 +#define cpsr_write cpsr_write_aarch64 +#define cptype_valid cptype_valid_aarch64 +#define cpu_abort cpu_abort_aarch64 +#define cpu_arm_exec cpu_arm_exec_aarch64 +#define cpu_arm_gen_code cpu_arm_gen_code_aarch64 +#define cpu_arm_init cpu_arm_init_aarch64 +#define cpu_breakpoint_insert cpu_breakpoint_insert_aarch64 +#define cpu_breakpoint_remove cpu_breakpoint_remove_aarch64 +#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_aarch64 +#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_aarch64 +#define cpu_can_do_io cpu_can_do_io_aarch64 +#define cpu_can_run cpu_can_run_aarch64 +#define cpu_class_init cpu_class_init_aarch64 +#define cpu_common_class_by_name cpu_common_class_by_name_aarch64 +#define cpu_common_exec_interrupt cpu_common_exec_interrupt_aarch64 +#define cpu_common_get_arch_id cpu_common_get_arch_id_aarch64 +#define cpu_common_get_memory_mapping cpu_common_get_memory_mapping_aarch64 +#define cpu_common_get_paging_enabled cpu_common_get_paging_enabled_aarch64 +#define cpu_common_has_work cpu_common_has_work_aarch64 +#define cpu_common_initfn cpu_common_initfn_aarch64 +#define cpu_common_noop cpu_common_noop_aarch64 +#define cpu_common_parse_features cpu_common_parse_features_aarch64 +#define cpu_common_realizefn cpu_common_realizefn_aarch64 +#define cpu_common_reset cpu_common_reset_aarch64 +#define cpu_dump_statistics cpu_dump_statistics_aarch64 +#define cpu_exec_init cpu_exec_init_aarch64 +#define cpu_flush_icache_range cpu_flush_icache_range_aarch64 +#define cpu_gen_init cpu_gen_init_aarch64 +#define cpu_get_clock cpu_get_clock_aarch64 +#define cpu_get_real_ticks cpu_get_real_ticks_aarch64 +#define cpu_get_tb_cpu_state cpu_get_tb_cpu_state_aarch64 +#define cpu_handle_debug_exception cpu_handle_debug_exception_aarch64 +#define cpu_handle_guest_debug cpu_handle_guest_debug_aarch64 +#define cpu_inb cpu_inb_aarch64 +#define cpu_inl cpu_inl_aarch64 +#define cpu_interrupt cpu_interrupt_aarch64 +#define cpu_interrupt_handler cpu_interrupt_handler_aarch64 +#define cpu_inw cpu_inw_aarch64 +#define cpu_io_recompile cpu_io_recompile_aarch64 +#define cpu_is_stopped cpu_is_stopped_aarch64 +#define cpu_ldl_code cpu_ldl_code_aarch64 +#define cpu_ldub_code cpu_ldub_code_aarch64 +#define cpu_lduw_code cpu_lduw_code_aarch64 +#define cpu_memory_rw_debug cpu_memory_rw_debug_aarch64 +#define cpu_mmu_index cpu_mmu_index_aarch64 +#define cpu_outb cpu_outb_aarch64 +#define cpu_outl cpu_outl_aarch64 +#define cpu_outw cpu_outw_aarch64 +#define cpu_physical_memory_clear_dirty_range cpu_physical_memory_clear_dirty_range_aarch64 +#define cpu_physical_memory_get_clean cpu_physical_memory_get_clean_aarch64 +#define cpu_physical_memory_get_dirty cpu_physical_memory_get_dirty_aarch64 +#define cpu_physical_memory_get_dirty_flag cpu_physical_memory_get_dirty_flag_aarch64 +#define cpu_physical_memory_is_clean cpu_physical_memory_is_clean_aarch64 +#define cpu_physical_memory_is_io cpu_physical_memory_is_io_aarch64 +#define cpu_physical_memory_map cpu_physical_memory_map_aarch64 +#define cpu_physical_memory_range_includes_clean cpu_physical_memory_range_includes_clean_aarch64 +#define cpu_physical_memory_reset_dirty cpu_physical_memory_reset_dirty_aarch64 +#define cpu_physical_memory_rw cpu_physical_memory_rw_aarch64 +#define cpu_physical_memory_set_dirty_flag cpu_physical_memory_set_dirty_flag_aarch64 +#define cpu_physical_memory_set_dirty_range cpu_physical_memory_set_dirty_range_aarch64 +#define cpu_physical_memory_set_dirty_range_nocode cpu_physical_memory_set_dirty_range_nocode_aarch64 +#define cpu_physical_memory_unmap cpu_physical_memory_unmap_aarch64 +#define cpu_physical_memory_write_rom cpu_physical_memory_write_rom_aarch64 +#define cpu_physical_memory_write_rom_internal cpu_physical_memory_write_rom_internal_aarch64 +#define cpu_register cpu_register_aarch64 +#define cpu_register_types cpu_register_types_aarch64 +#define cpu_restore_state cpu_restore_state_aarch64 +#define cpu_restore_state_from_tb cpu_restore_state_from_tb_aarch64 +#define cpu_single_step cpu_single_step_aarch64 +#define cpu_tb_exec cpu_tb_exec_aarch64 +#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_aarch64 +#define cpu_to_be64 cpu_to_be64_aarch64 +#define cpu_to_le32 cpu_to_le32_aarch64 +#define cpu_to_le64 cpu_to_le64_aarch64 +#define cpu_type_info cpu_type_info_aarch64 +#define cpu_unassigned_access cpu_unassigned_access_aarch64 +#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_aarch64 +#define cpu_watchpoint_insert cpu_watchpoint_insert_aarch64 +#define cpu_watchpoint_remove cpu_watchpoint_remove_aarch64 +#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_aarch64 +#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_aarch64 +#define crc32c_table crc32c_table_aarch64 +#define create_new_memory_mapping create_new_memory_mapping_aarch64 +#define csselr_write csselr_write_aarch64 +#define cto32 cto32_aarch64 +#define ctr_el0_access ctr_el0_access_aarch64 +#define ctz32 ctz32_aarch64 +#define ctz64 ctz64_aarch64 +#define dacr_write dacr_write_aarch64 +#define dbgbcr_write dbgbcr_write_aarch64 +#define dbgbvr_write dbgbvr_write_aarch64 +#define dbgwcr_write dbgwcr_write_aarch64 +#define dbgwvr_write dbgwvr_write_aarch64 +#define debug_cp_reginfo debug_cp_reginfo_aarch64 +#define debug_frame debug_frame_aarch64 +#define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_aarch64 +#define define_arm_cp_regs define_arm_cp_regs_aarch64 +#define define_arm_cp_regs_with_opaque define_arm_cp_regs_with_opaque_aarch64 +#define define_debug_regs define_debug_regs_aarch64 +#define define_one_arm_cp_reg define_one_arm_cp_reg_aarch64 +#define define_one_arm_cp_reg_with_opaque define_one_arm_cp_reg_with_opaque_aarch64 +#define deposit32 deposit32_aarch64 +#define deposit64 deposit64_aarch64 +#define deregister_tm_clones deregister_tm_clones_aarch64 +#define device_class_base_init device_class_base_init_aarch64 +#define device_class_init device_class_init_aarch64 +#define device_finalize device_finalize_aarch64 +#define device_get_realized device_get_realized_aarch64 +#define device_initfn device_initfn_aarch64 +#define device_post_init device_post_init_aarch64 +#define device_reset device_reset_aarch64 +#define device_set_realized device_set_realized_aarch64 +#define device_type_info device_type_info_aarch64 +#define disas_arm_insn disas_arm_insn_aarch64 +#define disas_coproc_insn disas_coproc_insn_aarch64 +#define disas_dsp_insn disas_dsp_insn_aarch64 +#define disas_iwmmxt_insn disas_iwmmxt_insn_aarch64 +#define disas_neon_data_insn disas_neon_data_insn_aarch64 +#define disas_neon_ls_insn disas_neon_ls_insn_aarch64 +#define disas_thumb2_insn disas_thumb2_insn_aarch64 +#define disas_thumb_insn disas_thumb_insn_aarch64 +#define disas_vfp_insn disas_vfp_insn_aarch64 +#define disas_vfp_v8_insn disas_vfp_v8_insn_aarch64 +#define do_arm_semihosting do_arm_semihosting_aarch64 +#define do_clz16 do_clz16_aarch64 +#define do_clz8 do_clz8_aarch64 +#define do_constant_folding do_constant_folding_aarch64 +#define do_constant_folding_2 do_constant_folding_2_aarch64 +#define do_constant_folding_cond do_constant_folding_cond_aarch64 +#define do_constant_folding_cond2 do_constant_folding_cond2_aarch64 +#define do_constant_folding_cond_32 do_constant_folding_cond_32_aarch64 +#define do_constant_folding_cond_64 do_constant_folding_cond_64_aarch64 +#define do_constant_folding_cond_eq do_constant_folding_cond_eq_aarch64 +#define do_fcvt_f16_to_f32 do_fcvt_f16_to_f32_aarch64 +#define do_fcvt_f32_to_f16 do_fcvt_f32_to_f16_aarch64 +#define do_ssat do_ssat_aarch64 +#define do_usad do_usad_aarch64 +#define do_usat do_usat_aarch64 +#define do_v7m_exception_exit do_v7m_exception_exit_aarch64 +#define dummy_c15_cp_reginfo dummy_c15_cp_reginfo_aarch64 +#define dummy_func dummy_func_aarch64 +#define dummy_section dummy_section_aarch64 +#define _DYNAMIC _DYNAMIC_aarch64 +#define _edata _edata_aarch64 +#define _end _end_aarch64 +#define end_list end_list_aarch64 +#define eq128 eq128_aarch64 +#define ErrorClass_lookup ErrorClass_lookup_aarch64 +#define error_copy error_copy_aarch64 +#define error_exit error_exit_aarch64 +#define error_get_class error_get_class_aarch64 +#define error_get_pretty error_get_pretty_aarch64 +#define error_setg_file_open error_setg_file_open_aarch64 +#define estimateDiv128To64 estimateDiv128To64_aarch64 +#define estimateSqrt32 estimateSqrt32_aarch64 +#define excnames excnames_aarch64 +#define excp_is_internal excp_is_internal_aarch64 +#define extended_addresses_enabled extended_addresses_enabled_aarch64 +#define extended_mpu_ap_bits extended_mpu_ap_bits_aarch64 +#define extract32 extract32_aarch64 +#define extract64 extract64_aarch64 +#define extractFloat128Exp extractFloat128Exp_aarch64 +#define extractFloat128Frac0 extractFloat128Frac0_aarch64 +#define extractFloat128Frac1 extractFloat128Frac1_aarch64 +#define extractFloat128Sign extractFloat128Sign_aarch64 +#define extractFloat16Exp extractFloat16Exp_aarch64 +#define extractFloat16Frac extractFloat16Frac_aarch64 +#define extractFloat16Sign extractFloat16Sign_aarch64 +#define extractFloat32Exp extractFloat32Exp_aarch64 +#define extractFloat32Frac extractFloat32Frac_aarch64 +#define extractFloat32Sign extractFloat32Sign_aarch64 +#define extractFloat64Exp extractFloat64Exp_aarch64 +#define extractFloat64Frac extractFloat64Frac_aarch64 +#define extractFloat64Sign extractFloat64Sign_aarch64 +#define extractFloatx80Exp extractFloatx80Exp_aarch64 +#define extractFloatx80Frac extractFloatx80Frac_aarch64 +#define extractFloatx80Sign extractFloatx80Sign_aarch64 +#define fcntl_setfl fcntl_setfl_aarch64 +#define fcse_write fcse_write_aarch64 +#define find_better_copy find_better_copy_aarch64 +#define find_default_machine find_default_machine_aarch64 +#define find_desc_by_name find_desc_by_name_aarch64 +#define find_first_bit find_first_bit_aarch64 +#define find_last_bit find_last_bit_aarch64 +#define find_paging_enabled_cpu find_paging_enabled_cpu_aarch64 +#define find_ram_block find_ram_block_aarch64 +#define find_ram_offset find_ram_offset_aarch64 +#define find_string find_string_aarch64 +#define find_type find_type_aarch64 +#define _fini _fini_aarch64 +#define flatrange_equal flatrange_equal_aarch64 +#define flatview_destroy flatview_destroy_aarch64 +#define flatview_init flatview_init_aarch64 +#define flatview_insert flatview_insert_aarch64 +#define flatview_lookup flatview_lookup_aarch64 +#define flatview_ref flatview_ref_aarch64 +#define flatview_simplify flatview_simplify_aarch64 +#define flatview_unref flatview_unref_aarch64 +#define float128_add float128_add_aarch64 +#define float128_compare float128_compare_aarch64 +#define float128_compare_internal float128_compare_internal_aarch64 +#define float128_compare_quiet float128_compare_quiet_aarch64 +#define float128_default_nan float128_default_nan_aarch64 +#define float128_div float128_div_aarch64 +#define float128_eq float128_eq_aarch64 +#define float128_eq_quiet float128_eq_quiet_aarch64 +#define float128_is_quiet_nan float128_is_quiet_nan_aarch64 +#define float128_is_signaling_nan float128_is_signaling_nan_aarch64 +#define float128_le float128_le_aarch64 +#define float128_le_quiet float128_le_quiet_aarch64 +#define float128_lt float128_lt_aarch64 +#define float128_lt_quiet float128_lt_quiet_aarch64 +#define float128_maybe_silence_nan float128_maybe_silence_nan_aarch64 +#define float128_mul float128_mul_aarch64 +#define float128_rem float128_rem_aarch64 +#define float128_round_to_int float128_round_to_int_aarch64 +#define float128_scalbn float128_scalbn_aarch64 +#define float128_sqrt float128_sqrt_aarch64 +#define float128_sub float128_sub_aarch64 +#define float128ToCommonNaN float128ToCommonNaN_aarch64 +#define float128_to_float32 float128_to_float32_aarch64 +#define float128_to_float64 float128_to_float64_aarch64 +#define float128_to_floatx80 float128_to_floatx80_aarch64 +#define float128_to_int32 float128_to_int32_aarch64 +#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_aarch64 +#define float128_to_int64 float128_to_int64_aarch64 +#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_aarch64 +#define float128_unordered float128_unordered_aarch64 +#define float128_unordered_quiet float128_unordered_quiet_aarch64 +#define float16_default_nan float16_default_nan_aarch64 +#define float16_is_quiet_nan float16_is_quiet_nan_aarch64 +#define float16_is_signaling_nan float16_is_signaling_nan_aarch64 +#define float16_maybe_silence_nan float16_maybe_silence_nan_aarch64 +#define float16ToCommonNaN float16ToCommonNaN_aarch64 +#define float16_to_float32 float16_to_float32_aarch64 +#define float16_to_float64 float16_to_float64_aarch64 +#define float32_abs float32_abs_aarch64 +#define float32_add float32_add_aarch64 +#define float32_chs float32_chs_aarch64 +#define float32_compare float32_compare_aarch64 +#define float32_compare_internal float32_compare_internal_aarch64 +#define float32_compare_quiet float32_compare_quiet_aarch64 +#define float32_default_nan float32_default_nan_aarch64 +#define float32_div float32_div_aarch64 +#define float32_eq float32_eq_aarch64 +#define float32_eq_quiet float32_eq_quiet_aarch64 +#define float32_exp2 float32_exp2_aarch64 +#define float32_exp2_coefficients float32_exp2_coefficients_aarch64 +#define float32_is_any_nan float32_is_any_nan_aarch64 +#define float32_is_infinity float32_is_infinity_aarch64 +#define float32_is_neg float32_is_neg_aarch64 +#define float32_is_quiet_nan float32_is_quiet_nan_aarch64 +#define float32_is_signaling_nan float32_is_signaling_nan_aarch64 +#define float32_is_zero float32_is_zero_aarch64 +#define float32_is_zero_or_denormal float32_is_zero_or_denormal_aarch64 +#define float32_le float32_le_aarch64 +#define float32_le_quiet float32_le_quiet_aarch64 +#define float32_log2 float32_log2_aarch64 +#define float32_lt float32_lt_aarch64 +#define float32_lt_quiet float32_lt_quiet_aarch64 +#define float32_max float32_max_aarch64 +#define float32_maxnum float32_maxnum_aarch64 +#define float32_maxnummag float32_maxnummag_aarch64 +#define float32_maybe_silence_nan float32_maybe_silence_nan_aarch64 +#define float32_min float32_min_aarch64 +#define float32_minmax float32_minmax_aarch64 +#define float32_minnum float32_minnum_aarch64 +#define float32_minnummag float32_minnummag_aarch64 +#define float32_mul float32_mul_aarch64 +#define float32_muladd float32_muladd_aarch64 +#define float32_rem float32_rem_aarch64 +#define float32_round_to_int float32_round_to_int_aarch64 +#define float32_scalbn float32_scalbn_aarch64 +#define float32_set_sign float32_set_sign_aarch64 +#define float32_sqrt float32_sqrt_aarch64 +#define float32_squash_input_denormal float32_squash_input_denormal_aarch64 +#define float32_sub float32_sub_aarch64 +#define float32ToCommonNaN float32ToCommonNaN_aarch64 +#define float32_to_float128 float32_to_float128_aarch64 +#define float32_to_float16 float32_to_float16_aarch64 +#define float32_to_float64 float32_to_float64_aarch64 +#define float32_to_floatx80 float32_to_floatx80_aarch64 +#define float32_to_int16 float32_to_int16_aarch64 +#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_aarch64 +#define float32_to_int32 float32_to_int32_aarch64 +#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_aarch64 +#define float32_to_int64 float32_to_int64_aarch64 +#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_aarch64 +#define float32_to_uint16 float32_to_uint16_aarch64 +#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_aarch64 +#define float32_to_uint32 float32_to_uint32_aarch64 +#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_aarch64 +#define float32_to_uint64 float32_to_uint64_aarch64 +#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_aarch64 +#define float32_unordered float32_unordered_aarch64 +#define float32_unordered_quiet float32_unordered_quiet_aarch64 +#define float64_abs float64_abs_aarch64 +#define float64_add float64_add_aarch64 +#define float64_chs float64_chs_aarch64 +#define float64_compare float64_compare_aarch64 +#define float64_compare_internal float64_compare_internal_aarch64 +#define float64_compare_quiet float64_compare_quiet_aarch64 +#define float64_default_nan float64_default_nan_aarch64 +#define float64_div float64_div_aarch64 +#define float64_eq float64_eq_aarch64 +#define float64_eq_quiet float64_eq_quiet_aarch64 +#define float64_is_any_nan float64_is_any_nan_aarch64 +#define float64_is_infinity float64_is_infinity_aarch64 +#define float64_is_neg float64_is_neg_aarch64 +#define float64_is_quiet_nan float64_is_quiet_nan_aarch64 +#define float64_is_signaling_nan float64_is_signaling_nan_aarch64 +#define float64_is_zero float64_is_zero_aarch64 +#define float64_le float64_le_aarch64 +#define float64_le_quiet float64_le_quiet_aarch64 +#define float64_log2 float64_log2_aarch64 +#define float64_lt float64_lt_aarch64 +#define float64_lt_quiet float64_lt_quiet_aarch64 +#define float64_max float64_max_aarch64 +#define float64_maxnum float64_maxnum_aarch64 +#define float64_maxnummag float64_maxnummag_aarch64 +#define float64_maybe_silence_nan float64_maybe_silence_nan_aarch64 +#define float64_min float64_min_aarch64 +#define float64_minmax float64_minmax_aarch64 +#define float64_minnum float64_minnum_aarch64 +#define float64_minnummag float64_minnummag_aarch64 +#define float64_mul float64_mul_aarch64 +#define float64_muladd float64_muladd_aarch64 +#define float64_rem float64_rem_aarch64 +#define float64_round_to_int float64_round_to_int_aarch64 +#define float64_scalbn float64_scalbn_aarch64 +#define float64_set_sign float64_set_sign_aarch64 +#define float64_sqrt float64_sqrt_aarch64 +#define float64_squash_input_denormal float64_squash_input_denormal_aarch64 +#define float64_sub float64_sub_aarch64 +#define float64ToCommonNaN float64ToCommonNaN_aarch64 +#define float64_to_float128 float64_to_float128_aarch64 +#define float64_to_float16 float64_to_float16_aarch64 +#define float64_to_float32 float64_to_float32_aarch64 +#define float64_to_floatx80 float64_to_floatx80_aarch64 +#define float64_to_int16 float64_to_int16_aarch64 +#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_aarch64 +#define float64_to_int32 float64_to_int32_aarch64 +#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_aarch64 +#define float64_to_int64 float64_to_int64_aarch64 +#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_aarch64 +#define float64_to_uint16 float64_to_uint16_aarch64 +#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_aarch64 +#define float64_to_uint32 float64_to_uint32_aarch64 +#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_aarch64 +#define float64_to_uint64 float64_to_uint64_aarch64 +#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_aarch64 +#define float64_trunc_to_int float64_trunc_to_int_aarch64 +#define float64_unordered float64_unordered_aarch64 +#define float64_unordered_quiet float64_unordered_quiet_aarch64 +#define float_raise float_raise_aarch64 +#define floatx80_add floatx80_add_aarch64 +#define floatx80_compare floatx80_compare_aarch64 +#define floatx80_compare_internal floatx80_compare_internal_aarch64 +#define floatx80_compare_quiet floatx80_compare_quiet_aarch64 +#define floatx80_default_nan floatx80_default_nan_aarch64 +#define floatx80_div floatx80_div_aarch64 +#define floatx80_eq floatx80_eq_aarch64 +#define floatx80_eq_quiet floatx80_eq_quiet_aarch64 +#define floatx80_is_quiet_nan floatx80_is_quiet_nan_aarch64 +#define floatx80_is_signaling_nan floatx80_is_signaling_nan_aarch64 +#define floatx80_le floatx80_le_aarch64 +#define floatx80_le_quiet floatx80_le_quiet_aarch64 +#define floatx80_lt floatx80_lt_aarch64 +#define floatx80_lt_quiet floatx80_lt_quiet_aarch64 +#define floatx80_maybe_silence_nan floatx80_maybe_silence_nan_aarch64 +#define floatx80_mul floatx80_mul_aarch64 +#define floatx80_rem floatx80_rem_aarch64 +#define floatx80_round_to_int floatx80_round_to_int_aarch64 +#define floatx80_scalbn floatx80_scalbn_aarch64 +#define floatx80_sqrt floatx80_sqrt_aarch64 +#define floatx80_sub floatx80_sub_aarch64 +#define floatx80ToCommonNaN floatx80ToCommonNaN_aarch64 +#define floatx80_to_float128 floatx80_to_float128_aarch64 +#define floatx80_to_float32 floatx80_to_float32_aarch64 +#define floatx80_to_float64 floatx80_to_float64_aarch64 +#define floatx80_to_int32 floatx80_to_int32_aarch64 +#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_aarch64 +#define floatx80_to_int64 floatx80_to_int64_aarch64 +#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_aarch64 +#define floatx80_unordered floatx80_unordered_aarch64 +#define floatx80_unordered_quiet floatx80_unordered_quiet_aarch64 +#define flush_icache_range flush_icache_range_aarch64 +#define format_string format_string_aarch64 +#define fp_decode_rm fp_decode_rm_aarch64 +#define frame_dummy frame_dummy_aarch64 +#define free_range free_range_aarch64 +#define fstat64 fstat64_aarch64 +#define futex_wait futex_wait_aarch64 +#define futex_wake futex_wake_aarch64 +#define gen_aa32_ld16s gen_aa32_ld16s_aarch64 +#define gen_aa32_ld16u gen_aa32_ld16u_aarch64 +#define gen_aa32_ld32u gen_aa32_ld32u_aarch64 +#define gen_aa32_ld64 gen_aa32_ld64_aarch64 +#define gen_aa32_ld8s gen_aa32_ld8s_aarch64 +#define gen_aa32_ld8u gen_aa32_ld8u_aarch64 +#define gen_aa32_st16 gen_aa32_st16_aarch64 +#define gen_aa32_st32 gen_aa32_st32_aarch64 +#define gen_aa32_st64 gen_aa32_st64_aarch64 +#define gen_aa32_st8 gen_aa32_st8_aarch64 +#define gen_adc gen_adc_aarch64 +#define gen_adc_CC gen_adc_CC_aarch64 +#define gen_add16 gen_add16_aarch64 +#define gen_add_carry gen_add_carry_aarch64 +#define gen_add_CC gen_add_CC_aarch64 +#define gen_add_datah_offset gen_add_datah_offset_aarch64 +#define gen_add_data_offset gen_add_data_offset_aarch64 +#define gen_addq gen_addq_aarch64 +#define gen_addq_lo gen_addq_lo_aarch64 +#define gen_addq_msw gen_addq_msw_aarch64 +#define gen_arm_parallel_addsub gen_arm_parallel_addsub_aarch64 +#define gen_arm_shift_im gen_arm_shift_im_aarch64 +#define gen_arm_shift_reg gen_arm_shift_reg_aarch64 +#define gen_bx gen_bx_aarch64 +#define gen_bx_im gen_bx_im_aarch64 +#define gen_clrex gen_clrex_aarch64 +#define generate_memory_topology generate_memory_topology_aarch64 +#define generic_timer_cp_reginfo generic_timer_cp_reginfo_aarch64 +#define gen_exception gen_exception_aarch64 +#define gen_exception_insn gen_exception_insn_aarch64 +#define gen_exception_internal gen_exception_internal_aarch64 +#define gen_exception_internal_insn gen_exception_internal_insn_aarch64 +#define gen_exception_return gen_exception_return_aarch64 +#define gen_goto_tb gen_goto_tb_aarch64 +#define gen_helper_access_check_cp_reg gen_helper_access_check_cp_reg_aarch64 +#define gen_helper_add_saturate gen_helper_add_saturate_aarch64 +#define gen_helper_add_setq gen_helper_add_setq_aarch64 +#define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_aarch64 +#define gen_helper_clz32 gen_helper_clz32_aarch64 +#define gen_helper_clz64 gen_helper_clz64_aarch64 +#define gen_helper_clz_arm gen_helper_clz_arm_aarch64 +#define gen_helper_cpsr_read gen_helper_cpsr_read_aarch64 +#define gen_helper_cpsr_write gen_helper_cpsr_write_aarch64 +#define gen_helper_crc32_arm gen_helper_crc32_arm_aarch64 +#define gen_helper_crc32c gen_helper_crc32c_aarch64 +#define gen_helper_crypto_aese gen_helper_crypto_aese_aarch64 +#define gen_helper_crypto_aesmc gen_helper_crypto_aesmc_aarch64 +#define gen_helper_crypto_sha1_3reg gen_helper_crypto_sha1_3reg_aarch64 +#define gen_helper_crypto_sha1h gen_helper_crypto_sha1h_aarch64 +#define gen_helper_crypto_sha1su1 gen_helper_crypto_sha1su1_aarch64 +#define gen_helper_crypto_sha256h gen_helper_crypto_sha256h_aarch64 +#define gen_helper_crypto_sha256h2 gen_helper_crypto_sha256h2_aarch64 +#define gen_helper_crypto_sha256su0 gen_helper_crypto_sha256su0_aarch64 +#define gen_helper_crypto_sha256su1 gen_helper_crypto_sha256su1_aarch64 +#define gen_helper_double_saturate gen_helper_double_saturate_aarch64 +#define gen_helper_exception_internal gen_helper_exception_internal_aarch64 +#define gen_helper_exception_with_syndrome gen_helper_exception_with_syndrome_aarch64 +#define gen_helper_get_cp_reg gen_helper_get_cp_reg_aarch64 +#define gen_helper_get_cp_reg64 gen_helper_get_cp_reg64_aarch64 +#define gen_helper_get_r13_banked gen_helper_get_r13_banked_aarch64 +#define gen_helper_get_user_reg gen_helper_get_user_reg_aarch64 +#define gen_helper_iwmmxt_addcb gen_helper_iwmmxt_addcb_aarch64 +#define gen_helper_iwmmxt_addcl gen_helper_iwmmxt_addcl_aarch64 +#define gen_helper_iwmmxt_addcw gen_helper_iwmmxt_addcw_aarch64 +#define gen_helper_iwmmxt_addnb gen_helper_iwmmxt_addnb_aarch64 +#define gen_helper_iwmmxt_addnl gen_helper_iwmmxt_addnl_aarch64 +#define gen_helper_iwmmxt_addnw gen_helper_iwmmxt_addnw_aarch64 +#define gen_helper_iwmmxt_addsb gen_helper_iwmmxt_addsb_aarch64 +#define gen_helper_iwmmxt_addsl gen_helper_iwmmxt_addsl_aarch64 +#define gen_helper_iwmmxt_addsw gen_helper_iwmmxt_addsw_aarch64 +#define gen_helper_iwmmxt_addub gen_helper_iwmmxt_addub_aarch64 +#define gen_helper_iwmmxt_addul gen_helper_iwmmxt_addul_aarch64 +#define gen_helper_iwmmxt_adduw gen_helper_iwmmxt_adduw_aarch64 +#define gen_helper_iwmmxt_align gen_helper_iwmmxt_align_aarch64 +#define gen_helper_iwmmxt_avgb0 gen_helper_iwmmxt_avgb0_aarch64 +#define gen_helper_iwmmxt_avgb1 gen_helper_iwmmxt_avgb1_aarch64 +#define gen_helper_iwmmxt_avgw0 gen_helper_iwmmxt_avgw0_aarch64 +#define gen_helper_iwmmxt_avgw1 gen_helper_iwmmxt_avgw1_aarch64 +#define gen_helper_iwmmxt_bcstb gen_helper_iwmmxt_bcstb_aarch64 +#define gen_helper_iwmmxt_bcstl gen_helper_iwmmxt_bcstl_aarch64 +#define gen_helper_iwmmxt_bcstw gen_helper_iwmmxt_bcstw_aarch64 +#define gen_helper_iwmmxt_cmpeqb gen_helper_iwmmxt_cmpeqb_aarch64 +#define gen_helper_iwmmxt_cmpeql gen_helper_iwmmxt_cmpeql_aarch64 +#define gen_helper_iwmmxt_cmpeqw gen_helper_iwmmxt_cmpeqw_aarch64 +#define gen_helper_iwmmxt_cmpgtsb gen_helper_iwmmxt_cmpgtsb_aarch64 +#define gen_helper_iwmmxt_cmpgtsl gen_helper_iwmmxt_cmpgtsl_aarch64 +#define gen_helper_iwmmxt_cmpgtsw gen_helper_iwmmxt_cmpgtsw_aarch64 +#define gen_helper_iwmmxt_cmpgtub gen_helper_iwmmxt_cmpgtub_aarch64 +#define gen_helper_iwmmxt_cmpgtul gen_helper_iwmmxt_cmpgtul_aarch64 +#define gen_helper_iwmmxt_cmpgtuw gen_helper_iwmmxt_cmpgtuw_aarch64 +#define gen_helper_iwmmxt_insr gen_helper_iwmmxt_insr_aarch64 +#define gen_helper_iwmmxt_macsw gen_helper_iwmmxt_macsw_aarch64 +#define gen_helper_iwmmxt_macuw gen_helper_iwmmxt_macuw_aarch64 +#define gen_helper_iwmmxt_maddsq gen_helper_iwmmxt_maddsq_aarch64 +#define gen_helper_iwmmxt_madduq gen_helper_iwmmxt_madduq_aarch64 +#define gen_helper_iwmmxt_maxsb gen_helper_iwmmxt_maxsb_aarch64 +#define gen_helper_iwmmxt_maxsl gen_helper_iwmmxt_maxsl_aarch64 +#define gen_helper_iwmmxt_maxsw gen_helper_iwmmxt_maxsw_aarch64 +#define gen_helper_iwmmxt_maxub gen_helper_iwmmxt_maxub_aarch64 +#define gen_helper_iwmmxt_maxul gen_helper_iwmmxt_maxul_aarch64 +#define gen_helper_iwmmxt_maxuw gen_helper_iwmmxt_maxuw_aarch64 +#define gen_helper_iwmmxt_minsb gen_helper_iwmmxt_minsb_aarch64 +#define gen_helper_iwmmxt_minsl gen_helper_iwmmxt_minsl_aarch64 +#define gen_helper_iwmmxt_minsw gen_helper_iwmmxt_minsw_aarch64 +#define gen_helper_iwmmxt_minub gen_helper_iwmmxt_minub_aarch64 +#define gen_helper_iwmmxt_minul gen_helper_iwmmxt_minul_aarch64 +#define gen_helper_iwmmxt_minuw gen_helper_iwmmxt_minuw_aarch64 +#define gen_helper_iwmmxt_msbb gen_helper_iwmmxt_msbb_aarch64 +#define gen_helper_iwmmxt_msbl gen_helper_iwmmxt_msbl_aarch64 +#define gen_helper_iwmmxt_msbw gen_helper_iwmmxt_msbw_aarch64 +#define gen_helper_iwmmxt_muladdsl gen_helper_iwmmxt_muladdsl_aarch64 +#define gen_helper_iwmmxt_muladdsw gen_helper_iwmmxt_muladdsw_aarch64 +#define gen_helper_iwmmxt_muladdswl gen_helper_iwmmxt_muladdswl_aarch64 +#define gen_helper_iwmmxt_mulshw gen_helper_iwmmxt_mulshw_aarch64 +#define gen_helper_iwmmxt_mulslw gen_helper_iwmmxt_mulslw_aarch64 +#define gen_helper_iwmmxt_muluhw gen_helper_iwmmxt_muluhw_aarch64 +#define gen_helper_iwmmxt_mululw gen_helper_iwmmxt_mululw_aarch64 +#define gen_helper_iwmmxt_packsl gen_helper_iwmmxt_packsl_aarch64 +#define gen_helper_iwmmxt_packsq gen_helper_iwmmxt_packsq_aarch64 +#define gen_helper_iwmmxt_packsw gen_helper_iwmmxt_packsw_aarch64 +#define gen_helper_iwmmxt_packul gen_helper_iwmmxt_packul_aarch64 +#define gen_helper_iwmmxt_packuq gen_helper_iwmmxt_packuq_aarch64 +#define gen_helper_iwmmxt_packuw gen_helper_iwmmxt_packuw_aarch64 +#define gen_helper_iwmmxt_rorl gen_helper_iwmmxt_rorl_aarch64 +#define gen_helper_iwmmxt_rorq gen_helper_iwmmxt_rorq_aarch64 +#define gen_helper_iwmmxt_rorw gen_helper_iwmmxt_rorw_aarch64 +#define gen_helper_iwmmxt_sadb gen_helper_iwmmxt_sadb_aarch64 +#define gen_helper_iwmmxt_sadw gen_helper_iwmmxt_sadw_aarch64 +#define gen_helper_iwmmxt_setpsr_nz gen_helper_iwmmxt_setpsr_nz_aarch64 +#define gen_helper_iwmmxt_shufh gen_helper_iwmmxt_shufh_aarch64 +#define gen_helper_iwmmxt_slll gen_helper_iwmmxt_slll_aarch64 +#define gen_helper_iwmmxt_sllq gen_helper_iwmmxt_sllq_aarch64 +#define gen_helper_iwmmxt_sllw gen_helper_iwmmxt_sllw_aarch64 +#define gen_helper_iwmmxt_sral gen_helper_iwmmxt_sral_aarch64 +#define gen_helper_iwmmxt_sraq gen_helper_iwmmxt_sraq_aarch64 +#define gen_helper_iwmmxt_sraw gen_helper_iwmmxt_sraw_aarch64 +#define gen_helper_iwmmxt_srll gen_helper_iwmmxt_srll_aarch64 +#define gen_helper_iwmmxt_srlq gen_helper_iwmmxt_srlq_aarch64 +#define gen_helper_iwmmxt_srlw gen_helper_iwmmxt_srlw_aarch64 +#define gen_helper_iwmmxt_subnb gen_helper_iwmmxt_subnb_aarch64 +#define gen_helper_iwmmxt_subnl gen_helper_iwmmxt_subnl_aarch64 +#define gen_helper_iwmmxt_subnw gen_helper_iwmmxt_subnw_aarch64 +#define gen_helper_iwmmxt_subsb gen_helper_iwmmxt_subsb_aarch64 +#define gen_helper_iwmmxt_subsl gen_helper_iwmmxt_subsl_aarch64 +#define gen_helper_iwmmxt_subsw gen_helper_iwmmxt_subsw_aarch64 +#define gen_helper_iwmmxt_subub gen_helper_iwmmxt_subub_aarch64 +#define gen_helper_iwmmxt_subul gen_helper_iwmmxt_subul_aarch64 +#define gen_helper_iwmmxt_subuw gen_helper_iwmmxt_subuw_aarch64 +#define gen_helper_iwmmxt_unpackhb gen_helper_iwmmxt_unpackhb_aarch64 +#define gen_helper_iwmmxt_unpackhl gen_helper_iwmmxt_unpackhl_aarch64 +#define gen_helper_iwmmxt_unpackhsb gen_helper_iwmmxt_unpackhsb_aarch64 +#define gen_helper_iwmmxt_unpackhsl gen_helper_iwmmxt_unpackhsl_aarch64 +#define gen_helper_iwmmxt_unpackhsw gen_helper_iwmmxt_unpackhsw_aarch64 +#define gen_helper_iwmmxt_unpackhub gen_helper_iwmmxt_unpackhub_aarch64 +#define gen_helper_iwmmxt_unpackhul gen_helper_iwmmxt_unpackhul_aarch64 +#define gen_helper_iwmmxt_unpackhuw gen_helper_iwmmxt_unpackhuw_aarch64 +#define gen_helper_iwmmxt_unpackhw gen_helper_iwmmxt_unpackhw_aarch64 +#define gen_helper_iwmmxt_unpacklb gen_helper_iwmmxt_unpacklb_aarch64 +#define gen_helper_iwmmxt_unpackll gen_helper_iwmmxt_unpackll_aarch64 +#define gen_helper_iwmmxt_unpacklsb gen_helper_iwmmxt_unpacklsb_aarch64 +#define gen_helper_iwmmxt_unpacklsl gen_helper_iwmmxt_unpacklsl_aarch64 +#define gen_helper_iwmmxt_unpacklsw gen_helper_iwmmxt_unpacklsw_aarch64 +#define gen_helper_iwmmxt_unpacklub gen_helper_iwmmxt_unpacklub_aarch64 +#define gen_helper_iwmmxt_unpacklul gen_helper_iwmmxt_unpacklul_aarch64 +#define gen_helper_iwmmxt_unpackluw gen_helper_iwmmxt_unpackluw_aarch64 +#define gen_helper_iwmmxt_unpacklw gen_helper_iwmmxt_unpacklw_aarch64 +#define gen_helper_neon_abd_f32 gen_helper_neon_abd_f32_aarch64 +#define gen_helper_neon_abdl_s16 gen_helper_neon_abdl_s16_aarch64 +#define gen_helper_neon_abdl_s32 gen_helper_neon_abdl_s32_aarch64 +#define gen_helper_neon_abdl_s64 gen_helper_neon_abdl_s64_aarch64 +#define gen_helper_neon_abdl_u16 gen_helper_neon_abdl_u16_aarch64 +#define gen_helper_neon_abdl_u32 gen_helper_neon_abdl_u32_aarch64 +#define gen_helper_neon_abdl_u64 gen_helper_neon_abdl_u64_aarch64 +#define gen_helper_neon_abd_s16 gen_helper_neon_abd_s16_aarch64 +#define gen_helper_neon_abd_s32 gen_helper_neon_abd_s32_aarch64 +#define gen_helper_neon_abd_s8 gen_helper_neon_abd_s8_aarch64 +#define gen_helper_neon_abd_u16 gen_helper_neon_abd_u16_aarch64 +#define gen_helper_neon_abd_u32 gen_helper_neon_abd_u32_aarch64 +#define gen_helper_neon_abd_u8 gen_helper_neon_abd_u8_aarch64 +#define gen_helper_neon_abs_s16 gen_helper_neon_abs_s16_aarch64 +#define gen_helper_neon_abs_s8 gen_helper_neon_abs_s8_aarch64 +#define gen_helper_neon_acge_f32 gen_helper_neon_acge_f32_aarch64 +#define gen_helper_neon_acgt_f32 gen_helper_neon_acgt_f32_aarch64 +#define gen_helper_neon_addl_saturate_s32 gen_helper_neon_addl_saturate_s32_aarch64 +#define gen_helper_neon_addl_saturate_s64 gen_helper_neon_addl_saturate_s64_aarch64 +#define gen_helper_neon_addl_u16 gen_helper_neon_addl_u16_aarch64 +#define gen_helper_neon_addl_u32 gen_helper_neon_addl_u32_aarch64 +#define gen_helper_neon_add_u16 gen_helper_neon_add_u16_aarch64 +#define gen_helper_neon_add_u8 gen_helper_neon_add_u8_aarch64 +#define gen_helper_neon_ceq_f32 gen_helper_neon_ceq_f32_aarch64 +#define gen_helper_neon_ceq_u16 gen_helper_neon_ceq_u16_aarch64 +#define gen_helper_neon_ceq_u32 gen_helper_neon_ceq_u32_aarch64 +#define gen_helper_neon_ceq_u8 gen_helper_neon_ceq_u8_aarch64 +#define gen_helper_neon_cge_f32 gen_helper_neon_cge_f32_aarch64 +#define gen_helper_neon_cge_s16 gen_helper_neon_cge_s16_aarch64 +#define gen_helper_neon_cge_s32 gen_helper_neon_cge_s32_aarch64 +#define gen_helper_neon_cge_s8 gen_helper_neon_cge_s8_aarch64 +#define gen_helper_neon_cge_u16 gen_helper_neon_cge_u16_aarch64 +#define gen_helper_neon_cge_u32 gen_helper_neon_cge_u32_aarch64 +#define gen_helper_neon_cge_u8 gen_helper_neon_cge_u8_aarch64 +#define gen_helper_neon_cgt_f32 gen_helper_neon_cgt_f32_aarch64 +#define gen_helper_neon_cgt_s16 gen_helper_neon_cgt_s16_aarch64 +#define gen_helper_neon_cgt_s32 gen_helper_neon_cgt_s32_aarch64 +#define gen_helper_neon_cgt_s8 gen_helper_neon_cgt_s8_aarch64 +#define gen_helper_neon_cgt_u16 gen_helper_neon_cgt_u16_aarch64 +#define gen_helper_neon_cgt_u32 gen_helper_neon_cgt_u32_aarch64 +#define gen_helper_neon_cgt_u8 gen_helper_neon_cgt_u8_aarch64 +#define gen_helper_neon_cls_s16 gen_helper_neon_cls_s16_aarch64 +#define gen_helper_neon_cls_s32 gen_helper_neon_cls_s32_aarch64 +#define gen_helper_neon_cls_s8 gen_helper_neon_cls_s8_aarch64 +#define gen_helper_neon_clz_u16 gen_helper_neon_clz_u16_aarch64 +#define gen_helper_neon_clz_u8 gen_helper_neon_clz_u8_aarch64 +#define gen_helper_neon_cnt_u8 gen_helper_neon_cnt_u8_aarch64 +#define gen_helper_neon_fcvt_f16_to_f32 gen_helper_neon_fcvt_f16_to_f32_aarch64 +#define gen_helper_neon_fcvt_f32_to_f16 gen_helper_neon_fcvt_f32_to_f16_aarch64 +#define gen_helper_neon_hadd_s16 gen_helper_neon_hadd_s16_aarch64 +#define gen_helper_neon_hadd_s32 gen_helper_neon_hadd_s32_aarch64 +#define gen_helper_neon_hadd_s8 gen_helper_neon_hadd_s8_aarch64 +#define gen_helper_neon_hadd_u16 gen_helper_neon_hadd_u16_aarch64 +#define gen_helper_neon_hadd_u32 gen_helper_neon_hadd_u32_aarch64 +#define gen_helper_neon_hadd_u8 gen_helper_neon_hadd_u8_aarch64 +#define gen_helper_neon_hsub_s16 gen_helper_neon_hsub_s16_aarch64 +#define gen_helper_neon_hsub_s32 gen_helper_neon_hsub_s32_aarch64 +#define gen_helper_neon_hsub_s8 gen_helper_neon_hsub_s8_aarch64 +#define gen_helper_neon_hsub_u16 gen_helper_neon_hsub_u16_aarch64 +#define gen_helper_neon_hsub_u32 gen_helper_neon_hsub_u32_aarch64 +#define gen_helper_neon_hsub_u8 gen_helper_neon_hsub_u8_aarch64 +#define gen_helper_neon_max_s16 gen_helper_neon_max_s16_aarch64 +#define gen_helper_neon_max_s32 gen_helper_neon_max_s32_aarch64 +#define gen_helper_neon_max_s8 gen_helper_neon_max_s8_aarch64 +#define gen_helper_neon_max_u16 gen_helper_neon_max_u16_aarch64 +#define gen_helper_neon_max_u32 gen_helper_neon_max_u32_aarch64 +#define gen_helper_neon_max_u8 gen_helper_neon_max_u8_aarch64 +#define gen_helper_neon_min_s16 gen_helper_neon_min_s16_aarch64 +#define gen_helper_neon_min_s32 gen_helper_neon_min_s32_aarch64 +#define gen_helper_neon_min_s8 gen_helper_neon_min_s8_aarch64 +#define gen_helper_neon_min_u16 gen_helper_neon_min_u16_aarch64 +#define gen_helper_neon_min_u32 gen_helper_neon_min_u32_aarch64 +#define gen_helper_neon_min_u8 gen_helper_neon_min_u8_aarch64 +#define gen_helper_neon_mull_p8 gen_helper_neon_mull_p8_aarch64 +#define gen_helper_neon_mull_s16 gen_helper_neon_mull_s16_aarch64 +#define gen_helper_neon_mull_s8 gen_helper_neon_mull_s8_aarch64 +#define gen_helper_neon_mull_u16 gen_helper_neon_mull_u16_aarch64 +#define gen_helper_neon_mull_u8 gen_helper_neon_mull_u8_aarch64 +#define gen_helper_neon_mul_p8 gen_helper_neon_mul_p8_aarch64 +#define gen_helper_neon_mul_u16 gen_helper_neon_mul_u16_aarch64 +#define gen_helper_neon_mul_u8 gen_helper_neon_mul_u8_aarch64 +#define gen_helper_neon_narrow_high_u16 gen_helper_neon_narrow_high_u16_aarch64 +#define gen_helper_neon_narrow_high_u8 gen_helper_neon_narrow_high_u8_aarch64 +#define gen_helper_neon_narrow_round_high_u16 gen_helper_neon_narrow_round_high_u16_aarch64 +#define gen_helper_neon_narrow_round_high_u8 gen_helper_neon_narrow_round_high_u8_aarch64 +#define gen_helper_neon_narrow_sat_s16 gen_helper_neon_narrow_sat_s16_aarch64 +#define gen_helper_neon_narrow_sat_s32 gen_helper_neon_narrow_sat_s32_aarch64 +#define gen_helper_neon_narrow_sat_s8 gen_helper_neon_narrow_sat_s8_aarch64 +#define gen_helper_neon_narrow_sat_u16 gen_helper_neon_narrow_sat_u16_aarch64 +#define gen_helper_neon_narrow_sat_u32 gen_helper_neon_narrow_sat_u32_aarch64 +#define gen_helper_neon_narrow_sat_u8 gen_helper_neon_narrow_sat_u8_aarch64 +#define gen_helper_neon_narrow_u16 gen_helper_neon_narrow_u16_aarch64 +#define gen_helper_neon_narrow_u8 gen_helper_neon_narrow_u8_aarch64 +#define gen_helper_neon_negl_u16 gen_helper_neon_negl_u16_aarch64 +#define gen_helper_neon_negl_u32 gen_helper_neon_negl_u32_aarch64 +#define gen_helper_neon_paddl_u16 gen_helper_neon_paddl_u16_aarch64 +#define gen_helper_neon_paddl_u32 gen_helper_neon_paddl_u32_aarch64 +#define gen_helper_neon_padd_u16 gen_helper_neon_padd_u16_aarch64 +#define gen_helper_neon_padd_u8 gen_helper_neon_padd_u8_aarch64 +#define gen_helper_neon_pmax_s16 gen_helper_neon_pmax_s16_aarch64 +#define gen_helper_neon_pmax_s8 gen_helper_neon_pmax_s8_aarch64 +#define gen_helper_neon_pmax_u16 gen_helper_neon_pmax_u16_aarch64 +#define gen_helper_neon_pmax_u8 gen_helper_neon_pmax_u8_aarch64 +#define gen_helper_neon_pmin_s16 gen_helper_neon_pmin_s16_aarch64 +#define gen_helper_neon_pmin_s8 gen_helper_neon_pmin_s8_aarch64 +#define gen_helper_neon_pmin_u16 gen_helper_neon_pmin_u16_aarch64 +#define gen_helper_neon_pmin_u8 gen_helper_neon_pmin_u8_aarch64 +#define gen_helper_neon_pmull_64_hi gen_helper_neon_pmull_64_hi_aarch64 +#define gen_helper_neon_pmull_64_lo gen_helper_neon_pmull_64_lo_aarch64 +#define gen_helper_neon_qabs_s16 gen_helper_neon_qabs_s16_aarch64 +#define gen_helper_neon_qabs_s32 gen_helper_neon_qabs_s32_aarch64 +#define gen_helper_neon_qabs_s8 gen_helper_neon_qabs_s8_aarch64 +#define gen_helper_neon_qadd_s16 gen_helper_neon_qadd_s16_aarch64 +#define gen_helper_neon_qadd_s32 gen_helper_neon_qadd_s32_aarch64 +#define gen_helper_neon_qadd_s64 gen_helper_neon_qadd_s64_aarch64 +#define gen_helper_neon_qadd_s8 gen_helper_neon_qadd_s8_aarch64 +#define gen_helper_neon_qadd_u16 gen_helper_neon_qadd_u16_aarch64 +#define gen_helper_neon_qadd_u32 gen_helper_neon_qadd_u32_aarch64 +#define gen_helper_neon_qadd_u64 gen_helper_neon_qadd_u64_aarch64 +#define gen_helper_neon_qadd_u8 gen_helper_neon_qadd_u8_aarch64 +#define gen_helper_neon_qdmulh_s16 gen_helper_neon_qdmulh_s16_aarch64 +#define gen_helper_neon_qdmulh_s32 gen_helper_neon_qdmulh_s32_aarch64 +#define gen_helper_neon_qneg_s16 gen_helper_neon_qneg_s16_aarch64 +#define gen_helper_neon_qneg_s32 gen_helper_neon_qneg_s32_aarch64 +#define gen_helper_neon_qneg_s8 gen_helper_neon_qneg_s8_aarch64 +#define gen_helper_neon_qrdmulh_s16 gen_helper_neon_qrdmulh_s16_aarch64 +#define gen_helper_neon_qrdmulh_s32 gen_helper_neon_qrdmulh_s32_aarch64 +#define gen_helper_neon_qrshl_s16 gen_helper_neon_qrshl_s16_aarch64 +#define gen_helper_neon_qrshl_s32 gen_helper_neon_qrshl_s32_aarch64 +#define gen_helper_neon_qrshl_s64 gen_helper_neon_qrshl_s64_aarch64 +#define gen_helper_neon_qrshl_s8 gen_helper_neon_qrshl_s8_aarch64 +#define gen_helper_neon_qrshl_u16 gen_helper_neon_qrshl_u16_aarch64 +#define gen_helper_neon_qrshl_u32 gen_helper_neon_qrshl_u32_aarch64 +#define gen_helper_neon_qrshl_u64 gen_helper_neon_qrshl_u64_aarch64 +#define gen_helper_neon_qrshl_u8 gen_helper_neon_qrshl_u8_aarch64 +#define gen_helper_neon_qshl_s16 gen_helper_neon_qshl_s16_aarch64 +#define gen_helper_neon_qshl_s32 gen_helper_neon_qshl_s32_aarch64 +#define gen_helper_neon_qshl_s64 gen_helper_neon_qshl_s64_aarch64 +#define gen_helper_neon_qshl_s8 gen_helper_neon_qshl_s8_aarch64 +#define gen_helper_neon_qshl_u16 gen_helper_neon_qshl_u16_aarch64 +#define gen_helper_neon_qshl_u32 gen_helper_neon_qshl_u32_aarch64 +#define gen_helper_neon_qshl_u64 gen_helper_neon_qshl_u64_aarch64 +#define gen_helper_neon_qshl_u8 gen_helper_neon_qshl_u8_aarch64 +#define gen_helper_neon_qshlu_s16 gen_helper_neon_qshlu_s16_aarch64 +#define gen_helper_neon_qshlu_s32 gen_helper_neon_qshlu_s32_aarch64 +#define gen_helper_neon_qshlu_s64 gen_helper_neon_qshlu_s64_aarch64 +#define gen_helper_neon_qshlu_s8 gen_helper_neon_qshlu_s8_aarch64 +#define gen_helper_neon_qsub_s16 gen_helper_neon_qsub_s16_aarch64 +#define gen_helper_neon_qsub_s32 gen_helper_neon_qsub_s32_aarch64 +#define gen_helper_neon_qsub_s64 gen_helper_neon_qsub_s64_aarch64 +#define gen_helper_neon_qsub_s8 gen_helper_neon_qsub_s8_aarch64 +#define gen_helper_neon_qsub_u16 gen_helper_neon_qsub_u16_aarch64 +#define gen_helper_neon_qsub_u32 gen_helper_neon_qsub_u32_aarch64 +#define gen_helper_neon_qsub_u64 gen_helper_neon_qsub_u64_aarch64 +#define gen_helper_neon_qsub_u8 gen_helper_neon_qsub_u8_aarch64 +#define gen_helper_neon_qunzip16 gen_helper_neon_qunzip16_aarch64 +#define gen_helper_neon_qunzip32 gen_helper_neon_qunzip32_aarch64 +#define gen_helper_neon_qunzip8 gen_helper_neon_qunzip8_aarch64 +#define gen_helper_neon_qzip16 gen_helper_neon_qzip16_aarch64 +#define gen_helper_neon_qzip32 gen_helper_neon_qzip32_aarch64 +#define gen_helper_neon_qzip8 gen_helper_neon_qzip8_aarch64 +#define gen_helper_neon_rhadd_s16 gen_helper_neon_rhadd_s16_aarch64 +#define gen_helper_neon_rhadd_s32 gen_helper_neon_rhadd_s32_aarch64 +#define gen_helper_neon_rhadd_s8 gen_helper_neon_rhadd_s8_aarch64 +#define gen_helper_neon_rhadd_u16 gen_helper_neon_rhadd_u16_aarch64 +#define gen_helper_neon_rhadd_u32 gen_helper_neon_rhadd_u32_aarch64 +#define gen_helper_neon_rhadd_u8 gen_helper_neon_rhadd_u8_aarch64 +#define gen_helper_neon_rshl_s16 gen_helper_neon_rshl_s16_aarch64 +#define gen_helper_neon_rshl_s32 gen_helper_neon_rshl_s32_aarch64 +#define gen_helper_neon_rshl_s64 gen_helper_neon_rshl_s64_aarch64 +#define gen_helper_neon_rshl_s8 gen_helper_neon_rshl_s8_aarch64 +#define gen_helper_neon_rshl_u16 gen_helper_neon_rshl_u16_aarch64 +#define gen_helper_neon_rshl_u32 gen_helper_neon_rshl_u32_aarch64 +#define gen_helper_neon_rshl_u64 gen_helper_neon_rshl_u64_aarch64 +#define gen_helper_neon_rshl_u8 gen_helper_neon_rshl_u8_aarch64 +#define gen_helper_neon_shl_s16 gen_helper_neon_shl_s16_aarch64 +#define gen_helper_neon_shl_s32 gen_helper_neon_shl_s32_aarch64 +#define gen_helper_neon_shl_s64 gen_helper_neon_shl_s64_aarch64 +#define gen_helper_neon_shl_s8 gen_helper_neon_shl_s8_aarch64 +#define gen_helper_neon_shl_u16 gen_helper_neon_shl_u16_aarch64 +#define gen_helper_neon_shl_u32 gen_helper_neon_shl_u32_aarch64 +#define gen_helper_neon_shl_u64 gen_helper_neon_shl_u64_aarch64 +#define gen_helper_neon_shl_u8 gen_helper_neon_shl_u8_aarch64 +#define gen_helper_neon_subl_u16 gen_helper_neon_subl_u16_aarch64 +#define gen_helper_neon_subl_u32 gen_helper_neon_subl_u32_aarch64 +#define gen_helper_neon_sub_u16 gen_helper_neon_sub_u16_aarch64 +#define gen_helper_neon_sub_u8 gen_helper_neon_sub_u8_aarch64 +#define gen_helper_neon_tbl gen_helper_neon_tbl_aarch64 +#define gen_helper_neon_tst_u16 gen_helper_neon_tst_u16_aarch64 +#define gen_helper_neon_tst_u32 gen_helper_neon_tst_u32_aarch64 +#define gen_helper_neon_tst_u8 gen_helper_neon_tst_u8_aarch64 +#define gen_helper_neon_unarrow_sat16 gen_helper_neon_unarrow_sat16_aarch64 +#define gen_helper_neon_unarrow_sat32 gen_helper_neon_unarrow_sat32_aarch64 +#define gen_helper_neon_unarrow_sat8 gen_helper_neon_unarrow_sat8_aarch64 +#define gen_helper_neon_unzip16 gen_helper_neon_unzip16_aarch64 +#define gen_helper_neon_unzip8 gen_helper_neon_unzip8_aarch64 +#define gen_helper_neon_widen_s16 gen_helper_neon_widen_s16_aarch64 +#define gen_helper_neon_widen_s8 gen_helper_neon_widen_s8_aarch64 +#define gen_helper_neon_widen_u16 gen_helper_neon_widen_u16_aarch64 +#define gen_helper_neon_widen_u8 gen_helper_neon_widen_u8_aarch64 +#define gen_helper_neon_zip16 gen_helper_neon_zip16_aarch64 +#define gen_helper_neon_zip8 gen_helper_neon_zip8_aarch64 +#define gen_helper_pre_hvc gen_helper_pre_hvc_aarch64 +#define gen_helper_pre_smc gen_helper_pre_smc_aarch64 +#define gen_helper_qadd16 gen_helper_qadd16_aarch64 +#define gen_helper_qadd8 gen_helper_qadd8_aarch64 +#define gen_helper_qaddsubx gen_helper_qaddsubx_aarch64 +#define gen_helper_qsub16 gen_helper_qsub16_aarch64 +#define gen_helper_qsub8 gen_helper_qsub8_aarch64 +#define gen_helper_qsubaddx gen_helper_qsubaddx_aarch64 +#define gen_helper_rbit gen_helper_rbit_aarch64 +#define gen_helper_recpe_f32 gen_helper_recpe_f32_aarch64 +#define gen_helper_recpe_u32 gen_helper_recpe_u32_aarch64 +#define gen_helper_recps_f32 gen_helper_recps_f32_aarch64 +#define gen_helper_rintd gen_helper_rintd_aarch64 +#define gen_helper_rintd_exact gen_helper_rintd_exact_aarch64 +#define gen_helper_rints gen_helper_rints_aarch64 +#define gen_helper_rints_exact gen_helper_rints_exact_aarch64 +#define gen_helper_ror_cc gen_helper_ror_cc_aarch64 +#define gen_helper_rsqrte_f32 gen_helper_rsqrte_f32_aarch64 +#define gen_helper_rsqrte_u32 gen_helper_rsqrte_u32_aarch64 +#define gen_helper_rsqrts_f32 gen_helper_rsqrts_f32_aarch64 +#define gen_helper_sadd16 gen_helper_sadd16_aarch64 +#define gen_helper_sadd8 gen_helper_sadd8_aarch64 +#define gen_helper_saddsubx gen_helper_saddsubx_aarch64 +#define gen_helper_sar_cc gen_helper_sar_cc_aarch64 +#define gen_helper_sdiv gen_helper_sdiv_aarch64 +#define gen_helper_sel_flags gen_helper_sel_flags_aarch64 +#define gen_helper_set_cp_reg gen_helper_set_cp_reg_aarch64 +#define gen_helper_set_cp_reg64 gen_helper_set_cp_reg64_aarch64 +#define gen_helper_set_neon_rmode gen_helper_set_neon_rmode_aarch64 +#define gen_helper_set_r13_banked gen_helper_set_r13_banked_aarch64 +#define gen_helper_set_rmode gen_helper_set_rmode_aarch64 +#define gen_helper_set_user_reg gen_helper_set_user_reg_aarch64 +#define gen_helper_shadd16 gen_helper_shadd16_aarch64 +#define gen_helper_shadd8 gen_helper_shadd8_aarch64 +#define gen_helper_shaddsubx gen_helper_shaddsubx_aarch64 +#define gen_helper_shl_cc gen_helper_shl_cc_aarch64 +#define gen_helper_shr_cc gen_helper_shr_cc_aarch64 +#define gen_helper_shsub16 gen_helper_shsub16_aarch64 +#define gen_helper_shsub8 gen_helper_shsub8_aarch64 +#define gen_helper_shsubaddx gen_helper_shsubaddx_aarch64 +#define gen_helper_ssat gen_helper_ssat_aarch64 +#define gen_helper_ssat16 gen_helper_ssat16_aarch64 +#define gen_helper_ssub16 gen_helper_ssub16_aarch64 +#define gen_helper_ssub8 gen_helper_ssub8_aarch64 +#define gen_helper_ssubaddx gen_helper_ssubaddx_aarch64 +#define gen_helper_sub_saturate gen_helper_sub_saturate_aarch64 +#define gen_helper_sxtb16 gen_helper_sxtb16_aarch64 +#define gen_helper_uadd16 gen_helper_uadd16_aarch64 +#define gen_helper_uadd8 gen_helper_uadd8_aarch64 +#define gen_helper_uaddsubx gen_helper_uaddsubx_aarch64 +#define gen_helper_udiv gen_helper_udiv_aarch64 +#define gen_helper_uhadd16 gen_helper_uhadd16_aarch64 +#define gen_helper_uhadd8 gen_helper_uhadd8_aarch64 +#define gen_helper_uhaddsubx gen_helper_uhaddsubx_aarch64 +#define gen_helper_uhsub16 gen_helper_uhsub16_aarch64 +#define gen_helper_uhsub8 gen_helper_uhsub8_aarch64 +#define gen_helper_uhsubaddx gen_helper_uhsubaddx_aarch64 +#define gen_helper_uqadd16 gen_helper_uqadd16_aarch64 +#define gen_helper_uqadd8 gen_helper_uqadd8_aarch64 +#define gen_helper_uqaddsubx gen_helper_uqaddsubx_aarch64 +#define gen_helper_uqsub16 gen_helper_uqsub16_aarch64 +#define gen_helper_uqsub8 gen_helper_uqsub8_aarch64 +#define gen_helper_uqsubaddx gen_helper_uqsubaddx_aarch64 +#define gen_helper_usad8 gen_helper_usad8_aarch64 +#define gen_helper_usat gen_helper_usat_aarch64 +#define gen_helper_usat16 gen_helper_usat16_aarch64 +#define gen_helper_usub16 gen_helper_usub16_aarch64 +#define gen_helper_usub8 gen_helper_usub8_aarch64 +#define gen_helper_usubaddx gen_helper_usubaddx_aarch64 +#define gen_helper_uxtb16 gen_helper_uxtb16_aarch64 +#define gen_helper_v7m_mrs gen_helper_v7m_mrs_aarch64 +#define gen_helper_v7m_msr gen_helper_v7m_msr_aarch64 +#define gen_helper_vfp_absd gen_helper_vfp_absd_aarch64 +#define gen_helper_vfp_abss gen_helper_vfp_abss_aarch64 +#define gen_helper_vfp_addd gen_helper_vfp_addd_aarch64 +#define gen_helper_vfp_adds gen_helper_vfp_adds_aarch64 +#define gen_helper_vfp_cmpd gen_helper_vfp_cmpd_aarch64 +#define gen_helper_vfp_cmped gen_helper_vfp_cmped_aarch64 +#define gen_helper_vfp_cmpes gen_helper_vfp_cmpes_aarch64 +#define gen_helper_vfp_cmps gen_helper_vfp_cmps_aarch64 +#define gen_helper_vfp_divd gen_helper_vfp_divd_aarch64 +#define gen_helper_vfp_divs gen_helper_vfp_divs_aarch64 +#define gen_helper_vfp_fcvtds gen_helper_vfp_fcvtds_aarch64 +#define gen_helper_vfp_fcvt_f16_to_f32 gen_helper_vfp_fcvt_f16_to_f32_aarch64 +#define gen_helper_vfp_fcvt_f16_to_f64 gen_helper_vfp_fcvt_f16_to_f64_aarch64 +#define gen_helper_vfp_fcvt_f32_to_f16 gen_helper_vfp_fcvt_f32_to_f16_aarch64 +#define gen_helper_vfp_fcvt_f64_to_f16 gen_helper_vfp_fcvt_f64_to_f16_aarch64 +#define gen_helper_vfp_fcvtsd gen_helper_vfp_fcvtsd_aarch64 +#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_aarch64 +#define gen_helper_vfp_maxnumd gen_helper_vfp_maxnumd_aarch64 +#define gen_helper_vfp_maxnums gen_helper_vfp_maxnums_aarch64 +#define gen_helper_vfp_maxs gen_helper_vfp_maxs_aarch64 +#define gen_helper_vfp_minnumd gen_helper_vfp_minnumd_aarch64 +#define gen_helper_vfp_minnums gen_helper_vfp_minnums_aarch64 +#define gen_helper_vfp_mins gen_helper_vfp_mins_aarch64 +#define gen_helper_vfp_muladdd gen_helper_vfp_muladdd_aarch64 +#define gen_helper_vfp_muladds gen_helper_vfp_muladds_aarch64 +#define gen_helper_vfp_muld gen_helper_vfp_muld_aarch64 +#define gen_helper_vfp_muls gen_helper_vfp_muls_aarch64 +#define gen_helper_vfp_negd gen_helper_vfp_negd_aarch64 +#define gen_helper_vfp_negs gen_helper_vfp_negs_aarch64 +#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_aarch64 +#define gen_helper_vfp_shtod gen_helper_vfp_shtod_aarch64 +#define gen_helper_vfp_shtos gen_helper_vfp_shtos_aarch64 +#define gen_helper_vfp_sitod gen_helper_vfp_sitod_aarch64 +#define gen_helper_vfp_sitos gen_helper_vfp_sitos_aarch64 +#define gen_helper_vfp_sltod gen_helper_vfp_sltod_aarch64 +#define gen_helper_vfp_sltos gen_helper_vfp_sltos_aarch64 +#define gen_helper_vfp_sqrtd gen_helper_vfp_sqrtd_aarch64 +#define gen_helper_vfp_sqrts gen_helper_vfp_sqrts_aarch64 +#define gen_helper_vfp_subd gen_helper_vfp_subd_aarch64 +#define gen_helper_vfp_subs gen_helper_vfp_subs_aarch64 +#define gen_helper_vfp_toshd_round_to_zero gen_helper_vfp_toshd_round_to_zero_aarch64 +#define gen_helper_vfp_toshs_round_to_zero gen_helper_vfp_toshs_round_to_zero_aarch64 +#define gen_helper_vfp_tosid gen_helper_vfp_tosid_aarch64 +#define gen_helper_vfp_tosis gen_helper_vfp_tosis_aarch64 +#define gen_helper_vfp_tosizd gen_helper_vfp_tosizd_aarch64 +#define gen_helper_vfp_tosizs gen_helper_vfp_tosizs_aarch64 +#define gen_helper_vfp_tosld gen_helper_vfp_tosld_aarch64 +#define gen_helper_vfp_tosld_round_to_zero gen_helper_vfp_tosld_round_to_zero_aarch64 +#define gen_helper_vfp_tosls gen_helper_vfp_tosls_aarch64 +#define gen_helper_vfp_tosls_round_to_zero gen_helper_vfp_tosls_round_to_zero_aarch64 +#define gen_helper_vfp_touhd_round_to_zero gen_helper_vfp_touhd_round_to_zero_aarch64 +#define gen_helper_vfp_touhs_round_to_zero gen_helper_vfp_touhs_round_to_zero_aarch64 +#define gen_helper_vfp_touid gen_helper_vfp_touid_aarch64 +#define gen_helper_vfp_touis gen_helper_vfp_touis_aarch64 +#define gen_helper_vfp_touizd gen_helper_vfp_touizd_aarch64 +#define gen_helper_vfp_touizs gen_helper_vfp_touizs_aarch64 +#define gen_helper_vfp_tould gen_helper_vfp_tould_aarch64 +#define gen_helper_vfp_tould_round_to_zero gen_helper_vfp_tould_round_to_zero_aarch64 +#define gen_helper_vfp_touls gen_helper_vfp_touls_aarch64 +#define gen_helper_vfp_touls_round_to_zero gen_helper_vfp_touls_round_to_zero_aarch64 +#define gen_helper_vfp_uhtod gen_helper_vfp_uhtod_aarch64 +#define gen_helper_vfp_uhtos gen_helper_vfp_uhtos_aarch64 +#define gen_helper_vfp_uitod gen_helper_vfp_uitod_aarch64 +#define gen_helper_vfp_uitos gen_helper_vfp_uitos_aarch64 +#define gen_helper_vfp_ultod gen_helper_vfp_ultod_aarch64 +#define gen_helper_vfp_ultos gen_helper_vfp_ultos_aarch64 +#define gen_helper_wfe gen_helper_wfe_aarch64 +#define gen_helper_wfi gen_helper_wfi_aarch64 +#define gen_hvc gen_hvc_aarch64 +#define gen_intermediate_code_internal gen_intermediate_code_internal_aarch64 +#define gen_intermediate_code_internal_a64 gen_intermediate_code_internal_a64_aarch64 +#define gen_iwmmxt_address gen_iwmmxt_address_aarch64 +#define gen_iwmmxt_shift gen_iwmmxt_shift_aarch64 +#define gen_jmp gen_jmp_aarch64 +#define gen_load_and_replicate gen_load_and_replicate_aarch64 +#define gen_load_exclusive gen_load_exclusive_aarch64 +#define gen_logic_CC gen_logic_CC_aarch64 +#define gen_logicq_cc gen_logicq_cc_aarch64 +#define gen_lookup_tb gen_lookup_tb_aarch64 +#define gen_mov_F0_vreg gen_mov_F0_vreg_aarch64 +#define gen_mov_F1_vreg gen_mov_F1_vreg_aarch64 +#define gen_mov_vreg_F0 gen_mov_vreg_F0_aarch64 +#define gen_muls_i64_i32 gen_muls_i64_i32_aarch64 +#define gen_mulu_i64_i32 gen_mulu_i64_i32_aarch64 +#define gen_mulxy gen_mulxy_aarch64 +#define gen_neon_add gen_neon_add_aarch64 +#define gen_neon_addl gen_neon_addl_aarch64 +#define gen_neon_addl_saturate gen_neon_addl_saturate_aarch64 +#define gen_neon_bsl gen_neon_bsl_aarch64 +#define gen_neon_dup_high16 gen_neon_dup_high16_aarch64 +#define gen_neon_dup_low16 gen_neon_dup_low16_aarch64 +#define gen_neon_dup_u8 gen_neon_dup_u8_aarch64 +#define gen_neon_mull gen_neon_mull_aarch64 +#define gen_neon_narrow gen_neon_narrow_aarch64 +#define gen_neon_narrow_op gen_neon_narrow_op_aarch64 +#define gen_neon_narrow_sats gen_neon_narrow_sats_aarch64 +#define gen_neon_narrow_satu gen_neon_narrow_satu_aarch64 +#define gen_neon_negl gen_neon_negl_aarch64 +#define gen_neon_rsb gen_neon_rsb_aarch64 +#define gen_neon_shift_narrow gen_neon_shift_narrow_aarch64 +#define gen_neon_subl gen_neon_subl_aarch64 +#define gen_neon_trn_u16 gen_neon_trn_u16_aarch64 +#define gen_neon_trn_u8 gen_neon_trn_u8_aarch64 +#define gen_neon_unarrow_sats gen_neon_unarrow_sats_aarch64 +#define gen_neon_unzip gen_neon_unzip_aarch64 +#define gen_neon_widen gen_neon_widen_aarch64 +#define gen_neon_zip gen_neon_zip_aarch64 +#define gen_new_label gen_new_label_aarch64 +#define gen_nop_hint gen_nop_hint_aarch64 +#define gen_op_iwmmxt_addl_M0_wRn gen_op_iwmmxt_addl_M0_wRn_aarch64 +#define gen_op_iwmmxt_addnb_M0_wRn gen_op_iwmmxt_addnb_M0_wRn_aarch64 +#define gen_op_iwmmxt_addnl_M0_wRn gen_op_iwmmxt_addnl_M0_wRn_aarch64 +#define gen_op_iwmmxt_addnw_M0_wRn gen_op_iwmmxt_addnw_M0_wRn_aarch64 +#define gen_op_iwmmxt_addsb_M0_wRn gen_op_iwmmxt_addsb_M0_wRn_aarch64 +#define gen_op_iwmmxt_addsl_M0_wRn gen_op_iwmmxt_addsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_addsw_M0_wRn gen_op_iwmmxt_addsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_addub_M0_wRn gen_op_iwmmxt_addub_M0_wRn_aarch64 +#define gen_op_iwmmxt_addul_M0_wRn gen_op_iwmmxt_addul_M0_wRn_aarch64 +#define gen_op_iwmmxt_adduw_M0_wRn gen_op_iwmmxt_adduw_M0_wRn_aarch64 +#define gen_op_iwmmxt_andq_M0_wRn gen_op_iwmmxt_andq_M0_wRn_aarch64 +#define gen_op_iwmmxt_avgb0_M0_wRn gen_op_iwmmxt_avgb0_M0_wRn_aarch64 +#define gen_op_iwmmxt_avgb1_M0_wRn gen_op_iwmmxt_avgb1_M0_wRn_aarch64 +#define gen_op_iwmmxt_avgw0_M0_wRn gen_op_iwmmxt_avgw0_M0_wRn_aarch64 +#define gen_op_iwmmxt_avgw1_M0_wRn gen_op_iwmmxt_avgw1_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpeqb_M0_wRn gen_op_iwmmxt_cmpeqb_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpeql_M0_wRn gen_op_iwmmxt_cmpeql_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpeqw_M0_wRn gen_op_iwmmxt_cmpeqw_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtsb_M0_wRn gen_op_iwmmxt_cmpgtsb_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtsl_M0_wRn gen_op_iwmmxt_cmpgtsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtsw_M0_wRn gen_op_iwmmxt_cmpgtsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtub_M0_wRn gen_op_iwmmxt_cmpgtub_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtul_M0_wRn gen_op_iwmmxt_cmpgtul_M0_wRn_aarch64 +#define gen_op_iwmmxt_cmpgtuw_M0_wRn gen_op_iwmmxt_cmpgtuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_macsw_M0_wRn gen_op_iwmmxt_macsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_macuw_M0_wRn gen_op_iwmmxt_macuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_maddsq_M0_wRn gen_op_iwmmxt_maddsq_M0_wRn_aarch64 +#define gen_op_iwmmxt_madduq_M0_wRn gen_op_iwmmxt_madduq_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxsb_M0_wRn gen_op_iwmmxt_maxsb_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxsl_M0_wRn gen_op_iwmmxt_maxsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxsw_M0_wRn gen_op_iwmmxt_maxsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxub_M0_wRn gen_op_iwmmxt_maxub_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxul_M0_wRn gen_op_iwmmxt_maxul_M0_wRn_aarch64 +#define gen_op_iwmmxt_maxuw_M0_wRn gen_op_iwmmxt_maxuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_minsb_M0_wRn gen_op_iwmmxt_minsb_M0_wRn_aarch64 +#define gen_op_iwmmxt_minsl_M0_wRn gen_op_iwmmxt_minsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_minsw_M0_wRn gen_op_iwmmxt_minsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_minub_M0_wRn gen_op_iwmmxt_minub_M0_wRn_aarch64 +#define gen_op_iwmmxt_minul_M0_wRn gen_op_iwmmxt_minul_M0_wRn_aarch64 +#define gen_op_iwmmxt_minuw_M0_wRn gen_op_iwmmxt_minuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_movq_M0_wRn gen_op_iwmmxt_movq_M0_wRn_aarch64 +#define gen_op_iwmmxt_movq_wRn_M0 gen_op_iwmmxt_movq_wRn_M0_aarch64 +#define gen_op_iwmmxt_mulshw_M0_wRn gen_op_iwmmxt_mulshw_M0_wRn_aarch64 +#define gen_op_iwmmxt_mulslw_M0_wRn gen_op_iwmmxt_mulslw_M0_wRn_aarch64 +#define gen_op_iwmmxt_muluhw_M0_wRn gen_op_iwmmxt_muluhw_M0_wRn_aarch64 +#define gen_op_iwmmxt_mululw_M0_wRn gen_op_iwmmxt_mululw_M0_wRn_aarch64 +#define gen_op_iwmmxt_orq_M0_wRn gen_op_iwmmxt_orq_M0_wRn_aarch64 +#define gen_op_iwmmxt_packsl_M0_wRn gen_op_iwmmxt_packsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_packsq_M0_wRn gen_op_iwmmxt_packsq_M0_wRn_aarch64 +#define gen_op_iwmmxt_packsw_M0_wRn gen_op_iwmmxt_packsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_packul_M0_wRn gen_op_iwmmxt_packul_M0_wRn_aarch64 +#define gen_op_iwmmxt_packuq_M0_wRn gen_op_iwmmxt_packuq_M0_wRn_aarch64 +#define gen_op_iwmmxt_packuw_M0_wRn gen_op_iwmmxt_packuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_sadb_M0_wRn gen_op_iwmmxt_sadb_M0_wRn_aarch64 +#define gen_op_iwmmxt_sadw_M0_wRn gen_op_iwmmxt_sadw_M0_wRn_aarch64 +#define gen_op_iwmmxt_set_cup gen_op_iwmmxt_set_cup_aarch64 +#define gen_op_iwmmxt_set_mup gen_op_iwmmxt_set_mup_aarch64 +#define gen_op_iwmmxt_setpsr_nz gen_op_iwmmxt_setpsr_nz_aarch64 +#define gen_op_iwmmxt_subnb_M0_wRn gen_op_iwmmxt_subnb_M0_wRn_aarch64 +#define gen_op_iwmmxt_subnl_M0_wRn gen_op_iwmmxt_subnl_M0_wRn_aarch64 +#define gen_op_iwmmxt_subnw_M0_wRn gen_op_iwmmxt_subnw_M0_wRn_aarch64 +#define gen_op_iwmmxt_subsb_M0_wRn gen_op_iwmmxt_subsb_M0_wRn_aarch64 +#define gen_op_iwmmxt_subsl_M0_wRn gen_op_iwmmxt_subsl_M0_wRn_aarch64 +#define gen_op_iwmmxt_subsw_M0_wRn gen_op_iwmmxt_subsw_M0_wRn_aarch64 +#define gen_op_iwmmxt_subub_M0_wRn gen_op_iwmmxt_subub_M0_wRn_aarch64 +#define gen_op_iwmmxt_subul_M0_wRn gen_op_iwmmxt_subul_M0_wRn_aarch64 +#define gen_op_iwmmxt_subuw_M0_wRn gen_op_iwmmxt_subuw_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpackhb_M0_wRn gen_op_iwmmxt_unpackhb_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpackhl_M0_wRn gen_op_iwmmxt_unpackhl_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpackhsb_M0 gen_op_iwmmxt_unpackhsb_M0_aarch64 +#define gen_op_iwmmxt_unpackhsl_M0 gen_op_iwmmxt_unpackhsl_M0_aarch64 +#define gen_op_iwmmxt_unpackhsw_M0 gen_op_iwmmxt_unpackhsw_M0_aarch64 +#define gen_op_iwmmxt_unpackhub_M0 gen_op_iwmmxt_unpackhub_M0_aarch64 +#define gen_op_iwmmxt_unpackhul_M0 gen_op_iwmmxt_unpackhul_M0_aarch64 +#define gen_op_iwmmxt_unpackhuw_M0 gen_op_iwmmxt_unpackhuw_M0_aarch64 +#define gen_op_iwmmxt_unpackhw_M0_wRn gen_op_iwmmxt_unpackhw_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpacklb_M0_wRn gen_op_iwmmxt_unpacklb_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpackll_M0_wRn gen_op_iwmmxt_unpackll_M0_wRn_aarch64 +#define gen_op_iwmmxt_unpacklsb_M0 gen_op_iwmmxt_unpacklsb_M0_aarch64 +#define gen_op_iwmmxt_unpacklsl_M0 gen_op_iwmmxt_unpacklsl_M0_aarch64 +#define gen_op_iwmmxt_unpacklsw_M0 gen_op_iwmmxt_unpacklsw_M0_aarch64 +#define gen_op_iwmmxt_unpacklub_M0 gen_op_iwmmxt_unpacklub_M0_aarch64 +#define gen_op_iwmmxt_unpacklul_M0 gen_op_iwmmxt_unpacklul_M0_aarch64 +#define gen_op_iwmmxt_unpackluw_M0 gen_op_iwmmxt_unpackluw_M0_aarch64 +#define gen_op_iwmmxt_unpacklw_M0_wRn gen_op_iwmmxt_unpacklw_M0_wRn_aarch64 +#define gen_op_iwmmxt_xorq_M0_wRn gen_op_iwmmxt_xorq_M0_wRn_aarch64 +#define gen_rev16 gen_rev16_aarch64 +#define gen_revsh gen_revsh_aarch64 +#define gen_rfe gen_rfe_aarch64 +#define gen_sar gen_sar_aarch64 +#define gen_sbc_CC gen_sbc_CC_aarch64 +#define gen_sbfx gen_sbfx_aarch64 +#define gen_set_CF_bit31 gen_set_CF_bit31_aarch64 +#define gen_set_condexec gen_set_condexec_aarch64 +#define gen_set_cpsr gen_set_cpsr_aarch64 +#define gen_set_label gen_set_label_aarch64 +#define gen_set_pc_im gen_set_pc_im_aarch64 +#define gen_set_psr gen_set_psr_aarch64 +#define gen_set_psr_im gen_set_psr_im_aarch64 +#define gen_shl gen_shl_aarch64 +#define gen_shr gen_shr_aarch64 +#define gen_smc gen_smc_aarch64 +#define gen_smul_dual gen_smul_dual_aarch64 +#define gen_srs gen_srs_aarch64 +#define gen_ss_advance gen_ss_advance_aarch64 +#define gen_step_complete_exception gen_step_complete_exception_aarch64 +#define gen_store_exclusive gen_store_exclusive_aarch64 +#define gen_storeq_reg gen_storeq_reg_aarch64 +#define gen_sub_carry gen_sub_carry_aarch64 +#define gen_sub_CC gen_sub_CC_aarch64 +#define gen_subq_msw gen_subq_msw_aarch64 +#define gen_swap_half gen_swap_half_aarch64 +#define gen_thumb2_data_op gen_thumb2_data_op_aarch64 +#define gen_thumb2_parallel_addsub gen_thumb2_parallel_addsub_aarch64 +#define gen_ubfx gen_ubfx_aarch64 +#define gen_vfp_abs gen_vfp_abs_aarch64 +#define gen_vfp_add gen_vfp_add_aarch64 +#define gen_vfp_cmp gen_vfp_cmp_aarch64 +#define gen_vfp_cmpe gen_vfp_cmpe_aarch64 +#define gen_vfp_div gen_vfp_div_aarch64 +#define gen_vfp_F1_ld0 gen_vfp_F1_ld0_aarch64 +#define gen_vfp_F1_mul gen_vfp_F1_mul_aarch64 +#define gen_vfp_F1_neg gen_vfp_F1_neg_aarch64 +#define gen_vfp_ld gen_vfp_ld_aarch64 +#define gen_vfp_mrs gen_vfp_mrs_aarch64 +#define gen_vfp_msr gen_vfp_msr_aarch64 +#define gen_vfp_mul gen_vfp_mul_aarch64 +#define gen_vfp_neg gen_vfp_neg_aarch64 +#define gen_vfp_shto gen_vfp_shto_aarch64 +#define gen_vfp_sito gen_vfp_sito_aarch64 +#define gen_vfp_slto gen_vfp_slto_aarch64 +#define gen_vfp_sqrt gen_vfp_sqrt_aarch64 +#define gen_vfp_st gen_vfp_st_aarch64 +#define gen_vfp_sub gen_vfp_sub_aarch64 +#define gen_vfp_tosh gen_vfp_tosh_aarch64 +#define gen_vfp_tosi gen_vfp_tosi_aarch64 +#define gen_vfp_tosiz gen_vfp_tosiz_aarch64 +#define gen_vfp_tosl gen_vfp_tosl_aarch64 +#define gen_vfp_touh gen_vfp_touh_aarch64 +#define gen_vfp_toui gen_vfp_toui_aarch64 +#define gen_vfp_touiz gen_vfp_touiz_aarch64 +#define gen_vfp_toul gen_vfp_toul_aarch64 +#define gen_vfp_uhto gen_vfp_uhto_aarch64 +#define gen_vfp_uito gen_vfp_uito_aarch64 +#define gen_vfp_ulto gen_vfp_ulto_aarch64 +#define get_arm_cp_reginfo get_arm_cp_reginfo_aarch64 +#define get_clock get_clock_aarch64 +#define get_clock_realtime get_clock_realtime_aarch64 +#define get_constraint_priority get_constraint_priority_aarch64 +#define get_float_exception_flags get_float_exception_flags_aarch64 +#define get_float_rounding_mode get_float_rounding_mode_aarch64 +#define get_fpstatus_ptr get_fpstatus_ptr_aarch64 +#define get_level1_table_address get_level1_table_address_aarch64 +#define get_mem_index get_mem_index_aarch64 +#define get_next_param_value get_next_param_value_aarch64 +#define get_opt_name get_opt_name_aarch64 +#define get_opt_value get_opt_value_aarch64 +#define get_page_addr_code get_page_addr_code_aarch64 +#define get_param_value get_param_value_aarch64 +#define get_phys_addr get_phys_addr_aarch64 +#define get_phys_addr_lpae get_phys_addr_lpae_aarch64 +#define get_phys_addr_mpu get_phys_addr_mpu_aarch64 +#define get_phys_addr_v5 get_phys_addr_v5_aarch64 +#define get_phys_addr_v6 get_phys_addr_v6_aarch64 +#define get_system_memory get_system_memory_aarch64 +#define get_ticks_per_sec get_ticks_per_sec_aarch64 +#define g_list_insert_sorted_merged g_list_insert_sorted_merged_aarch64 +#define _GLOBAL_OFFSET_TABLE_ _GLOBAL_OFFSET_TABLE__aarch64 +#define gt_cntfrq_access gt_cntfrq_access_aarch64 +#define gt_cnt_read gt_cnt_read_aarch64 +#define gt_cnt_reset gt_cnt_reset_aarch64 +#define gt_counter_access gt_counter_access_aarch64 +#define gt_ctl_write gt_ctl_write_aarch64 +#define gt_cval_write gt_cval_write_aarch64 +#define gt_get_countervalue gt_get_countervalue_aarch64 +#define gt_pct_access gt_pct_access_aarch64 +#define gt_ptimer_access gt_ptimer_access_aarch64 +#define gt_recalc_timer gt_recalc_timer_aarch64 +#define gt_timer_access gt_timer_access_aarch64 +#define gt_tval_read gt_tval_read_aarch64 +#define gt_tval_write gt_tval_write_aarch64 +#define gt_vct_access gt_vct_access_aarch64 +#define gt_vtimer_access gt_vtimer_access_aarch64 +#define guest_phys_blocks_free guest_phys_blocks_free_aarch64 +#define guest_phys_blocks_init guest_phys_blocks_init_aarch64 +#define handle_vcvt handle_vcvt_aarch64 +#define handle_vminmaxnm handle_vminmaxnm_aarch64 +#define handle_vrint handle_vrint_aarch64 +#define handle_vsel handle_vsel_aarch64 +#define has_help_option has_help_option_aarch64 +#define have_bmi1 have_bmi1_aarch64 +#define have_bmi2 have_bmi2_aarch64 +#define hcr_write hcr_write_aarch64 +#define helper_access_check_cp_reg helper_access_check_cp_reg_aarch64 +#define helper_add_saturate helper_add_saturate_aarch64 +#define helper_add_setq helper_add_setq_aarch64 +#define helper_add_usaturate helper_add_usaturate_aarch64 +#define helper_be_ldl_cmmu helper_be_ldl_cmmu_aarch64 +#define helper_be_ldq_cmmu helper_be_ldq_cmmu_aarch64 +#define helper_be_ldq_mmu helper_be_ldq_mmu_aarch64 +#define helper_be_ldsl_mmu helper_be_ldsl_mmu_aarch64 +#define helper_be_ldsw_mmu helper_be_ldsw_mmu_aarch64 +#define helper_be_ldul_mmu helper_be_ldul_mmu_aarch64 +#define helper_be_lduw_mmu helper_be_lduw_mmu_aarch64 +#define helper_be_ldw_cmmu helper_be_ldw_cmmu_aarch64 +#define helper_be_stl_mmu helper_be_stl_mmu_aarch64 +#define helper_be_stq_mmu helper_be_stq_mmu_aarch64 +#define helper_be_stw_mmu helper_be_stw_mmu_aarch64 +#define helper_clear_pstate_ss helper_clear_pstate_ss_aarch64 +#define helper_clz_arm helper_clz_arm_aarch64 +#define helper_cpsr_read helper_cpsr_read_aarch64 +#define helper_cpsr_write helper_cpsr_write_aarch64 +#define helper_crc32_arm helper_crc32_arm_aarch64 +#define helper_crc32c helper_crc32c_aarch64 +#define helper_crypto_aese helper_crypto_aese_aarch64 +#define helper_crypto_aesmc helper_crypto_aesmc_aarch64 +#define helper_crypto_sha1_3reg helper_crypto_sha1_3reg_aarch64 +#define helper_crypto_sha1h helper_crypto_sha1h_aarch64 +#define helper_crypto_sha1su1 helper_crypto_sha1su1_aarch64 +#define helper_crypto_sha256h helper_crypto_sha256h_aarch64 +#define helper_crypto_sha256h2 helper_crypto_sha256h2_aarch64 +#define helper_crypto_sha256su0 helper_crypto_sha256su0_aarch64 +#define helper_crypto_sha256su1 helper_crypto_sha256su1_aarch64 +#define helper_dc_zva helper_dc_zva_aarch64 +#define helper_double_saturate helper_double_saturate_aarch64 +#define helper_exception_internal helper_exception_internal_aarch64 +#define helper_exception_return helper_exception_return_aarch64 +#define helper_exception_with_syndrome helper_exception_with_syndrome_aarch64 +#define helper_get_cp_reg helper_get_cp_reg_aarch64 +#define helper_get_cp_reg64 helper_get_cp_reg64_aarch64 +#define helper_get_r13_banked helper_get_r13_banked_aarch64 +#define helper_get_user_reg helper_get_user_reg_aarch64 +#define helper_iwmmxt_addcb helper_iwmmxt_addcb_aarch64 +#define helper_iwmmxt_addcl helper_iwmmxt_addcl_aarch64 +#define helper_iwmmxt_addcw helper_iwmmxt_addcw_aarch64 +#define helper_iwmmxt_addnb helper_iwmmxt_addnb_aarch64 +#define helper_iwmmxt_addnl helper_iwmmxt_addnl_aarch64 +#define helper_iwmmxt_addnw helper_iwmmxt_addnw_aarch64 +#define helper_iwmmxt_addsb helper_iwmmxt_addsb_aarch64 +#define helper_iwmmxt_addsl helper_iwmmxt_addsl_aarch64 +#define helper_iwmmxt_addsw helper_iwmmxt_addsw_aarch64 +#define helper_iwmmxt_addub helper_iwmmxt_addub_aarch64 +#define helper_iwmmxt_addul helper_iwmmxt_addul_aarch64 +#define helper_iwmmxt_adduw helper_iwmmxt_adduw_aarch64 +#define helper_iwmmxt_align helper_iwmmxt_align_aarch64 +#define helper_iwmmxt_avgb0 helper_iwmmxt_avgb0_aarch64 +#define helper_iwmmxt_avgb1 helper_iwmmxt_avgb1_aarch64 +#define helper_iwmmxt_avgw0 helper_iwmmxt_avgw0_aarch64 +#define helper_iwmmxt_avgw1 helper_iwmmxt_avgw1_aarch64 +#define helper_iwmmxt_bcstb helper_iwmmxt_bcstb_aarch64 +#define helper_iwmmxt_bcstl helper_iwmmxt_bcstl_aarch64 +#define helper_iwmmxt_bcstw helper_iwmmxt_bcstw_aarch64 +#define helper_iwmmxt_cmpeqb helper_iwmmxt_cmpeqb_aarch64 +#define helper_iwmmxt_cmpeql helper_iwmmxt_cmpeql_aarch64 +#define helper_iwmmxt_cmpeqw helper_iwmmxt_cmpeqw_aarch64 +#define helper_iwmmxt_cmpgtsb helper_iwmmxt_cmpgtsb_aarch64 +#define helper_iwmmxt_cmpgtsl helper_iwmmxt_cmpgtsl_aarch64 +#define helper_iwmmxt_cmpgtsw helper_iwmmxt_cmpgtsw_aarch64 +#define helper_iwmmxt_cmpgtub helper_iwmmxt_cmpgtub_aarch64 +#define helper_iwmmxt_cmpgtul helper_iwmmxt_cmpgtul_aarch64 +#define helper_iwmmxt_cmpgtuw helper_iwmmxt_cmpgtuw_aarch64 +#define helper_iwmmxt_insr helper_iwmmxt_insr_aarch64 +#define helper_iwmmxt_macsw helper_iwmmxt_macsw_aarch64 +#define helper_iwmmxt_macuw helper_iwmmxt_macuw_aarch64 +#define helper_iwmmxt_maddsq helper_iwmmxt_maddsq_aarch64 +#define helper_iwmmxt_madduq helper_iwmmxt_madduq_aarch64 +#define helper_iwmmxt_maxsb helper_iwmmxt_maxsb_aarch64 +#define helper_iwmmxt_maxsl helper_iwmmxt_maxsl_aarch64 +#define helper_iwmmxt_maxsw helper_iwmmxt_maxsw_aarch64 +#define helper_iwmmxt_maxub helper_iwmmxt_maxub_aarch64 +#define helper_iwmmxt_maxul helper_iwmmxt_maxul_aarch64 +#define helper_iwmmxt_maxuw helper_iwmmxt_maxuw_aarch64 +#define helper_iwmmxt_minsb helper_iwmmxt_minsb_aarch64 +#define helper_iwmmxt_minsl helper_iwmmxt_minsl_aarch64 +#define helper_iwmmxt_minsw helper_iwmmxt_minsw_aarch64 +#define helper_iwmmxt_minub helper_iwmmxt_minub_aarch64 +#define helper_iwmmxt_minul helper_iwmmxt_minul_aarch64 +#define helper_iwmmxt_minuw helper_iwmmxt_minuw_aarch64 +#define helper_iwmmxt_msbb helper_iwmmxt_msbb_aarch64 +#define helper_iwmmxt_msbl helper_iwmmxt_msbl_aarch64 +#define helper_iwmmxt_msbw helper_iwmmxt_msbw_aarch64 +#define helper_iwmmxt_muladdsl helper_iwmmxt_muladdsl_aarch64 +#define helper_iwmmxt_muladdsw helper_iwmmxt_muladdsw_aarch64 +#define helper_iwmmxt_muladdswl helper_iwmmxt_muladdswl_aarch64 +#define helper_iwmmxt_mulshw helper_iwmmxt_mulshw_aarch64 +#define helper_iwmmxt_mulslw helper_iwmmxt_mulslw_aarch64 +#define helper_iwmmxt_muluhw helper_iwmmxt_muluhw_aarch64 +#define helper_iwmmxt_mululw helper_iwmmxt_mululw_aarch64 +#define helper_iwmmxt_packsl helper_iwmmxt_packsl_aarch64 +#define helper_iwmmxt_packsq helper_iwmmxt_packsq_aarch64 +#define helper_iwmmxt_packsw helper_iwmmxt_packsw_aarch64 +#define helper_iwmmxt_packul helper_iwmmxt_packul_aarch64 +#define helper_iwmmxt_packuq helper_iwmmxt_packuq_aarch64 +#define helper_iwmmxt_packuw helper_iwmmxt_packuw_aarch64 +#define helper_iwmmxt_rorl helper_iwmmxt_rorl_aarch64 +#define helper_iwmmxt_rorq helper_iwmmxt_rorq_aarch64 +#define helper_iwmmxt_rorw helper_iwmmxt_rorw_aarch64 +#define helper_iwmmxt_sadb helper_iwmmxt_sadb_aarch64 +#define helper_iwmmxt_sadw helper_iwmmxt_sadw_aarch64 +#define helper_iwmmxt_setpsr_nz helper_iwmmxt_setpsr_nz_aarch64 +#define helper_iwmmxt_shufh helper_iwmmxt_shufh_aarch64 +#define helper_iwmmxt_slll helper_iwmmxt_slll_aarch64 +#define helper_iwmmxt_sllq helper_iwmmxt_sllq_aarch64 +#define helper_iwmmxt_sllw helper_iwmmxt_sllw_aarch64 +#define helper_iwmmxt_sral helper_iwmmxt_sral_aarch64 +#define helper_iwmmxt_sraq helper_iwmmxt_sraq_aarch64 +#define helper_iwmmxt_sraw helper_iwmmxt_sraw_aarch64 +#define helper_iwmmxt_srll helper_iwmmxt_srll_aarch64 +#define helper_iwmmxt_srlq helper_iwmmxt_srlq_aarch64 +#define helper_iwmmxt_srlw helper_iwmmxt_srlw_aarch64 +#define helper_iwmmxt_subnb helper_iwmmxt_subnb_aarch64 +#define helper_iwmmxt_subnl helper_iwmmxt_subnl_aarch64 +#define helper_iwmmxt_subnw helper_iwmmxt_subnw_aarch64 +#define helper_iwmmxt_subsb helper_iwmmxt_subsb_aarch64 +#define helper_iwmmxt_subsl helper_iwmmxt_subsl_aarch64 +#define helper_iwmmxt_subsw helper_iwmmxt_subsw_aarch64 +#define helper_iwmmxt_subub helper_iwmmxt_subub_aarch64 +#define helper_iwmmxt_subul helper_iwmmxt_subul_aarch64 +#define helper_iwmmxt_subuw helper_iwmmxt_subuw_aarch64 +#define helper_iwmmxt_unpackhb helper_iwmmxt_unpackhb_aarch64 +#define helper_iwmmxt_unpackhl helper_iwmmxt_unpackhl_aarch64 +#define helper_iwmmxt_unpackhsb helper_iwmmxt_unpackhsb_aarch64 +#define helper_iwmmxt_unpackhsl helper_iwmmxt_unpackhsl_aarch64 +#define helper_iwmmxt_unpackhsw helper_iwmmxt_unpackhsw_aarch64 +#define helper_iwmmxt_unpackhub helper_iwmmxt_unpackhub_aarch64 +#define helper_iwmmxt_unpackhul helper_iwmmxt_unpackhul_aarch64 +#define helper_iwmmxt_unpackhuw helper_iwmmxt_unpackhuw_aarch64 +#define helper_iwmmxt_unpackhw helper_iwmmxt_unpackhw_aarch64 +#define helper_iwmmxt_unpacklb helper_iwmmxt_unpacklb_aarch64 +#define helper_iwmmxt_unpackll helper_iwmmxt_unpackll_aarch64 +#define helper_iwmmxt_unpacklsb helper_iwmmxt_unpacklsb_aarch64 +#define helper_iwmmxt_unpacklsl helper_iwmmxt_unpacklsl_aarch64 +#define helper_iwmmxt_unpacklsw helper_iwmmxt_unpacklsw_aarch64 +#define helper_iwmmxt_unpacklub helper_iwmmxt_unpacklub_aarch64 +#define helper_iwmmxt_unpacklul helper_iwmmxt_unpacklul_aarch64 +#define helper_iwmmxt_unpackluw helper_iwmmxt_unpackluw_aarch64 +#define helper_iwmmxt_unpacklw helper_iwmmxt_unpacklw_aarch64 +#define helper_ldb_cmmu helper_ldb_cmmu_aarch64 +#define helper_ldb_mmu helper_ldb_mmu_aarch64 +#define helper_ldl_cmmu helper_ldl_cmmu_aarch64 +#define helper_ldl_mmu helper_ldl_mmu_aarch64 +#define helper_ldq_cmmu helper_ldq_cmmu_aarch64 +#define helper_ldq_mmu helper_ldq_mmu_aarch64 +#define helper_ldw_cmmu helper_ldw_cmmu_aarch64 +#define helper_ldw_mmu helper_ldw_mmu_aarch64 +#define helper_le_ldl_cmmu helper_le_ldl_cmmu_aarch64 +#define helper_le_ldq_cmmu helper_le_ldq_cmmu_aarch64 +#define helper_le_ldq_mmu helper_le_ldq_mmu_aarch64 +#define helper_le_ldsl_mmu helper_le_ldsl_mmu_aarch64 +#define helper_le_ldsw_mmu helper_le_ldsw_mmu_aarch64 +#define helper_le_ldul_mmu helper_le_ldul_mmu_aarch64 +#define helper_le_lduw_mmu helper_le_lduw_mmu_aarch64 +#define helper_le_ldw_cmmu helper_le_ldw_cmmu_aarch64 +#define helper_le_stl_mmu helper_le_stl_mmu_aarch64 +#define helper_le_stq_mmu helper_le_stq_mmu_aarch64 +#define helper_le_stw_mmu helper_le_stw_mmu_aarch64 +#define helper_msr_i_pstate helper_msr_i_pstate_aarch64 +#define helper_neon_abd_f32 helper_neon_abd_f32_aarch64 +#define helper_neon_abdl_s16 helper_neon_abdl_s16_aarch64 +#define helper_neon_abdl_s32 helper_neon_abdl_s32_aarch64 +#define helper_neon_abdl_s64 helper_neon_abdl_s64_aarch64 +#define helper_neon_abdl_u16 helper_neon_abdl_u16_aarch64 +#define helper_neon_abdl_u32 helper_neon_abdl_u32_aarch64 +#define helper_neon_abdl_u64 helper_neon_abdl_u64_aarch64 +#define helper_neon_abd_s16 helper_neon_abd_s16_aarch64 +#define helper_neon_abd_s32 helper_neon_abd_s32_aarch64 +#define helper_neon_abd_s8 helper_neon_abd_s8_aarch64 +#define helper_neon_abd_u16 helper_neon_abd_u16_aarch64 +#define helper_neon_abd_u32 helper_neon_abd_u32_aarch64 +#define helper_neon_abd_u8 helper_neon_abd_u8_aarch64 +#define helper_neon_abs_s16 helper_neon_abs_s16_aarch64 +#define helper_neon_abs_s8 helper_neon_abs_s8_aarch64 +#define helper_neon_acge_f32 helper_neon_acge_f32_aarch64 +#define helper_neon_acge_f64 helper_neon_acge_f64_aarch64 +#define helper_neon_acgt_f32 helper_neon_acgt_f32_aarch64 +#define helper_neon_acgt_f64 helper_neon_acgt_f64_aarch64 +#define helper_neon_addl_saturate_s32 helper_neon_addl_saturate_s32_aarch64 +#define helper_neon_addl_saturate_s64 helper_neon_addl_saturate_s64_aarch64 +#define helper_neon_addl_u16 helper_neon_addl_u16_aarch64 +#define helper_neon_addl_u32 helper_neon_addl_u32_aarch64 +#define helper_neon_add_u16 helper_neon_add_u16_aarch64 +#define helper_neon_add_u8 helper_neon_add_u8_aarch64 +#define helper_neon_ceq_f32 helper_neon_ceq_f32_aarch64 +#define helper_neon_ceq_u16 helper_neon_ceq_u16_aarch64 +#define helper_neon_ceq_u32 helper_neon_ceq_u32_aarch64 +#define helper_neon_ceq_u8 helper_neon_ceq_u8_aarch64 +#define helper_neon_cge_f32 helper_neon_cge_f32_aarch64 +#define helper_neon_cge_s16 helper_neon_cge_s16_aarch64 +#define helper_neon_cge_s32 helper_neon_cge_s32_aarch64 +#define helper_neon_cge_s8 helper_neon_cge_s8_aarch64 +#define helper_neon_cge_u16 helper_neon_cge_u16_aarch64 +#define helper_neon_cge_u32 helper_neon_cge_u32_aarch64 +#define helper_neon_cge_u8 helper_neon_cge_u8_aarch64 +#define helper_neon_cgt_f32 helper_neon_cgt_f32_aarch64 +#define helper_neon_cgt_s16 helper_neon_cgt_s16_aarch64 +#define helper_neon_cgt_s32 helper_neon_cgt_s32_aarch64 +#define helper_neon_cgt_s8 helper_neon_cgt_s8_aarch64 +#define helper_neon_cgt_u16 helper_neon_cgt_u16_aarch64 +#define helper_neon_cgt_u32 helper_neon_cgt_u32_aarch64 +#define helper_neon_cgt_u8 helper_neon_cgt_u8_aarch64 +#define helper_neon_cls_s16 helper_neon_cls_s16_aarch64 +#define helper_neon_cls_s32 helper_neon_cls_s32_aarch64 +#define helper_neon_cls_s8 helper_neon_cls_s8_aarch64 +#define helper_neon_clz_u16 helper_neon_clz_u16_aarch64 +#define helper_neon_clz_u8 helper_neon_clz_u8_aarch64 +#define helper_neon_cnt_u8 helper_neon_cnt_u8_aarch64 +#define helper_neon_fcvt_f16_to_f32 helper_neon_fcvt_f16_to_f32_aarch64 +#define helper_neon_fcvt_f32_to_f16 helper_neon_fcvt_f32_to_f16_aarch64 +#define helper_neon_hadd_s16 helper_neon_hadd_s16_aarch64 +#define helper_neon_hadd_s32 helper_neon_hadd_s32_aarch64 +#define helper_neon_hadd_s8 helper_neon_hadd_s8_aarch64 +#define helper_neon_hadd_u16 helper_neon_hadd_u16_aarch64 +#define helper_neon_hadd_u32 helper_neon_hadd_u32_aarch64 +#define helper_neon_hadd_u8 helper_neon_hadd_u8_aarch64 +#define helper_neon_hsub_s16 helper_neon_hsub_s16_aarch64 +#define helper_neon_hsub_s32 helper_neon_hsub_s32_aarch64 +#define helper_neon_hsub_s8 helper_neon_hsub_s8_aarch64 +#define helper_neon_hsub_u16 helper_neon_hsub_u16_aarch64 +#define helper_neon_hsub_u32 helper_neon_hsub_u32_aarch64 +#define helper_neon_hsub_u8 helper_neon_hsub_u8_aarch64 +#define helper_neon_max_s16 helper_neon_max_s16_aarch64 +#define helper_neon_max_s32 helper_neon_max_s32_aarch64 +#define helper_neon_max_s8 helper_neon_max_s8_aarch64 +#define helper_neon_max_u16 helper_neon_max_u16_aarch64 +#define helper_neon_max_u32 helper_neon_max_u32_aarch64 +#define helper_neon_max_u8 helper_neon_max_u8_aarch64 +#define helper_neon_min_s16 helper_neon_min_s16_aarch64 +#define helper_neon_min_s32 helper_neon_min_s32_aarch64 +#define helper_neon_min_s8 helper_neon_min_s8_aarch64 +#define helper_neon_min_u16 helper_neon_min_u16_aarch64 +#define helper_neon_min_u32 helper_neon_min_u32_aarch64 +#define helper_neon_min_u8 helper_neon_min_u8_aarch64 +#define helper_neon_mull_p8 helper_neon_mull_p8_aarch64 +#define helper_neon_mull_s16 helper_neon_mull_s16_aarch64 +#define helper_neon_mull_s8 helper_neon_mull_s8_aarch64 +#define helper_neon_mull_u16 helper_neon_mull_u16_aarch64 +#define helper_neon_mull_u8 helper_neon_mull_u8_aarch64 +#define helper_neon_mul_p8 helper_neon_mul_p8_aarch64 +#define helper_neon_mul_u16 helper_neon_mul_u16_aarch64 +#define helper_neon_mul_u8 helper_neon_mul_u8_aarch64 +#define helper_neon_narrow_high_u16 helper_neon_narrow_high_u16_aarch64 +#define helper_neon_narrow_high_u8 helper_neon_narrow_high_u8_aarch64 +#define helper_neon_narrow_round_high_u16 helper_neon_narrow_round_high_u16_aarch64 +#define helper_neon_narrow_round_high_u8 helper_neon_narrow_round_high_u8_aarch64 +#define helper_neon_narrow_sat_s16 helper_neon_narrow_sat_s16_aarch64 +#define helper_neon_narrow_sat_s32 helper_neon_narrow_sat_s32_aarch64 +#define helper_neon_narrow_sat_s8 helper_neon_narrow_sat_s8_aarch64 +#define helper_neon_narrow_sat_u16 helper_neon_narrow_sat_u16_aarch64 +#define helper_neon_narrow_sat_u32 helper_neon_narrow_sat_u32_aarch64 +#define helper_neon_narrow_sat_u8 helper_neon_narrow_sat_u8_aarch64 +#define helper_neon_narrow_u16 helper_neon_narrow_u16_aarch64 +#define helper_neon_narrow_u8 helper_neon_narrow_u8_aarch64 +#define helper_neon_negl_u16 helper_neon_negl_u16_aarch64 +#define helper_neon_negl_u32 helper_neon_negl_u32_aarch64 +#define helper_neon_paddl_u16 helper_neon_paddl_u16_aarch64 +#define helper_neon_paddl_u32 helper_neon_paddl_u32_aarch64 +#define helper_neon_padd_u16 helper_neon_padd_u16_aarch64 +#define helper_neon_padd_u8 helper_neon_padd_u8_aarch64 +#define helper_neon_pmax_s16 helper_neon_pmax_s16_aarch64 +#define helper_neon_pmax_s8 helper_neon_pmax_s8_aarch64 +#define helper_neon_pmax_u16 helper_neon_pmax_u16_aarch64 +#define helper_neon_pmax_u8 helper_neon_pmax_u8_aarch64 +#define helper_neon_pmin_s16 helper_neon_pmin_s16_aarch64 +#define helper_neon_pmin_s8 helper_neon_pmin_s8_aarch64 +#define helper_neon_pmin_u16 helper_neon_pmin_u16_aarch64 +#define helper_neon_pmin_u8 helper_neon_pmin_u8_aarch64 +#define helper_neon_pmull_64_hi helper_neon_pmull_64_hi_aarch64 +#define helper_neon_pmull_64_lo helper_neon_pmull_64_lo_aarch64 +#define helper_neon_qabs_s16 helper_neon_qabs_s16_aarch64 +#define helper_neon_qabs_s32 helper_neon_qabs_s32_aarch64 +#define helper_neon_qabs_s64 helper_neon_qabs_s64_aarch64 +#define helper_neon_qabs_s8 helper_neon_qabs_s8_aarch64 +#define helper_neon_qadd_s16 helper_neon_qadd_s16_aarch64 +#define helper_neon_qadd_s32 helper_neon_qadd_s32_aarch64 +#define helper_neon_qadd_s64 helper_neon_qadd_s64_aarch64 +#define helper_neon_qadd_s8 helper_neon_qadd_s8_aarch64 +#define helper_neon_qadd_u16 helper_neon_qadd_u16_aarch64 +#define helper_neon_qadd_u32 helper_neon_qadd_u32_aarch64 +#define helper_neon_qadd_u64 helper_neon_qadd_u64_aarch64 +#define helper_neon_qadd_u8 helper_neon_qadd_u8_aarch64 +#define helper_neon_qdmulh_s16 helper_neon_qdmulh_s16_aarch64 +#define helper_neon_qdmulh_s32 helper_neon_qdmulh_s32_aarch64 +#define helper_neon_qneg_s16 helper_neon_qneg_s16_aarch64 +#define helper_neon_qneg_s32 helper_neon_qneg_s32_aarch64 +#define helper_neon_qneg_s64 helper_neon_qneg_s64_aarch64 +#define helper_neon_qneg_s8 helper_neon_qneg_s8_aarch64 +#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_aarch64 +#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_aarch64 +#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_aarch64 +#define helper_neon_qrshl_s32 helper_neon_qrshl_s32_aarch64 +#define helper_neon_qrshl_s64 helper_neon_qrshl_s64_aarch64 +#define helper_neon_qrshl_s8 helper_neon_qrshl_s8_aarch64 +#define helper_neon_qrshl_u16 helper_neon_qrshl_u16_aarch64 +#define helper_neon_qrshl_u32 helper_neon_qrshl_u32_aarch64 +#define helper_neon_qrshl_u64 helper_neon_qrshl_u64_aarch64 +#define helper_neon_qrshl_u8 helper_neon_qrshl_u8_aarch64 +#define helper_neon_qshl_s16 helper_neon_qshl_s16_aarch64 +#define helper_neon_qshl_s32 helper_neon_qshl_s32_aarch64 +#define helper_neon_qshl_s64 helper_neon_qshl_s64_aarch64 +#define helper_neon_qshl_s8 helper_neon_qshl_s8_aarch64 +#define helper_neon_qshl_u16 helper_neon_qshl_u16_aarch64 +#define helper_neon_qshl_u32 helper_neon_qshl_u32_aarch64 +#define helper_neon_qshl_u64 helper_neon_qshl_u64_aarch64 +#define helper_neon_qshl_u8 helper_neon_qshl_u8_aarch64 +#define helper_neon_qshlu_s16 helper_neon_qshlu_s16_aarch64 +#define helper_neon_qshlu_s32 helper_neon_qshlu_s32_aarch64 +#define helper_neon_qshlu_s64 helper_neon_qshlu_s64_aarch64 +#define helper_neon_qshlu_s8 helper_neon_qshlu_s8_aarch64 +#define helper_neon_qsub_s16 helper_neon_qsub_s16_aarch64 +#define helper_neon_qsub_s32 helper_neon_qsub_s32_aarch64 +#define helper_neon_qsub_s64 helper_neon_qsub_s64_aarch64 +#define helper_neon_qsub_s8 helper_neon_qsub_s8_aarch64 +#define helper_neon_qsub_u16 helper_neon_qsub_u16_aarch64 +#define helper_neon_qsub_u32 helper_neon_qsub_u32_aarch64 +#define helper_neon_qsub_u64 helper_neon_qsub_u64_aarch64 +#define helper_neon_qsub_u8 helper_neon_qsub_u8_aarch64 +#define helper_neon_qunzip16 helper_neon_qunzip16_aarch64 +#define helper_neon_qunzip32 helper_neon_qunzip32_aarch64 +#define helper_neon_qunzip8 helper_neon_qunzip8_aarch64 +#define helper_neon_qzip16 helper_neon_qzip16_aarch64 +#define helper_neon_qzip32 helper_neon_qzip32_aarch64 +#define helper_neon_qzip8 helper_neon_qzip8_aarch64 +#define helper_neon_rbit_u8 helper_neon_rbit_u8_aarch64 +#define helper_neon_rhadd_s16 helper_neon_rhadd_s16_aarch64 +#define helper_neon_rhadd_s32 helper_neon_rhadd_s32_aarch64 +#define helper_neon_rhadd_s8 helper_neon_rhadd_s8_aarch64 +#define helper_neon_rhadd_u16 helper_neon_rhadd_u16_aarch64 +#define helper_neon_rhadd_u32 helper_neon_rhadd_u32_aarch64 +#define helper_neon_rhadd_u8 helper_neon_rhadd_u8_aarch64 +#define helper_neon_rshl_s16 helper_neon_rshl_s16_aarch64 +#define helper_neon_rshl_s32 helper_neon_rshl_s32_aarch64 +#define helper_neon_rshl_s64 helper_neon_rshl_s64_aarch64 +#define helper_neon_rshl_s8 helper_neon_rshl_s8_aarch64 +#define helper_neon_rshl_u16 helper_neon_rshl_u16_aarch64 +#define helper_neon_rshl_u32 helper_neon_rshl_u32_aarch64 +#define helper_neon_rshl_u64 helper_neon_rshl_u64_aarch64 +#define helper_neon_rshl_u8 helper_neon_rshl_u8_aarch64 +#define helper_neon_shl_s16 helper_neon_shl_s16_aarch64 +#define helper_neon_shl_s32 helper_neon_shl_s32_aarch64 +#define helper_neon_shl_s64 helper_neon_shl_s64_aarch64 +#define helper_neon_shl_s8 helper_neon_shl_s8_aarch64 +#define helper_neon_shl_u16 helper_neon_shl_u16_aarch64 +#define helper_neon_shl_u32 helper_neon_shl_u32_aarch64 +#define helper_neon_shl_u64 helper_neon_shl_u64_aarch64 +#define helper_neon_shl_u8 helper_neon_shl_u8_aarch64 +#define helper_neon_sqadd_u16 helper_neon_sqadd_u16_aarch64 +#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_aarch64 +#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_aarch64 +#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_aarch64 +#define helper_neon_subl_u16 helper_neon_subl_u16_aarch64 +#define helper_neon_subl_u32 helper_neon_subl_u32_aarch64 +#define helper_neon_sub_u16 helper_neon_sub_u16_aarch64 +#define helper_neon_sub_u8 helper_neon_sub_u8_aarch64 +#define helper_neon_tbl helper_neon_tbl_aarch64 +#define helper_neon_tst_u16 helper_neon_tst_u16_aarch64 +#define helper_neon_tst_u32 helper_neon_tst_u32_aarch64 +#define helper_neon_tst_u8 helper_neon_tst_u8_aarch64 +#define helper_neon_unarrow_sat16 helper_neon_unarrow_sat16_aarch64 +#define helper_neon_unarrow_sat32 helper_neon_unarrow_sat32_aarch64 +#define helper_neon_unarrow_sat8 helper_neon_unarrow_sat8_aarch64 +#define helper_neon_unzip16 helper_neon_unzip16_aarch64 +#define helper_neon_unzip8 helper_neon_unzip8_aarch64 +#define helper_neon_uqadd_s16 helper_neon_uqadd_s16_aarch64 +#define helper_neon_uqadd_s32 helper_neon_uqadd_s32_aarch64 +#define helper_neon_uqadd_s64 helper_neon_uqadd_s64_aarch64 +#define helper_neon_uqadd_s8 helper_neon_uqadd_s8_aarch64 +#define helper_neon_widen_s16 helper_neon_widen_s16_aarch64 +#define helper_neon_widen_s8 helper_neon_widen_s8_aarch64 +#define helper_neon_widen_u16 helper_neon_widen_u16_aarch64 +#define helper_neon_widen_u8 helper_neon_widen_u8_aarch64 +#define helper_neon_zip16 helper_neon_zip16_aarch64 +#define helper_neon_zip8 helper_neon_zip8_aarch64 +#define helper_pre_hvc helper_pre_hvc_aarch64 +#define helper_pre_smc helper_pre_smc_aarch64 +#define helper_qadd16 helper_qadd16_aarch64 +#define helper_qadd8 helper_qadd8_aarch64 +#define helper_qaddsubx helper_qaddsubx_aarch64 +#define helper_qsub16 helper_qsub16_aarch64 +#define helper_qsub8 helper_qsub8_aarch64 +#define helper_qsubaddx helper_qsubaddx_aarch64 +#define helper_rbit helper_rbit_aarch64 +#define helper_recpe_f32 helper_recpe_f32_aarch64 +#define helper_recpe_f64 helper_recpe_f64_aarch64 +#define helper_recpe_u32 helper_recpe_u32_aarch64 +#define helper_recps_f32 helper_recps_f32_aarch64 +#define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_aarch64 +#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_aarch64 +#define helper_ret_ldub_mmu helper_ret_ldub_mmu_aarch64 +#define helper_ret_stb_mmu helper_ret_stb_mmu_aarch64 +#define helper_rintd helper_rintd_aarch64 +#define helper_rintd_exact helper_rintd_exact_aarch64 +#define helper_rints helper_rints_aarch64 +#define helper_rints_exact helper_rints_exact_aarch64 +#define helper_ror_cc helper_ror_cc_aarch64 +#define helper_rsqrte_f32 helper_rsqrte_f32_aarch64 +#define helper_rsqrte_f64 helper_rsqrte_f64_aarch64 +#define helper_rsqrte_u32 helper_rsqrte_u32_aarch64 +#define helper_rsqrts_f32 helper_rsqrts_f32_aarch64 +#define helper_sadd16 helper_sadd16_aarch64 +#define helper_sadd8 helper_sadd8_aarch64 +#define helper_saddsubx helper_saddsubx_aarch64 +#define helper_sar_cc helper_sar_cc_aarch64 +#define helper_sdiv helper_sdiv_aarch64 +#define helper_sel_flags helper_sel_flags_aarch64 +#define helper_set_cp_reg helper_set_cp_reg_aarch64 +#define helper_set_cp_reg64 helper_set_cp_reg64_aarch64 +#define helper_set_neon_rmode helper_set_neon_rmode_aarch64 +#define helper_set_r13_banked helper_set_r13_banked_aarch64 +#define helper_set_rmode helper_set_rmode_aarch64 +#define helper_set_user_reg helper_set_user_reg_aarch64 +#define helper_shadd16 helper_shadd16_aarch64 +#define helper_shadd8 helper_shadd8_aarch64 +#define helper_shaddsubx helper_shaddsubx_aarch64 +#define helper_shl_cc helper_shl_cc_aarch64 +#define helper_shr_cc helper_shr_cc_aarch64 +#define helper_shsub16 helper_shsub16_aarch64 +#define helper_shsub8 helper_shsub8_aarch64 +#define helper_shsubaddx helper_shsubaddx_aarch64 +#define helper_ssat helper_ssat_aarch64 +#define helper_ssat16 helper_ssat16_aarch64 +#define helper_ssub16 helper_ssub16_aarch64 +#define helper_ssub8 helper_ssub8_aarch64 +#define helper_ssubaddx helper_ssubaddx_aarch64 +#define helper_stb_mmu helper_stb_mmu_aarch64 +#define helper_stl_mmu helper_stl_mmu_aarch64 +#define helper_stq_mmu helper_stq_mmu_aarch64 +#define helper_stw_mmu helper_stw_mmu_aarch64 +#define helper_sub_saturate helper_sub_saturate_aarch64 +#define helper_sub_usaturate helper_sub_usaturate_aarch64 +#define helper_sxtb16 helper_sxtb16_aarch64 +#define helper_uadd16 helper_uadd16_aarch64 +#define helper_uadd8 helper_uadd8_aarch64 +#define helper_uaddsubx helper_uaddsubx_aarch64 +#define helper_udiv helper_udiv_aarch64 +#define helper_uhadd16 helper_uhadd16_aarch64 +#define helper_uhadd8 helper_uhadd8_aarch64 +#define helper_uhaddsubx helper_uhaddsubx_aarch64 +#define helper_uhsub16 helper_uhsub16_aarch64 +#define helper_uhsub8 helper_uhsub8_aarch64 +#define helper_uhsubaddx helper_uhsubaddx_aarch64 +#define helper_uqadd16 helper_uqadd16_aarch64 +#define helper_uqadd8 helper_uqadd8_aarch64 +#define helper_uqaddsubx helper_uqaddsubx_aarch64 +#define helper_uqsub16 helper_uqsub16_aarch64 +#define helper_uqsub8 helper_uqsub8_aarch64 +#define helper_uqsubaddx helper_uqsubaddx_aarch64 +#define helper_usad8 helper_usad8_aarch64 +#define helper_usat helper_usat_aarch64 +#define helper_usat16 helper_usat16_aarch64 +#define helper_usub16 helper_usub16_aarch64 +#define helper_usub8 helper_usub8_aarch64 +#define helper_usubaddx helper_usubaddx_aarch64 +#define helper_uxtb16 helper_uxtb16_aarch64 +#define helper_v7m_mrs helper_v7m_mrs_aarch64 +#define helper_v7m_msr helper_v7m_msr_aarch64 +#define helper_vfp_absd helper_vfp_absd_aarch64 +#define helper_vfp_abss helper_vfp_abss_aarch64 +#define helper_vfp_addd helper_vfp_addd_aarch64 +#define helper_vfp_adds helper_vfp_adds_aarch64 +#define helper_vfp_cmpd helper_vfp_cmpd_aarch64 +#define helper_vfp_cmped helper_vfp_cmped_aarch64 +#define helper_vfp_cmpes helper_vfp_cmpes_aarch64 +#define helper_vfp_cmps helper_vfp_cmps_aarch64 +#define helper_vfp_divd helper_vfp_divd_aarch64 +#define helper_vfp_divs helper_vfp_divs_aarch64 +#define helper_vfp_fcvtds helper_vfp_fcvtds_aarch64 +#define helper_vfp_fcvt_f16_to_f32 helper_vfp_fcvt_f16_to_f32_aarch64 +#define helper_vfp_fcvt_f16_to_f64 helper_vfp_fcvt_f16_to_f64_aarch64 +#define helper_vfp_fcvt_f32_to_f16 helper_vfp_fcvt_f32_to_f16_aarch64 +#define helper_vfp_fcvt_f64_to_f16 helper_vfp_fcvt_f64_to_f16_aarch64 +#define helper_vfp_fcvtsd helper_vfp_fcvtsd_aarch64 +#define helper_vfp_get_fpscr helper_vfp_get_fpscr_aarch64 +#define helper_vfp_maxd helper_vfp_maxd_aarch64 +#define helper_vfp_maxnumd helper_vfp_maxnumd_aarch64 +#define helper_vfp_maxnums helper_vfp_maxnums_aarch64 +#define helper_vfp_maxs helper_vfp_maxs_aarch64 +#define helper_vfp_mind helper_vfp_mind_aarch64 +#define helper_vfp_minnumd helper_vfp_minnumd_aarch64 +#define helper_vfp_minnums helper_vfp_minnums_aarch64 +#define helper_vfp_mins helper_vfp_mins_aarch64 +#define helper_vfp_muladdd helper_vfp_muladdd_aarch64 +#define helper_vfp_muladds helper_vfp_muladds_aarch64 +#define helper_vfp_muld helper_vfp_muld_aarch64 +#define helper_vfp_muls helper_vfp_muls_aarch64 +#define helper_vfp_negd helper_vfp_negd_aarch64 +#define helper_vfp_negs helper_vfp_negs_aarch64 +#define helper_vfp_set_fpscr helper_vfp_set_fpscr_aarch64 +#define helper_vfp_shtod helper_vfp_shtod_aarch64 +#define helper_vfp_shtos helper_vfp_shtos_aarch64 +#define helper_vfp_sitod helper_vfp_sitod_aarch64 +#define helper_vfp_sitos helper_vfp_sitos_aarch64 +#define helper_vfp_sltod helper_vfp_sltod_aarch64 +#define helper_vfp_sltos helper_vfp_sltos_aarch64 +#define helper_vfp_sqrtd helper_vfp_sqrtd_aarch64 +#define helper_vfp_sqrts helper_vfp_sqrts_aarch64 +#define helper_vfp_sqtod helper_vfp_sqtod_aarch64 +#define helper_vfp_sqtos helper_vfp_sqtos_aarch64 +#define helper_vfp_subd helper_vfp_subd_aarch64 +#define helper_vfp_subs helper_vfp_subs_aarch64 +#define helper_vfp_toshd helper_vfp_toshd_aarch64 +#define helper_vfp_toshd_round_to_zero helper_vfp_toshd_round_to_zero_aarch64 +#define helper_vfp_toshs helper_vfp_toshs_aarch64 +#define helper_vfp_toshs_round_to_zero helper_vfp_toshs_round_to_zero_aarch64 +#define helper_vfp_tosid helper_vfp_tosid_aarch64 +#define helper_vfp_tosis helper_vfp_tosis_aarch64 +#define helper_vfp_tosizd helper_vfp_tosizd_aarch64 +#define helper_vfp_tosizs helper_vfp_tosizs_aarch64 +#define helper_vfp_tosld helper_vfp_tosld_aarch64 +#define helper_vfp_tosld_round_to_zero helper_vfp_tosld_round_to_zero_aarch64 +#define helper_vfp_tosls helper_vfp_tosls_aarch64 +#define helper_vfp_tosls_round_to_zero helper_vfp_tosls_round_to_zero_aarch64 +#define helper_vfp_tosqd helper_vfp_tosqd_aarch64 +#define helper_vfp_tosqs helper_vfp_tosqs_aarch64 +#define helper_vfp_touhd helper_vfp_touhd_aarch64 +#define helper_vfp_touhd_round_to_zero helper_vfp_touhd_round_to_zero_aarch64 +#define helper_vfp_touhs helper_vfp_touhs_aarch64 +#define helper_vfp_touhs_round_to_zero helper_vfp_touhs_round_to_zero_aarch64 +#define helper_vfp_touid helper_vfp_touid_aarch64 +#define helper_vfp_touis helper_vfp_touis_aarch64 +#define helper_vfp_touizd helper_vfp_touizd_aarch64 +#define helper_vfp_touizs helper_vfp_touizs_aarch64 +#define helper_vfp_tould helper_vfp_tould_aarch64 +#define helper_vfp_tould_round_to_zero helper_vfp_tould_round_to_zero_aarch64 +#define helper_vfp_touls helper_vfp_touls_aarch64 +#define helper_vfp_touls_round_to_zero helper_vfp_touls_round_to_zero_aarch64 +#define helper_vfp_touqd helper_vfp_touqd_aarch64 +#define helper_vfp_touqs helper_vfp_touqs_aarch64 +#define helper_vfp_uhtod helper_vfp_uhtod_aarch64 +#define helper_vfp_uhtos helper_vfp_uhtos_aarch64 +#define helper_vfp_uitod helper_vfp_uitod_aarch64 +#define helper_vfp_uitos helper_vfp_uitos_aarch64 +#define helper_vfp_ultod helper_vfp_ultod_aarch64 +#define helper_vfp_ultos helper_vfp_ultos_aarch64 +#define helper_vfp_uqtod helper_vfp_uqtod_aarch64 +#define helper_vfp_uqtos helper_vfp_uqtos_aarch64 +#define helper_wfe helper_wfe_aarch64 +#define helper_wfi helper_wfi_aarch64 +#define hex2decimal hex2decimal_aarch64 +#define hw_breakpoint_update hw_breakpoint_update_aarch64 +#define hw_breakpoint_update_all hw_breakpoint_update_all_aarch64 +#define hw_watchpoint_update hw_watchpoint_update_aarch64 +#define hw_watchpoint_update_all hw_watchpoint_update_all_aarch64 +#define _init _init_aarch64 +#define init_cpreg_list init_cpreg_list_aarch64 +#define init_lists init_lists_aarch64 +#define input_type_enum input_type_enum_aarch64 +#define int128_2_64 int128_2_64_aarch64 +#define int128_add int128_add_aarch64 +#define int128_addto int128_addto_aarch64 +#define int128_and int128_and_aarch64 +#define int128_eq int128_eq_aarch64 +#define int128_ge int128_ge_aarch64 +#define int128_get64 int128_get64_aarch64 +#define int128_gt int128_gt_aarch64 +#define int128_le int128_le_aarch64 +#define int128_lt int128_lt_aarch64 +#define int128_make64 int128_make64_aarch64 +#define int128_max int128_max_aarch64 +#define int128_min int128_min_aarch64 +#define int128_ne int128_ne_aarch64 +#define int128_neg int128_neg_aarch64 +#define int128_nz int128_nz_aarch64 +#define int128_rshift int128_rshift_aarch64 +#define int128_sub int128_sub_aarch64 +#define int128_subfrom int128_subfrom_aarch64 +#define int128_zero int128_zero_aarch64 +#define int16_to_float32 int16_to_float32_aarch64 +#define int16_to_float64 int16_to_float64_aarch64 +#define int32_to_float128 int32_to_float128_aarch64 +#define int32_to_float32 int32_to_float32_aarch64 +#define int32_to_float64 int32_to_float64_aarch64 +#define int32_to_floatx80 int32_to_floatx80_aarch64 +#define int64_to_float128 int64_to_float128_aarch64 +#define int64_to_float32 int64_to_float32_aarch64 +#define int64_to_float64 int64_to_float64_aarch64 +#define int64_to_floatx80 int64_to_floatx80_aarch64 +#define invalidate_and_set_dirty invalidate_and_set_dirty_aarch64 +#define invalidate_page_bitmap invalidate_page_bitmap_aarch64 +#define io_mem_read io_mem_read_aarch64 +#define io_mem_write io_mem_write_aarch64 +#define io_readb io_readb_aarch64 +#define io_readl io_readl_aarch64 +#define io_readq io_readq_aarch64 +#define io_readw io_readw_aarch64 +#define iotlb_to_region iotlb_to_region_aarch64 +#define io_writeb io_writeb_aarch64 +#define io_writel io_writel_aarch64 +#define io_writeq io_writeq_aarch64 +#define io_writew io_writew_aarch64 +#define is_a64 is_a64_aarch64 +#define is_help_option is_help_option_aarch64 +#define is_power_of_2 is_power_of_2_aarch64 +#define isr_read isr_read_aarch64 +#define is_valid_option_list is_valid_option_list_aarch64 +#define iwmmxt_load_creg iwmmxt_load_creg_aarch64 +#define iwmmxt_load_reg iwmmxt_load_reg_aarch64 +#define iwmmxt_store_creg iwmmxt_store_creg_aarch64 +#define iwmmxt_store_reg iwmmxt_store_reg_aarch64 +#define __jit_debug_descriptor __jit_debug_descriptor_aarch64 +#define __jit_debug_register_code __jit_debug_register_code_aarch64 +#define json_lexer json_lexer_aarch64 +#define json_lexer_destroy json_lexer_destroy_aarch64 +#define json_lexer_feed json_lexer_feed_aarch64 +#define json_lexer_feed_char json_lexer_feed_char_aarch64 +#define json_lexer_flush json_lexer_flush_aarch64 +#define json_lexer_init json_lexer_init_aarch64 +#define json_message_parser_destroy json_message_parser_destroy_aarch64 +#define json_message_parser_feed json_message_parser_feed_aarch64 +#define json_message_parser_flush json_message_parser_flush_aarch64 +#define json_message_parser_init json_message_parser_init_aarch64 +#define json_message_process_token json_message_process_token_aarch64 +#define json_parser_parse json_parser_parse_aarch64 +#define json_parser_parse_err json_parser_parse_err_aarch64 +#define kvm_to_cpreg_id kvm_to_cpreg_id_aarch64 +#define last_ram_offset last_ram_offset_aarch64 +#define ldl_be_p ldl_be_p_aarch64 +#define ldl_be_phys ldl_be_phys_aarch64 +#define ldl_he_p ldl_he_p_aarch64 +#define ldl_le_p ldl_le_p_aarch64 +#define ldl_le_phys ldl_le_phys_aarch64 +#define ldl_phys ldl_phys_aarch64 +#define ldl_phys_internal ldl_phys_internal_aarch64 +#define ldq_be_p ldq_be_p_aarch64 +#define ldq_be_phys ldq_be_phys_aarch64 +#define ldq_he_p ldq_he_p_aarch64 +#define ldq_le_p ldq_le_p_aarch64 +#define ldq_le_phys ldq_le_phys_aarch64 +#define ldq_phys ldq_phys_aarch64 +#define ldq_phys_internal ldq_phys_internal_aarch64 +#define ldst_name ldst_name_aarch64 +#define ldub_p ldub_p_aarch64 +#define ldub_phys ldub_phys_aarch64 +#define lduw_be_p lduw_be_p_aarch64 +#define lduw_be_phys lduw_be_phys_aarch64 +#define lduw_he_p lduw_he_p_aarch64 +#define lduw_le_p lduw_le_p_aarch64 +#define lduw_le_phys lduw_le_phys_aarch64 +#define lduw_phys lduw_phys_aarch64 +#define lduw_phys_internal lduw_phys_internal_aarch64 +#define le128 le128_aarch64 +#define linked_bp_matches linked_bp_matches_aarch64 +#define listener_add_address_space listener_add_address_space_aarch64 +#define load_cpu_offset load_cpu_offset_aarch64 +#define load_reg load_reg_aarch64 +#define load_reg_var load_reg_var_aarch64 +#define log_cpu_state log_cpu_state_aarch64 +#define lpae_cp_reginfo lpae_cp_reginfo_aarch64 +#define lt128 lt128_aarch64 +#define machine_class_init machine_class_init_aarch64 +#define machine_finalize machine_finalize_aarch64 +#define machine_info machine_info_aarch64 +#define machine_initfn machine_initfn_aarch64 +#define machine_register_types machine_register_types_aarch64 +#define machvirt_init machvirt_init_aarch64 +#define machvirt_machine_init machvirt_machine_init_aarch64 +#define maj maj_aarch64 +#define mapping_conflict mapping_conflict_aarch64 +#define mapping_contiguous mapping_contiguous_aarch64 +#define mapping_have_same_region mapping_have_same_region_aarch64 +#define mapping_merge mapping_merge_aarch64 +#define mem_add mem_add_aarch64 +#define mem_begin mem_begin_aarch64 +#define mem_commit mem_commit_aarch64 +#define memory_access_is_direct memory_access_is_direct_aarch64 +#define memory_access_size memory_access_size_aarch64 +#define memory_init memory_init_aarch64 +#define memory_listener_match memory_listener_match_aarch64 +#define memory_listener_register memory_listener_register_aarch64 +#define memory_listener_unregister memory_listener_unregister_aarch64 +#define memory_map_init memory_map_init_aarch64 +#define memory_mapping_filter memory_mapping_filter_aarch64 +#define memory_mapping_list_add_mapping_sorted memory_mapping_list_add_mapping_sorted_aarch64 +#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_aarch64 +#define memory_mapping_list_free memory_mapping_list_free_aarch64 +#define memory_mapping_list_init memory_mapping_list_init_aarch64 +#define memory_region_access_valid memory_region_access_valid_aarch64 +#define memory_region_add_eventfd memory_region_add_eventfd_aarch64 +#define memory_region_add_subregion memory_region_add_subregion_aarch64 +#define memory_region_add_subregion_common memory_region_add_subregion_common_aarch64 +#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_aarch64 +#define memory_region_big_endian memory_region_big_endian_aarch64 +#define memory_region_clear_coalescing memory_region_clear_coalescing_aarch64 +#define memory_region_clear_pending memory_region_clear_pending_aarch64 +#define memory_region_del_eventfd memory_region_del_eventfd_aarch64 +#define memory_region_del_subregion memory_region_del_subregion_aarch64 +#define memory_region_destructor_alias memory_region_destructor_alias_aarch64 +#define memory_region_destructor_none memory_region_destructor_none_aarch64 +#define memory_region_destructor_ram memory_region_destructor_ram_aarch64 +#define memory_region_destructor_ram_from_ptr memory_region_destructor_ram_from_ptr_aarch64 +#define memory_region_dispatch_read memory_region_dispatch_read_aarch64 +#define memory_region_dispatch_read1 memory_region_dispatch_read1_aarch64 +#define memory_region_dispatch_write memory_region_dispatch_write_aarch64 +#define memory_region_escape_name memory_region_escape_name_aarch64 +#define memory_region_finalize memory_region_finalize_aarch64 +#define memory_region_find memory_region_find_aarch64 +#define memory_region_get_addr memory_region_get_addr_aarch64 +#define memory_region_get_alignment memory_region_get_alignment_aarch64 +#define memory_region_get_container memory_region_get_container_aarch64 +#define memory_region_get_fd memory_region_get_fd_aarch64 +#define memory_region_get_may_overlap memory_region_get_may_overlap_aarch64 +#define memory_region_get_priority memory_region_get_priority_aarch64 +#define memory_region_get_ram_addr memory_region_get_ram_addr_aarch64 +#define memory_region_get_ram_ptr memory_region_get_ram_ptr_aarch64 +#define memory_region_get_size memory_region_get_size_aarch64 +#define memory_region_info memory_region_info_aarch64 +#define memory_region_init memory_region_init_aarch64 +#define memory_region_init_alias memory_region_init_alias_aarch64 +#define memory_region_initfn memory_region_initfn_aarch64 +#define memory_region_init_io memory_region_init_io_aarch64 +#define memory_region_init_ram memory_region_init_ram_aarch64 +#define memory_region_init_ram_ptr memory_region_init_ram_ptr_aarch64 +#define memory_region_init_reservation memory_region_init_reservation_aarch64 +#define memory_region_ioeventfd_before memory_region_ioeventfd_before_aarch64 +#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_aarch64 +#define memory_region_is_iommu memory_region_is_iommu_aarch64 +#define memory_region_is_logging memory_region_is_logging_aarch64 +#define memory_region_is_mapped memory_region_is_mapped_aarch64 +#define memory_region_is_ram memory_region_is_ram_aarch64 +#define memory_region_is_rom memory_region_is_rom_aarch64 +#define memory_region_is_romd memory_region_is_romd_aarch64 +#define memory_region_is_skip_dump memory_region_is_skip_dump_aarch64 +#define memory_region_is_unassigned memory_region_is_unassigned_aarch64 +#define memory_region_name memory_region_name_aarch64 +#define memory_region_need_escape memory_region_need_escape_aarch64 +#define memory_region_notify_iommu memory_region_notify_iommu_aarch64 +#define memory_region_oldmmio_read_accessor memory_region_oldmmio_read_accessor_aarch64 +#define memory_region_oldmmio_write_accessor memory_region_oldmmio_write_accessor_aarch64 +#define memory_region_present memory_region_present_aarch64 +#define memory_region_read_accessor memory_region_read_accessor_aarch64 +#define memory_region_readd_subregion memory_region_readd_subregion_aarch64 +#define memory_region_ref memory_region_ref_aarch64 +#define memory_region_register_iommu_notifier memory_region_register_iommu_notifier_aarch64 +#define memory_region_resolve_container memory_region_resolve_container_aarch64 +#define memory_region_rom_device_set_romd memory_region_rom_device_set_romd_aarch64 +#define memory_region_section_get_iotlb memory_region_section_get_iotlb_aarch64 +#define memory_region_set_address memory_region_set_address_aarch64 +#define memory_region_set_alias_offset memory_region_set_alias_offset_aarch64 +#define memory_region_set_enabled memory_region_set_enabled_aarch64 +#define memory_region_set_readonly memory_region_set_readonly_aarch64 +#define memory_region_set_skip_dump memory_region_set_skip_dump_aarch64 +#define memory_region_size memory_region_size_aarch64 +#define memory_region_to_address_space memory_region_to_address_space_aarch64 +#define memory_region_transaction_begin memory_region_transaction_begin_aarch64 +#define memory_region_transaction_commit memory_region_transaction_commit_aarch64 +#define memory_region_unref memory_region_unref_aarch64 +#define memory_region_unregister_iommu_notifier memory_region_unregister_iommu_notifier_aarch64 +#define memory_region_update_coalesced_range memory_region_update_coalesced_range_aarch64 +#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_aarch64 +#define memory_region_update_container_subregions memory_region_update_container_subregions_aarch64 +#define memory_region_write_accessor memory_region_write_accessor_aarch64 +#define memory_region_wrong_endianness memory_region_wrong_endianness_aarch64 +#define memory_try_enable_merging memory_try_enable_merging_aarch64 +#define mktimegm mktimegm_aarch64 +#define module_call_init module_call_init_aarch64 +#define module_load module_load_aarch64 +#define mod_utf8_codepoint mod_utf8_codepoint_aarch64 +#define mpidr_cp_reginfo mpidr_cp_reginfo_aarch64 +#define mpidr_read mpidr_read_aarch64 +#define msr_mask msr_mask_aarch64 +#define mul128By64To192 mul128By64To192_aarch64 +#define mul128To256 mul128To256_aarch64 +#define mul64To128 mul64To128_aarch64 +#define muldiv64 muldiv64_aarch64 +#define neon_2rm_is_float_op neon_2rm_is_float_op_aarch64 +#define neon_2rm_sizes neon_2rm_sizes_aarch64 +#define neon_3r_sizes neon_3r_sizes_aarch64 +#define neon_get_scalar neon_get_scalar_aarch64 +#define neon_load_reg neon_load_reg_aarch64 +#define neon_load_reg64 neon_load_reg64_aarch64 +#define neon_load_scratch neon_load_scratch_aarch64 +#define neon_ls_element_type neon_ls_element_type_aarch64 +#define neon_reg_offset neon_reg_offset_aarch64 +#define neon_store_reg neon_store_reg_aarch64 +#define neon_store_reg64 neon_store_reg64_aarch64 +#define neon_store_scratch neon_store_scratch_aarch64 +#define new_ldst_label new_ldst_label_aarch64 +#define next_list next_list_aarch64 +#define normalizeFloat128Subnormal normalizeFloat128Subnormal_aarch64 +#define normalizeFloat16Subnormal normalizeFloat16Subnormal_aarch64 +#define normalizeFloat32Subnormal normalizeFloat32Subnormal_aarch64 +#define normalizeFloat64Subnormal normalizeFloat64Subnormal_aarch64 +#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_aarch64 +#define normalizeRoundAndPackFloat128 normalizeRoundAndPackFloat128_aarch64 +#define normalizeRoundAndPackFloat32 normalizeRoundAndPackFloat32_aarch64 +#define normalizeRoundAndPackFloat64 normalizeRoundAndPackFloat64_aarch64 +#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_aarch64 +#define not_v6_cp_reginfo not_v6_cp_reginfo_aarch64 +#define not_v7_cp_reginfo not_v7_cp_reginfo_aarch64 +#define not_v8_cp_reginfo not_v8_cp_reginfo_aarch64 +#define object_child_foreach object_child_foreach_aarch64 +#define object_class_foreach object_class_foreach_aarch64 +#define object_class_foreach_tramp object_class_foreach_tramp_aarch64 +#define object_class_get_list object_class_get_list_aarch64 +#define object_class_get_list_tramp object_class_get_list_tramp_aarch64 +#define object_class_get_parent object_class_get_parent_aarch64 +#define object_deinit object_deinit_aarch64 +#define object_dynamic_cast object_dynamic_cast_aarch64 +#define object_finalize object_finalize_aarch64 +#define object_finalize_child_property object_finalize_child_property_aarch64 +#define object_get_child_property object_get_child_property_aarch64 +#define object_get_link_property object_get_link_property_aarch64 +#define object_get_root object_get_root_aarch64 +#define object_initialize_with_type object_initialize_with_type_aarch64 +#define object_init_with_type object_init_with_type_aarch64 +#define object_instance_init object_instance_init_aarch64 +#define object_new_with_type object_new_with_type_aarch64 +#define object_post_init_with_type object_post_init_with_type_aarch64 +#define object_property_add_alias object_property_add_alias_aarch64 +#define object_property_add_link object_property_add_link_aarch64 +#define object_property_add_uint16_ptr object_property_add_uint16_ptr_aarch64 +#define object_property_add_uint32_ptr object_property_add_uint32_ptr_aarch64 +#define object_property_add_uint64_ptr object_property_add_uint64_ptr_aarch64 +#define object_property_add_uint8_ptr object_property_add_uint8_ptr_aarch64 +#define object_property_allow_set_link object_property_allow_set_link_aarch64 +#define object_property_del object_property_del_aarch64 +#define object_property_del_all object_property_del_all_aarch64 +#define object_property_del_child object_property_del_child_aarch64 +#define object_property_find object_property_find_aarch64 +#define object_property_get object_property_get_aarch64 +#define object_property_get_bool object_property_get_bool_aarch64 +#define object_property_get_enum object_property_get_enum_aarch64 +#define object_property_get_int object_property_get_int_aarch64 +#define object_property_get_link object_property_get_link_aarch64 +#define object_property_get_qobject object_property_get_qobject_aarch64 +#define object_property_get_str object_property_get_str_aarch64 +#define object_property_get_type object_property_get_type_aarch64 +#define object_property_get_uint16List object_property_get_uint16List_aarch64 +#define object_property_is_child object_property_is_child_aarch64 +#define object_property_print object_property_print_aarch64 +#define object_property_set object_property_set_aarch64 +#define object_property_set_description object_property_set_description_aarch64 +#define object_property_set_link object_property_set_link_aarch64 +#define object_property_set_qobject object_property_set_qobject_aarch64 +#define object_release_link_property object_release_link_property_aarch64 +#define object_resolve_abs_path object_resolve_abs_path_aarch64 +#define object_resolve_child_property object_resolve_child_property_aarch64 +#define object_resolve_link object_resolve_link_aarch64 +#define object_resolve_link_property object_resolve_link_property_aarch64 +#define object_resolve_partial_path object_resolve_partial_path_aarch64 +#define object_resolve_path object_resolve_path_aarch64 +#define object_resolve_path_component object_resolve_path_component_aarch64 +#define object_resolve_path_type object_resolve_path_type_aarch64 +#define object_set_link_property object_set_link_property_aarch64 +#define object_unparent object_unparent_aarch64 +#define omap_cachemaint_write omap_cachemaint_write_aarch64 +#define omap_cp_reginfo omap_cp_reginfo_aarch64 +#define omap_threadid_write omap_threadid_write_aarch64 +#define omap_ticonfig_write omap_ticonfig_write_aarch64 +#define omap_wfi_write omap_wfi_write_aarch64 +#define op_bits op_bits_aarch64 +#define open_modeflags open_modeflags_aarch64 +#define op_to_mov op_to_mov_aarch64 +#define op_to_movi op_to_movi_aarch64 +#define opts_accepts_any opts_accepts_any_aarch64 +#define opts_do_parse opts_do_parse_aarch64 +#define opt_set opt_set_aarch64 +#define opts_parse opts_parse_aarch64 +#define output_type_enum output_type_enum_aarch64 +#define packFloat128 packFloat128_aarch64 +#define packFloat16 packFloat16_aarch64 +#define packFloat32 packFloat32_aarch64 +#define packFloat64 packFloat64_aarch64 +#define packFloatx80 packFloatx80_aarch64 +#define page_find page_find_aarch64 +#define page_find_alloc page_find_alloc_aarch64 +#define page_flush_tb page_flush_tb_aarch64 +#define page_flush_tb_1 page_flush_tb_1_aarch64 +#define page_init page_init_aarch64 +#define page_size_init page_size_init_aarch64 +#define par par_aarch64 +#define parse_array parse_array_aarch64 +#define parse_error parse_error_aarch64 +#define parse_escape parse_escape_aarch64 +#define parse_json parse_json_aarch64 +#define parse_keyword parse_keyword_aarch64 +#define parse_literal parse_literal_aarch64 +#define parse_object parse_object_aarch64 +#define parse_optional parse_optional_aarch64 +#define parse_option_bool parse_option_bool_aarch64 +#define parse_option_number parse_option_number_aarch64 +#define parse_option_size parse_option_size_aarch64 +#define parse_pair parse_pair_aarch64 +#define parser_context_free parser_context_free_aarch64 +#define parser_context_new parser_context_new_aarch64 +#define parser_context_peek_token parser_context_peek_token_aarch64 +#define parser_context_pop_token parser_context_pop_token_aarch64 +#define parser_context_restore parser_context_restore_aarch64 +#define parser_context_save parser_context_save_aarch64 +#define parse_str parse_str_aarch64 +#define parse_type_bool parse_type_bool_aarch64 +#define parse_type_int parse_type_int_aarch64 +#define parse_type_number parse_type_number_aarch64 +#define parse_type_size parse_type_size_aarch64 +#define parse_type_str parse_type_str_aarch64 +#define parse_uint parse_uint_aarch64 +#define parse_uint_full parse_uint_full_aarch64 +#define parse_value parse_value_aarch64 +#define par_write par_write_aarch64 +#define patch_reloc patch_reloc_aarch64 +#define pause_all_vcpus pause_all_vcpus_aarch64 +#define phys_map_node_alloc phys_map_node_alloc_aarch64 +#define phys_map_node_reserve phys_map_node_reserve_aarch64 +#define phys_mem_alloc phys_mem_alloc_aarch64 +#define phys_mem_set_alloc phys_mem_set_alloc_aarch64 +#define phys_page_compact phys_page_compact_aarch64 +#define phys_page_compact_all phys_page_compact_all_aarch64 +#define phys_page_find phys_page_find_aarch64 +#define phys_page_set phys_page_set_aarch64 +#define phys_page_set_level phys_page_set_level_aarch64 +#define phys_section_add phys_section_add_aarch64 +#define phys_section_destroy phys_section_destroy_aarch64 +#define phys_sections_free phys_sections_free_aarch64 +#define pickNaN pickNaN_aarch64 +#define pickNaNMulAdd pickNaNMulAdd_aarch64 +#define pmccfiltr_write pmccfiltr_write_aarch64 +#define pmccntr_read pmccntr_read_aarch64 +#define pmccntr_sync pmccntr_sync_aarch64 +#define pmccntr_write pmccntr_write_aarch64 +#define pmccntr_write32 pmccntr_write32_aarch64 +#define pmcntenclr_write pmcntenclr_write_aarch64 +#define pmcntenset_write pmcntenset_write_aarch64 +#define pmcr_write pmcr_write_aarch64 +#define pmintenclr_write pmintenclr_write_aarch64 +#define pmintenset_write pmintenset_write_aarch64 +#define pmovsr_write pmovsr_write_aarch64 +#define pmreg_access pmreg_access_aarch64 +#define pmsav5_cp_reginfo pmsav5_cp_reginfo_aarch64 +#define pmsav5_data_ap_read pmsav5_data_ap_read_aarch64 +#define pmsav5_data_ap_write pmsav5_data_ap_write_aarch64 +#define pmsav5_insn_ap_read pmsav5_insn_ap_read_aarch64 +#define pmsav5_insn_ap_write pmsav5_insn_ap_write_aarch64 +#define pmuserenr_write pmuserenr_write_aarch64 +#define pmxevtyper_write pmxevtyper_write_aarch64 +#define pow2floor pow2floor_aarch64 +#define print_type_bool print_type_bool_aarch64 +#define print_type_int print_type_int_aarch64 +#define print_type_number print_type_number_aarch64 +#define print_type_size print_type_size_aarch64 +#define print_type_str print_type_str_aarch64 +#define propagateFloat128NaN propagateFloat128NaN_aarch64 +#define propagateFloat32MulAddNaN propagateFloat32MulAddNaN_aarch64 +#define propagateFloat32NaN propagateFloat32NaN_aarch64 +#define propagateFloat64MulAddNaN propagateFloat64MulAddNaN_aarch64 +#define propagateFloat64NaN propagateFloat64NaN_aarch64 +#define propagateFloatx80NaN propagateFloatx80NaN_aarch64 +#define property_get_alias property_get_alias_aarch64 +#define property_get_bool property_get_bool_aarch64 +#define property_get_str property_get_str_aarch64 +#define property_get_uint16_ptr property_get_uint16_ptr_aarch64 +#define property_get_uint32_ptr property_get_uint32_ptr_aarch64 +#define property_get_uint64_ptr property_get_uint64_ptr_aarch64 +#define property_get_uint8_ptr property_get_uint8_ptr_aarch64 +#define property_release_alias property_release_alias_aarch64 +#define property_release_bool property_release_bool_aarch64 +#define property_release_str property_release_str_aarch64 +#define property_resolve_alias property_resolve_alias_aarch64 +#define property_set_alias property_set_alias_aarch64 +#define property_set_bool property_set_bool_aarch64 +#define property_set_str property_set_str_aarch64 +#define pstate_read pstate_read_aarch64 +#define pstate_write pstate_write_aarch64 +#define pxa250_initfn pxa250_initfn_aarch64 +#define pxa255_initfn pxa255_initfn_aarch64 +#define pxa260_initfn pxa260_initfn_aarch64 +#define pxa261_initfn pxa261_initfn_aarch64 +#define pxa262_initfn pxa262_initfn_aarch64 +#define pxa270a0_initfn pxa270a0_initfn_aarch64 +#define pxa270a1_initfn pxa270a1_initfn_aarch64 +#define pxa270b0_initfn pxa270b0_initfn_aarch64 +#define pxa270b1_initfn pxa270b1_initfn_aarch64 +#define pxa270c0_initfn pxa270c0_initfn_aarch64 +#define pxa270c5_initfn pxa270c5_initfn_aarch64 +#define qapi_dealloc_end_implicit_struct qapi_dealloc_end_implicit_struct_aarch64 +#define qapi_dealloc_end_list qapi_dealloc_end_list_aarch64 +#define qapi_dealloc_end_struct qapi_dealloc_end_struct_aarch64 +#define qapi_dealloc_get_visitor qapi_dealloc_get_visitor_aarch64 +#define qapi_dealloc_next_list qapi_dealloc_next_list_aarch64 +#define qapi_dealloc_pop qapi_dealloc_pop_aarch64 +#define qapi_dealloc_push qapi_dealloc_push_aarch64 +#define qapi_dealloc_start_implicit_struct qapi_dealloc_start_implicit_struct_aarch64 +#define qapi_dealloc_start_list qapi_dealloc_start_list_aarch64 +#define qapi_dealloc_start_struct qapi_dealloc_start_struct_aarch64 +#define qapi_dealloc_start_union qapi_dealloc_start_union_aarch64 +#define qapi_dealloc_type_bool qapi_dealloc_type_bool_aarch64 +#define qapi_dealloc_type_enum qapi_dealloc_type_enum_aarch64 +#define qapi_dealloc_type_int qapi_dealloc_type_int_aarch64 +#define qapi_dealloc_type_number qapi_dealloc_type_number_aarch64 +#define qapi_dealloc_type_size qapi_dealloc_type_size_aarch64 +#define qapi_dealloc_type_str qapi_dealloc_type_str_aarch64 +#define qapi_dealloc_visitor_cleanup qapi_dealloc_visitor_cleanup_aarch64 +#define qapi_dealloc_visitor_new qapi_dealloc_visitor_new_aarch64 +#define qapi_free_boolList qapi_free_boolList_aarch64 +#define qapi_free_ErrorClassList qapi_free_ErrorClassList_aarch64 +#define qapi_free_int16List qapi_free_int16List_aarch64 +#define qapi_free_int32List qapi_free_int32List_aarch64 +#define qapi_free_int64List qapi_free_int64List_aarch64 +#define qapi_free_int8List qapi_free_int8List_aarch64 +#define qapi_free_intList qapi_free_intList_aarch64 +#define qapi_free_numberList qapi_free_numberList_aarch64 +#define qapi_free_strList qapi_free_strList_aarch64 +#define qapi_free_uint16List qapi_free_uint16List_aarch64 +#define qapi_free_uint32List qapi_free_uint32List_aarch64 +#define qapi_free_uint64List qapi_free_uint64List_aarch64 +#define qapi_free_uint8List qapi_free_uint8List_aarch64 +#define qapi_free_X86CPUFeatureWordInfo qapi_free_X86CPUFeatureWordInfo_aarch64 +#define qapi_free_X86CPUFeatureWordInfoList qapi_free_X86CPUFeatureWordInfoList_aarch64 +#define qapi_free_X86CPURegister32List qapi_free_X86CPURegister32List_aarch64 +#define qbool_destroy_obj qbool_destroy_obj_aarch64 +#define qbool_from_int qbool_from_int_aarch64 +#define qbool_get_int qbool_get_int_aarch64 +#define qbool_type qbool_type_aarch64 +#define qbus_create qbus_create_aarch64 +#define qbus_create_inplace qbus_create_inplace_aarch64 +#define qbus_finalize qbus_finalize_aarch64 +#define qbus_initfn qbus_initfn_aarch64 +#define qbus_realize qbus_realize_aarch64 +#define qdev_create qdev_create_aarch64 +#define qdev_get_type qdev_get_type_aarch64 +#define qdev_register_types qdev_register_types_aarch64 +#define qdev_set_parent_bus qdev_set_parent_bus_aarch64 +#define qdev_try_create qdev_try_create_aarch64 +#define qdict_add_key qdict_add_key_aarch64 +#define qdict_array_split qdict_array_split_aarch64 +#define qdict_clone_shallow qdict_clone_shallow_aarch64 +#define qdict_del qdict_del_aarch64 +#define qdict_destroy_obj qdict_destroy_obj_aarch64 +#define qdict_entry_key qdict_entry_key_aarch64 +#define qdict_entry_value qdict_entry_value_aarch64 +#define qdict_extract_subqdict qdict_extract_subqdict_aarch64 +#define qdict_find qdict_find_aarch64 +#define qdict_first qdict_first_aarch64 +#define qdict_flatten qdict_flatten_aarch64 +#define qdict_flatten_qdict qdict_flatten_qdict_aarch64 +#define qdict_flatten_qlist qdict_flatten_qlist_aarch64 +#define qdict_get qdict_get_aarch64 +#define qdict_get_bool qdict_get_bool_aarch64 +#define qdict_get_double qdict_get_double_aarch64 +#define qdict_get_int qdict_get_int_aarch64 +#define qdict_get_obj qdict_get_obj_aarch64 +#define qdict_get_qdict qdict_get_qdict_aarch64 +#define qdict_get_qlist qdict_get_qlist_aarch64 +#define qdict_get_str qdict_get_str_aarch64 +#define qdict_get_try_bool qdict_get_try_bool_aarch64 +#define qdict_get_try_int qdict_get_try_int_aarch64 +#define qdict_get_try_str qdict_get_try_str_aarch64 +#define qdict_haskey qdict_haskey_aarch64 +#define qdict_has_prefixed_entries qdict_has_prefixed_entries_aarch64 +#define qdict_iter qdict_iter_aarch64 +#define qdict_join qdict_join_aarch64 +#define qdict_new qdict_new_aarch64 +#define qdict_next qdict_next_aarch64 +#define qdict_next_entry qdict_next_entry_aarch64 +#define qdict_put_obj qdict_put_obj_aarch64 +#define qdict_size qdict_size_aarch64 +#define qdict_type qdict_type_aarch64 +#define qemu_clock_get_us qemu_clock_get_us_aarch64 +#define qemu_clock_ptr qemu_clock_ptr_aarch64 +#define qemu_clocks qemu_clocks_aarch64 +#define qemu_cond_destroy qemu_cond_destroy_aarch64 +#define qemu_cpu_is_self qemu_cpu_is_self_aarch64 +#define qemu_cpu_kick_thread qemu_cpu_kick_thread_aarch64 +#define qemu_daemon qemu_daemon_aarch64 +#define qemu_event_destroy qemu_event_destroy_aarch64 +#define qemu_event_init qemu_event_init_aarch64 +#define qemu_event_reset qemu_event_reset_aarch64 +#define qemu_event_set qemu_event_set_aarch64 +#define qemu_event_wait qemu_event_wait_aarch64 +#define qemu_fdatasync qemu_fdatasync_aarch64 +#define qemu_flush_coalesced_mmio_buffer qemu_flush_coalesced_mmio_buffer_aarch64 +#define qemu_get_cpu qemu_get_cpu_aarch64 +#define qemu_get_guest_memory_mapping qemu_get_guest_memory_mapping_aarch64 +#define qemu_get_guest_simple_memory_mapping qemu_get_guest_simple_memory_mapping_aarch64 +#define qemu_get_local_state_pathname qemu_get_local_state_pathname_aarch64 +#define qemu_get_ram_block qemu_get_ram_block_aarch64 +#define qemu_get_ram_block_host_ptr qemu_get_ram_block_host_ptr_aarch64 +#define qemu_get_ram_fd qemu_get_ram_fd_aarch64 +#define qemu_get_ram_ptr qemu_get_ram_ptr_aarch64 +#define qemu_host_page_mask qemu_host_page_mask_aarch64 +#define qemu_host_page_size qemu_host_page_size_aarch64 +#define qemu_init_vcpu qemu_init_vcpu_aarch64 +#define qemu_ld_helpers qemu_ld_helpers_aarch64 +#define qemu_log_close qemu_log_close_aarch64 +#define qemu_log_enabled qemu_log_enabled_aarch64 +#define qemu_log_flush qemu_log_flush_aarch64 +#define qemu_loglevel_mask qemu_loglevel_mask_aarch64 +#define qemu_log_vprintf qemu_log_vprintf_aarch64 +#define qemu_mutex_destroy qemu_mutex_destroy_aarch64 +#define qemu_mutex_lock_ramlist qemu_mutex_lock_ramlist_aarch64 +#define qemu_mutex_trylock qemu_mutex_trylock_aarch64 +#define qemu_mutex_unlock_ramlist qemu_mutex_unlock_ramlist_aarch64 +#define qemu_oom_check qemu_oom_check_aarch64 +#define qemu_opt_del qemu_opt_del_aarch64 +#define qemu_opt_del_all qemu_opt_del_all_aarch64 +#define qemu_opt_find qemu_opt_find_aarch64 +#define qemu_opt_foreach qemu_opt_foreach_aarch64 +#define qemu_opt_get qemu_opt_get_aarch64 +#define qemu_opt_get_bool qemu_opt_get_bool_aarch64 +#define qemu_opt_get_bool_del qemu_opt_get_bool_del_aarch64 +#define qemu_opt_get_bool_helper qemu_opt_get_bool_helper_aarch64 +#define qemu_opt_get_del qemu_opt_get_del_aarch64 +#define qemu_opt_get_number qemu_opt_get_number_aarch64 +#define qemu_opt_get_number_del qemu_opt_get_number_del_aarch64 +#define qemu_opt_get_number_helper qemu_opt_get_number_helper_aarch64 +#define qemu_opt_get_size qemu_opt_get_size_aarch64 +#define qemu_opt_get_size_del qemu_opt_get_size_del_aarch64 +#define qemu_opt_get_size_helper qemu_opt_get_size_helper_aarch64 +#define qemu_opt_has_help_opt qemu_opt_has_help_opt_aarch64 +#define qemu_opt_parse qemu_opt_parse_aarch64 +#define qemu_opts_absorb_qdict qemu_opts_absorb_qdict_aarch64 +#define qemu_opts_append qemu_opts_append_aarch64 +#define qemu_opts_create qemu_opts_create_aarch64 +#define qemu_opts_del qemu_opts_del_aarch64 +#define qemu_opts_do_parse qemu_opts_do_parse_aarch64 +#define qemu_opt_set qemu_opt_set_aarch64 +#define qemu_opt_set_bool qemu_opt_set_bool_aarch64 +#define qemu_opt_set_err qemu_opt_set_err_aarch64 +#define qemu_opt_set_number qemu_opt_set_number_aarch64 +#define qemu_opts_find qemu_opts_find_aarch64 +#define qemu_opts_foreach qemu_opts_foreach_aarch64 +#define qemu_opts_free qemu_opts_free_aarch64 +#define qemu_opts_from_qdict qemu_opts_from_qdict_aarch64 +#define qemu_opts_from_qdict_1 qemu_opts_from_qdict_1_aarch64 +#define qemu_opts_id qemu_opts_id_aarch64 +#define qemu_opts_parse qemu_opts_parse_aarch64 +#define qemu_opts_print qemu_opts_print_aarch64 +#define qemu_opts_print_help qemu_opts_print_help_aarch64 +#define qemu_opts_reset qemu_opts_reset_aarch64 +#define qemu_opts_set qemu_opts_set_aarch64 +#define qemu_opts_set_defaults qemu_opts_set_defaults_aarch64 +#define qemu_opts_set_id qemu_opts_set_id_aarch64 +#define qemu_opts_to_qdict qemu_opts_to_qdict_aarch64 +#define qemu_opts_validate qemu_opts_validate_aarch64 +#define qemu_opt_unset qemu_opt_unset_aarch64 +#define qemu_parse_fd qemu_parse_fd_aarch64 +#define qemu_pipe qemu_pipe_aarch64 +#define qemu_ram_addr_from_host qemu_ram_addr_from_host_aarch64 +#define qemu_ram_addr_from_host_nofail qemu_ram_addr_from_host_nofail_aarch64 +#define qemu_ram_alloc qemu_ram_alloc_aarch64 +#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_aarch64 +#define qemu_ram_foreach_block qemu_ram_foreach_block_aarch64 +#define qemu_ram_free qemu_ram_free_aarch64 +#define qemu_ram_free_from_ptr qemu_ram_free_from_ptr_aarch64 +#define qemu_ram_ptr_length qemu_ram_ptr_length_aarch64 +#define qemu_ram_remap qemu_ram_remap_aarch64 +#define qemu_ram_setup_dump qemu_ram_setup_dump_aarch64 +#define qemu_ram_unset_idstr qemu_ram_unset_idstr_aarch64 +#define qemu_real_host_page_size qemu_real_host_page_size_aarch64 +#define qemu_sem_destroy qemu_sem_destroy_aarch64 +#define qemu_sem_init qemu_sem_init_aarch64 +#define qemu_sem_post qemu_sem_post_aarch64 +#define qemu_sem_timedwait qemu_sem_timedwait_aarch64 +#define qemu_sem_wait qemu_sem_wait_aarch64 +#define qemu_set_cloexec qemu_set_cloexec_aarch64 +#define qemu_set_tty_echo qemu_set_tty_echo_aarch64 +#define qemu_st_helpers qemu_st_helpers_aarch64 +#define qemu_strnlen qemu_strnlen_aarch64 +#define qemu_strsep qemu_strsep_aarch64 +#define qemu_tcg_cpu_thread_fn qemu_tcg_cpu_thread_fn_aarch64 +#define qemu_tcg_init_vcpu qemu_tcg_init_vcpu_aarch64 +#define qemu_thread_exit qemu_thread_exit_aarch64 +#define qemu_try_memalign qemu_try_memalign_aarch64 +#define qentry_destroy qentry_destroy_aarch64 +#define qerror_human qerror_human_aarch64 +#define qerror_report qerror_report_aarch64 +#define qerror_report_err qerror_report_err_aarch64 +#define qfloat_destroy_obj qfloat_destroy_obj_aarch64 +#define qfloat_from_double qfloat_from_double_aarch64 +#define qfloat_get_double qfloat_get_double_aarch64 +#define qfloat_type qfloat_type_aarch64 +#define qint_destroy_obj qint_destroy_obj_aarch64 +#define qint_from_int qint_from_int_aarch64 +#define qint_get_int qint_get_int_aarch64 +#define qint_type qint_type_aarch64 +#define qlist_append_obj qlist_append_obj_aarch64 +#define qlist_copy qlist_copy_aarch64 +#define qlist_copy_elem qlist_copy_elem_aarch64 +#define qlist_destroy_obj qlist_destroy_obj_aarch64 +#define qlist_empty qlist_empty_aarch64 +#define qlist_entry_obj qlist_entry_obj_aarch64 +#define qlist_first qlist_first_aarch64 +#define qlist_iter qlist_iter_aarch64 +#define qlist_new qlist_new_aarch64 +#define qlist_next qlist_next_aarch64 +#define qlist_peek qlist_peek_aarch64 +#define qlist_pop qlist_pop_aarch64 +#define qlist_size qlist_size_aarch64 +#define qlist_size_iter qlist_size_iter_aarch64 +#define qlist_type qlist_type_aarch64 +#define qmp_input_end_implicit_struct qmp_input_end_implicit_struct_aarch64 +#define qmp_input_end_list qmp_input_end_list_aarch64 +#define qmp_input_end_struct qmp_input_end_struct_aarch64 +#define qmp_input_get_next_type qmp_input_get_next_type_aarch64 +#define qmp_input_get_object qmp_input_get_object_aarch64 +#define qmp_input_get_visitor qmp_input_get_visitor_aarch64 +#define qmp_input_next_list qmp_input_next_list_aarch64 +#define qmp_input_optional qmp_input_optional_aarch64 +#define qmp_input_pop qmp_input_pop_aarch64 +#define qmp_input_push qmp_input_push_aarch64 +#define qmp_input_start_implicit_struct qmp_input_start_implicit_struct_aarch64 +#define qmp_input_start_list qmp_input_start_list_aarch64 +#define qmp_input_start_struct qmp_input_start_struct_aarch64 +#define qmp_input_type_bool qmp_input_type_bool_aarch64 +#define qmp_input_type_int qmp_input_type_int_aarch64 +#define qmp_input_type_number qmp_input_type_number_aarch64 +#define qmp_input_type_str qmp_input_type_str_aarch64 +#define qmp_input_visitor_cleanup qmp_input_visitor_cleanup_aarch64 +#define qmp_input_visitor_new qmp_input_visitor_new_aarch64 +#define qmp_input_visitor_new_strict qmp_input_visitor_new_strict_aarch64 +#define qmp_output_add_obj qmp_output_add_obj_aarch64 +#define qmp_output_end_list qmp_output_end_list_aarch64 +#define qmp_output_end_struct qmp_output_end_struct_aarch64 +#define qmp_output_first qmp_output_first_aarch64 +#define qmp_output_get_qobject qmp_output_get_qobject_aarch64 +#define qmp_output_get_visitor qmp_output_get_visitor_aarch64 +#define qmp_output_last qmp_output_last_aarch64 +#define qmp_output_next_list qmp_output_next_list_aarch64 +#define qmp_output_pop qmp_output_pop_aarch64 +#define qmp_output_push_obj qmp_output_push_obj_aarch64 +#define qmp_output_start_list qmp_output_start_list_aarch64 +#define qmp_output_start_struct qmp_output_start_struct_aarch64 +#define qmp_output_type_bool qmp_output_type_bool_aarch64 +#define qmp_output_type_int qmp_output_type_int_aarch64 +#define qmp_output_type_number qmp_output_type_number_aarch64 +#define qmp_output_type_str qmp_output_type_str_aarch64 +#define qmp_output_visitor_cleanup qmp_output_visitor_cleanup_aarch64 +#define qmp_output_visitor_new qmp_output_visitor_new_aarch64 +#define qobject_decref qobject_decref_aarch64 +#define qobject_from_json qobject_from_json_aarch64 +#define qobject_from_jsonf qobject_from_jsonf_aarch64 +#define qobject_from_jsonv qobject_from_jsonv_aarch64 +#define qobject_incref qobject_incref_aarch64 +#define qobject_to_json qobject_to_json_aarch64 +#define qobject_to_json_pretty qobject_to_json_pretty_aarch64 +#define qobject_to_qbool qobject_to_qbool_aarch64 +#define qobject_to_qdict qobject_to_qdict_aarch64 +#define qobject_to_qfloat qobject_to_qfloat_aarch64 +#define qobject_to_qint qobject_to_qint_aarch64 +#define qobject_to_qlist qobject_to_qlist_aarch64 +#define qobject_to_qstring qobject_to_qstring_aarch64 +#define qobject_type qobject_type_aarch64 +#define qstring_append qstring_append_aarch64 +#define qstring_append_chr qstring_append_chr_aarch64 +#define qstring_append_int qstring_append_int_aarch64 +#define qstring_destroy_obj qstring_destroy_obj_aarch64 +#define qstring_from_escaped_str qstring_from_escaped_str_aarch64 +#define qstring_from_str qstring_from_str_aarch64 +#define qstring_from_substr qstring_from_substr_aarch64 +#define qstring_get_length qstring_get_length_aarch64 +#define qstring_get_str qstring_get_str_aarch64 +#define qstring_new qstring_new_aarch64 +#define qstring_type qstring_type_aarch64 +#define ram_block_add ram_block_add_aarch64 +#define ram_size ram_size_aarch64 +#define range_compare range_compare_aarch64 +#define range_covers_byte range_covers_byte_aarch64 +#define range_get_last range_get_last_aarch64 +#define range_merge range_merge_aarch64 +#define ranges_can_merge ranges_can_merge_aarch64 +#define raw_read raw_read_aarch64 +#define raw_write raw_write_aarch64 +#define rcon rcon_aarch64 +#define read_raw_cp_reg read_raw_cp_reg_aarch64 +#define recip_estimate recip_estimate_aarch64 +#define recip_sqrt_estimate recip_sqrt_estimate_aarch64 +#define register_cp_regs_for_features register_cp_regs_for_features_aarch64 +#define register_multipage register_multipage_aarch64 +#define register_subpage register_subpage_aarch64 +#define register_tm_clones register_tm_clones_aarch64 +#define register_types_object register_types_object_aarch64 +#define regnames regnames_aarch64 +#define render_memory_region render_memory_region_aarch64 +#define reset_all_temps reset_all_temps_aarch64 +#define reset_temp reset_temp_aarch64 +#define rol32 rol32_aarch64 +#define rol64 rol64_aarch64 +#define ror32 ror32_aarch64 +#define ror64 ror64_aarch64 +#define roundAndPackFloat128 roundAndPackFloat128_aarch64 +#define roundAndPackFloat16 roundAndPackFloat16_aarch64 +#define roundAndPackFloat32 roundAndPackFloat32_aarch64 +#define roundAndPackFloat64 roundAndPackFloat64_aarch64 +#define roundAndPackFloatx80 roundAndPackFloatx80_aarch64 +#define roundAndPackInt32 roundAndPackInt32_aarch64 +#define roundAndPackInt64 roundAndPackInt64_aarch64 +#define roundAndPackUint64 roundAndPackUint64_aarch64 +#define round_to_inf round_to_inf_aarch64 +#define run_on_cpu run_on_cpu_aarch64 +#define s0 s0_aarch64 +#define S0 S0_aarch64 +#define s1 s1_aarch64 +#define S1 S1_aarch64 +#define sa1100_initfn sa1100_initfn_aarch64 +#define sa1110_initfn sa1110_initfn_aarch64 +#define save_globals save_globals_aarch64 +#define scr_write scr_write_aarch64 +#define sctlr_write sctlr_write_aarch64 +#define set_bit set_bit_aarch64 +#define set_bits set_bits_aarch64 +#define set_default_nan_mode set_default_nan_mode_aarch64 +#define set_feature set_feature_aarch64 +#define set_float_detect_tininess set_float_detect_tininess_aarch64 +#define set_float_exception_flags set_float_exception_flags_aarch64 +#define set_float_rounding_mode set_float_rounding_mode_aarch64 +#define set_flush_inputs_to_zero set_flush_inputs_to_zero_aarch64 +#define set_flush_to_zero set_flush_to_zero_aarch64 +#define set_swi_errno set_swi_errno_aarch64 +#define sextract32 sextract32_aarch64 +#define sextract64 sextract64_aarch64 +#define shift128ExtraRightJamming shift128ExtraRightJamming_aarch64 +#define shift128Right shift128Right_aarch64 +#define shift128RightJamming shift128RightJamming_aarch64 +#define shift32RightJamming shift32RightJamming_aarch64 +#define shift64ExtraRightJamming shift64ExtraRightJamming_aarch64 +#define shift64RightJamming shift64RightJamming_aarch64 +#define shifter_out_im shifter_out_im_aarch64 +#define shortShift128Left shortShift128Left_aarch64 +#define shortShift192Left shortShift192Left_aarch64 +#define simple_mpu_ap_bits simple_mpu_ap_bits_aarch64 +#define size_code_gen_buffer size_code_gen_buffer_aarch64 +#define slow_bitmap_and slow_bitmap_and_aarch64 +#define slow_bitmap_andnot slow_bitmap_andnot_aarch64 +#define slow_bitmap_complement slow_bitmap_complement_aarch64 +#define slow_bitmap_empty slow_bitmap_empty_aarch64 +#define slow_bitmap_equal slow_bitmap_equal_aarch64 +#define slow_bitmap_full slow_bitmap_full_aarch64 +#define slow_bitmap_intersects slow_bitmap_intersects_aarch64 +#define slow_bitmap_or slow_bitmap_or_aarch64 +#define slow_bitmap_xor slow_bitmap_xor_aarch64 +#define softmmu_lock_user softmmu_lock_user_aarch64 +#define softmmu_lock_user_string softmmu_lock_user_string_aarch64 +#define softmmu_tget32 softmmu_tget32_aarch64 +#define softmmu_tget8 softmmu_tget8_aarch64 +#define softmmu_tput32 softmmu_tput32_aarch64 +#define softmmu_unlock_user softmmu_unlock_user_aarch64 +#define sort_constraints sort_constraints_aarch64 +#define sp_el0_access sp_el0_access_aarch64 +#define spin_lock spin_lock_aarch64 +#define spin_unlock spin_unlock_aarch64 +#define spsel_read spsel_read_aarch64 +#define spsel_write spsel_write_aarch64 +#define start_list start_list_aarch64 +#define stb_p stb_p_aarch64 +#define stb_phys stb_phys_aarch64 +#define stl_be_p stl_be_p_aarch64 +#define stl_be_phys stl_be_phys_aarch64 +#define stl_he_p stl_he_p_aarch64 +#define stl_le_p stl_le_p_aarch64 +#define stl_le_phys stl_le_phys_aarch64 +#define stl_phys stl_phys_aarch64 +#define stl_phys_internal stl_phys_internal_aarch64 +#define stl_phys_notdirty stl_phys_notdirty_aarch64 +#define store_cpu_offset store_cpu_offset_aarch64 +#define store_reg store_reg_aarch64 +#define store_reg_bx store_reg_bx_aarch64 +#define store_reg_from_load store_reg_from_load_aarch64 +#define stq_be_p stq_be_p_aarch64 +#define stq_be_phys stq_be_phys_aarch64 +#define stq_he_p stq_he_p_aarch64 +#define stq_le_p stq_le_p_aarch64 +#define stq_le_phys stq_le_phys_aarch64 +#define stq_phys stq_phys_aarch64 +#define string_input_get_visitor string_input_get_visitor_aarch64 +#define string_input_visitor_cleanup string_input_visitor_cleanup_aarch64 +#define string_input_visitor_new string_input_visitor_new_aarch64 +#define string_output_append string_output_append_aarch64 +#define string_output_append_range string_output_append_range_aarch64 +#define string_output_get_string string_output_get_string_aarch64 +#define string_output_get_visitor string_output_get_visitor_aarch64 +#define string_output_set string_output_set_aarch64 +#define string_output_visitor_cleanup string_output_visitor_cleanup_aarch64 +#define string_output_visitor_new string_output_visitor_new_aarch64 +#define stristart stristart_aarch64 +#define strongarm_cp_reginfo strongarm_cp_reginfo_aarch64 +#define strpadcpy strpadcpy_aarch64 +#define strstart strstart_aarch64 +#define strtosz strtosz_aarch64 +#define strtosz_suffix strtosz_suffix_aarch64 +#define stw_be_p stw_be_p_aarch64 +#define stw_be_phys stw_be_phys_aarch64 +#define stw_he_p stw_he_p_aarch64 +#define stw_le_p stw_le_p_aarch64 +#define stw_le_phys stw_le_phys_aarch64 +#define stw_phys stw_phys_aarch64 +#define stw_phys_internal stw_phys_internal_aarch64 +#define sub128 sub128_aarch64 +#define sub16_sat sub16_sat_aarch64 +#define sub16_usat sub16_usat_aarch64 +#define sub192 sub192_aarch64 +#define sub8_sat sub8_sat_aarch64 +#define sub8_usat sub8_usat_aarch64 +#define subFloat128Sigs subFloat128Sigs_aarch64 +#define subFloat32Sigs subFloat32Sigs_aarch64 +#define subFloat64Sigs subFloat64Sigs_aarch64 +#define subFloatx80Sigs subFloatx80Sigs_aarch64 +#define subpage_accepts subpage_accepts_aarch64 +#define subpage_init subpage_init_aarch64 +#define subpage_ops subpage_ops_aarch64 +#define subpage_read subpage_read_aarch64 +#define subpage_register subpage_register_aarch64 +#define subpage_write subpage_write_aarch64 +#define suffix_mul suffix_mul_aarch64 +#define swap_commutative swap_commutative_aarch64 +#define swap_commutative2 swap_commutative2_aarch64 +#define switch_mode switch_mode_aarch64 +#define switch_v7m_sp switch_v7m_sp_aarch64 +#define syn_aa32_bkpt syn_aa32_bkpt_aarch64 +#define syn_aa32_hvc syn_aa32_hvc_aarch64 +#define syn_aa32_smc syn_aa32_smc_aarch64 +#define syn_aa32_svc syn_aa32_svc_aarch64 +#define syn_breakpoint syn_breakpoint_aarch64 +#define sync_globals sync_globals_aarch64 +#define syn_cp14_rrt_trap syn_cp14_rrt_trap_aarch64 +#define syn_cp14_rt_trap syn_cp14_rt_trap_aarch64 +#define syn_cp15_rrt_trap syn_cp15_rrt_trap_aarch64 +#define syn_cp15_rt_trap syn_cp15_rt_trap_aarch64 +#define syn_data_abort syn_data_abort_aarch64 +#define syn_fp_access_trap syn_fp_access_trap_aarch64 +#define syn_insn_abort syn_insn_abort_aarch64 +#define syn_swstep syn_swstep_aarch64 +#define syn_uncategorized syn_uncategorized_aarch64 +#define syn_watchpoint syn_watchpoint_aarch64 +#define syscall_err syscall_err_aarch64 +#define system_bus_class_init system_bus_class_init_aarch64 +#define system_bus_info system_bus_info_aarch64 +#define t2ee_cp_reginfo t2ee_cp_reginfo_aarch64 +#define table_logic_cc table_logic_cc_aarch64 +#define target_parse_constraint target_parse_constraint_aarch64 +#define target_words_bigendian target_words_bigendian_aarch64 +#define tb_add_jump tb_add_jump_aarch64 +#define tb_alloc tb_alloc_aarch64 +#define tb_alloc_page tb_alloc_page_aarch64 +#define tb_check_watchpoint tb_check_watchpoint_aarch64 +#define tb_find_fast tb_find_fast_aarch64 +#define tb_find_pc tb_find_pc_aarch64 +#define tb_find_slow tb_find_slow_aarch64 +#define tb_flush tb_flush_aarch64 +#define tb_flush_jmp_cache tb_flush_jmp_cache_aarch64 +#define tb_free tb_free_aarch64 +#define tb_gen_code tb_gen_code_aarch64 +#define tb_hash_remove tb_hash_remove_aarch64 +#define tb_invalidate_phys_addr tb_invalidate_phys_addr_aarch64 +#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_aarch64 +#define tb_invalidate_phys_range tb_invalidate_phys_range_aarch64 +#define tb_jmp_cache_hash_func tb_jmp_cache_hash_func_aarch64 +#define tb_jmp_cache_hash_page tb_jmp_cache_hash_page_aarch64 +#define tb_jmp_remove tb_jmp_remove_aarch64 +#define tb_link_page tb_link_page_aarch64 +#define tb_page_remove tb_page_remove_aarch64 +#define tb_phys_hash_func tb_phys_hash_func_aarch64 +#define tb_phys_invalidate tb_phys_invalidate_aarch64 +#define tb_reset_jump tb_reset_jump_aarch64 +#define tb_set_jmp_target tb_set_jmp_target_aarch64 +#define tb_set_jmp_target1 tb_set_jmp_target1_aarch64 +#define tcg_accel_class_init tcg_accel_class_init_aarch64 +#define tcg_accel_type tcg_accel_type_aarch64 +#define tcg_add_param_i32 tcg_add_param_i32_aarch64 +#define tcg_add_param_i64 tcg_add_param_i64_aarch64 +#define tcg_add_target_add_op_defs tcg_add_target_add_op_defs_aarch64 +#define tcg_allowed tcg_allowed_aarch64 +#define tcg_canonicalize_memop tcg_canonicalize_memop_aarch64 +#define tcg_commit tcg_commit_aarch64 +#define tcg_cond_to_jcc tcg_cond_to_jcc_aarch64 +#define tcg_constant_folding tcg_constant_folding_aarch64 +#define tcg_const_i32 tcg_const_i32_aarch64 +#define tcg_const_i64 tcg_const_i64_aarch64 +#define tcg_const_local_i32 tcg_const_local_i32_aarch64 +#define tcg_const_local_i64 tcg_const_local_i64_aarch64 +#define tcg_context_init tcg_context_init_aarch64 +#define tcg_cpu_address_space_init tcg_cpu_address_space_init_aarch64 +#define tcg_cpu_exec tcg_cpu_exec_aarch64 +#define tcg_current_code_size tcg_current_code_size_aarch64 +#define tcg_dump_info tcg_dump_info_aarch64 +#define tcg_dump_ops tcg_dump_ops_aarch64 +#define tcg_exec_all tcg_exec_all_aarch64 +#define tcg_find_helper tcg_find_helper_aarch64 +#define tcg_func_start tcg_func_start_aarch64 +#define tcg_gen_abs_i32 tcg_gen_abs_i32_aarch64 +#define tcg_gen_add2_i32 tcg_gen_add2_i32_aarch64 +#define tcg_gen_add_i32 tcg_gen_add_i32_aarch64 +#define tcg_gen_add_i64 tcg_gen_add_i64_aarch64 +#define tcg_gen_addi_i32 tcg_gen_addi_i32_aarch64 +#define tcg_gen_addi_i64 tcg_gen_addi_i64_aarch64 +#define tcg_gen_andc_i32 tcg_gen_andc_i32_aarch64 +#define tcg_gen_and_i32 tcg_gen_and_i32_aarch64 +#define tcg_gen_and_i64 tcg_gen_and_i64_aarch64 +#define tcg_gen_andi_i32 tcg_gen_andi_i32_aarch64 +#define tcg_gen_andi_i64 tcg_gen_andi_i64_aarch64 +#define tcg_gen_br tcg_gen_br_aarch64 +#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_aarch64 +#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_aarch64 +#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_aarch64 +#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_aarch64 +#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_aarch64 +#define tcg_gen_callN tcg_gen_callN_aarch64 +#define tcg_gen_code tcg_gen_code_aarch64 +#define tcg_gen_code_common tcg_gen_code_common_aarch64 +#define tcg_gen_code_search_pc tcg_gen_code_search_pc_aarch64 +#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_aarch64 +#define tcg_gen_debug_insn_start tcg_gen_debug_insn_start_aarch64 +#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_aarch64 +#define tcg_gen_exit_tb tcg_gen_exit_tb_aarch64 +#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_aarch64 +#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_aarch64 +#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_aarch64 +#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_aarch64 +#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_aarch64 +#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_aarch64 +#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_aarch64 +#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_aarch64 +#define tcg_gen_goto_tb tcg_gen_goto_tb_aarch64 +#define tcg_gen_ld_i32 tcg_gen_ld_i32_aarch64 +#define tcg_gen_ld_i64 tcg_gen_ld_i64_aarch64 +#define tcg_gen_ldst_op_i32 tcg_gen_ldst_op_i32_aarch64 +#define tcg_gen_ldst_op_i64 tcg_gen_ldst_op_i64_aarch64 +#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_aarch64 +#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_aarch64 +#define tcg_gen_mov_i32 tcg_gen_mov_i32_aarch64 +#define tcg_gen_mov_i64 tcg_gen_mov_i64_aarch64 +#define tcg_gen_movi_i32 tcg_gen_movi_i32_aarch64 +#define tcg_gen_movi_i64 tcg_gen_movi_i64_aarch64 +#define tcg_gen_mul_i32 tcg_gen_mul_i32_aarch64 +#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_aarch64 +#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_aarch64 +#define tcg_gen_neg_i32 tcg_gen_neg_i32_aarch64 +#define tcg_gen_neg_i64 tcg_gen_neg_i64_aarch64 +#define tcg_gen_not_i32 tcg_gen_not_i32_aarch64 +#define tcg_gen_op0 tcg_gen_op0_aarch64 +#define tcg_gen_op1i tcg_gen_op1i_aarch64 +#define tcg_gen_op2_i32 tcg_gen_op2_i32_aarch64 +#define tcg_gen_op2_i64 tcg_gen_op2_i64_aarch64 +#define tcg_gen_op2i_i32 tcg_gen_op2i_i32_aarch64 +#define tcg_gen_op2i_i64 tcg_gen_op2i_i64_aarch64 +#define tcg_gen_op3_i32 tcg_gen_op3_i32_aarch64 +#define tcg_gen_op3_i64 tcg_gen_op3_i64_aarch64 +#define tcg_gen_op4_i32 tcg_gen_op4_i32_aarch64 +#define tcg_gen_op4i_i32 tcg_gen_op4i_i32_aarch64 +#define tcg_gen_op4ii_i32 tcg_gen_op4ii_i32_aarch64 +#define tcg_gen_op4ii_i64 tcg_gen_op4ii_i64_aarch64 +#define tcg_gen_op5ii_i32 tcg_gen_op5ii_i32_aarch64 +#define tcg_gen_op6_i32 tcg_gen_op6_i32_aarch64 +#define tcg_gen_op6i_i32 tcg_gen_op6i_i32_aarch64 +#define tcg_gen_op6i_i64 tcg_gen_op6i_i64_aarch64 +#define tcg_gen_orc_i32 tcg_gen_orc_i32_aarch64 +#define tcg_gen_or_i32 tcg_gen_or_i32_aarch64 +#define tcg_gen_or_i64 tcg_gen_or_i64_aarch64 +#define tcg_gen_ori_i32 tcg_gen_ori_i32_aarch64 +#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_aarch64 +#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_aarch64 +#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_aarch64 +#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_aarch64 +#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_aarch64 +#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_aarch64 +#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_aarch64 +#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_aarch64 +#define tcg_gen_sar_i32 tcg_gen_sar_i32_aarch64 +#define tcg_gen_sari_i32 tcg_gen_sari_i32_aarch64 +#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_aarch64 +#define tcg_gen_shl_i32 tcg_gen_shl_i32_aarch64 +#define tcg_gen_shl_i64 tcg_gen_shl_i64_aarch64 +#define tcg_gen_shli_i32 tcg_gen_shli_i32_aarch64 +#define tcg_gen_shli_i64 tcg_gen_shli_i64_aarch64 +#define tcg_gen_shr_i32 tcg_gen_shr_i32_aarch64 +#define tcg_gen_shifti_i64 tcg_gen_shifti_i64_aarch64 +#define tcg_gen_shr_i64 tcg_gen_shr_i64_aarch64 +#define tcg_gen_shri_i32 tcg_gen_shri_i32_aarch64 +#define tcg_gen_shri_i64 tcg_gen_shri_i64_aarch64 +#define tcg_gen_st_i32 tcg_gen_st_i32_aarch64 +#define tcg_gen_st_i64 tcg_gen_st_i64_aarch64 +#define tcg_gen_sub_i32 tcg_gen_sub_i32_aarch64 +#define tcg_gen_sub_i64 tcg_gen_sub_i64_aarch64 +#define tcg_gen_subi_i32 tcg_gen_subi_i32_aarch64 +#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_aarch64 +#define tcg_gen_trunc_shr_i64_i32 tcg_gen_trunc_shr_i64_i32_aarch64 +#define tcg_gen_xor_i32 tcg_gen_xor_i32_aarch64 +#define tcg_gen_xor_i64 tcg_gen_xor_i64_aarch64 +#define tcg_gen_xori_i32 tcg_gen_xori_i32_aarch64 +#define tcg_get_arg_str_i32 tcg_get_arg_str_i32_aarch64 +#define tcg_get_arg_str_i64 tcg_get_arg_str_i64_aarch64 +#define tcg_get_arg_str_idx tcg_get_arg_str_idx_aarch64 +#define tcg_global_mem_new_i32 tcg_global_mem_new_i32_aarch64 +#define tcg_global_mem_new_i64 tcg_global_mem_new_i64_aarch64 +#define tcg_global_mem_new_internal tcg_global_mem_new_internal_aarch64 +#define tcg_global_reg_new_i32 tcg_global_reg_new_i32_aarch64 +#define tcg_global_reg_new_i64 tcg_global_reg_new_i64_aarch64 +#define tcg_global_reg_new_internal tcg_global_reg_new_internal_aarch64 +#define tcg_handle_interrupt tcg_handle_interrupt_aarch64 +#define tcg_init tcg_init_aarch64 +#define tcg_invert_cond tcg_invert_cond_aarch64 +#define tcg_la_bb_end tcg_la_bb_end_aarch64 +#define tcg_la_func_end tcg_la_func_end_aarch64 +#define tcg_liveness_analysis tcg_liveness_analysis_aarch64 +#define tcg_malloc tcg_malloc_aarch64 +#define tcg_malloc_internal tcg_malloc_internal_aarch64 +#define tcg_op_defs_org tcg_op_defs_org_aarch64 +#define tcg_opt_gen_mov tcg_opt_gen_mov_aarch64 +#define tcg_opt_gen_movi tcg_opt_gen_movi_aarch64 +#define tcg_optimize tcg_optimize_aarch64 +#define tcg_out16 tcg_out16_aarch64 +#define tcg_out32 tcg_out32_aarch64 +#define tcg_out64 tcg_out64_aarch64 +#define tcg_out8 tcg_out8_aarch64 +#define tcg_out_addi tcg_out_addi_aarch64 +#define tcg_out_branch tcg_out_branch_aarch64 +#define tcg_out_brcond32 tcg_out_brcond32_aarch64 +#define tcg_out_brcond64 tcg_out_brcond64_aarch64 +#define tcg_out_bswap32 tcg_out_bswap32_aarch64 +#define tcg_out_bswap64 tcg_out_bswap64_aarch64 +#define tcg_out_call tcg_out_call_aarch64 +#define tcg_out_cmp tcg_out_cmp_aarch64 +#define tcg_out_ext16s tcg_out_ext16s_aarch64 +#define tcg_out_ext16u tcg_out_ext16u_aarch64 +#define tcg_out_ext32s tcg_out_ext32s_aarch64 +#define tcg_out_ext32u tcg_out_ext32u_aarch64 +#define tcg_out_ext8s tcg_out_ext8s_aarch64 +#define tcg_out_ext8u tcg_out_ext8u_aarch64 +#define tcg_out_jmp tcg_out_jmp_aarch64 +#define tcg_out_jxx tcg_out_jxx_aarch64 +#define tcg_out_label tcg_out_label_aarch64 +#define tcg_out_ld tcg_out_ld_aarch64 +#define tcg_out_modrm tcg_out_modrm_aarch64 +#define tcg_out_modrm_offset tcg_out_modrm_offset_aarch64 +#define tcg_out_modrm_sib_offset tcg_out_modrm_sib_offset_aarch64 +#define tcg_out_mov tcg_out_mov_aarch64 +#define tcg_out_movcond32 tcg_out_movcond32_aarch64 +#define tcg_out_movcond64 tcg_out_movcond64_aarch64 +#define tcg_out_movi tcg_out_movi_aarch64 +#define tcg_out_op tcg_out_op_aarch64 +#define tcg_out_pop tcg_out_pop_aarch64 +#define tcg_out_push tcg_out_push_aarch64 +#define tcg_out_qemu_ld tcg_out_qemu_ld_aarch64 +#define tcg_out_qemu_ld_direct tcg_out_qemu_ld_direct_aarch64 +#define tcg_out_qemu_ld_slow_path tcg_out_qemu_ld_slow_path_aarch64 +#define tcg_out_qemu_st tcg_out_qemu_st_aarch64 +#define tcg_out_qemu_st_direct tcg_out_qemu_st_direct_aarch64 +#define tcg_out_qemu_st_slow_path tcg_out_qemu_st_slow_path_aarch64 +#define tcg_out_reloc tcg_out_reloc_aarch64 +#define tcg_out_rolw_8 tcg_out_rolw_8_aarch64 +#define tcg_out_setcond32 tcg_out_setcond32_aarch64 +#define tcg_out_setcond64 tcg_out_setcond64_aarch64 +#define tcg_out_shifti tcg_out_shifti_aarch64 +#define tcg_out_st tcg_out_st_aarch64 +#define tcg_out_tb_finalize tcg_out_tb_finalize_aarch64 +#define tcg_out_tb_init tcg_out_tb_init_aarch64 +#define tcg_out_tlb_load tcg_out_tlb_load_aarch64 +#define tcg_out_vex_modrm tcg_out_vex_modrm_aarch64 +#define tcg_patch32 tcg_patch32_aarch64 +#define tcg_patch8 tcg_patch8_aarch64 +#define tcg_pcrel_diff tcg_pcrel_diff_aarch64 +#define tcg_pool_reset tcg_pool_reset_aarch64 +#define tcg_prologue_init tcg_prologue_init_aarch64 +#define tcg_ptr_byte_diff tcg_ptr_byte_diff_aarch64 +#define tcg_reg_alloc tcg_reg_alloc_aarch64 +#define tcg_reg_alloc_bb_end tcg_reg_alloc_bb_end_aarch64 +#define tcg_reg_alloc_call tcg_reg_alloc_call_aarch64 +#define tcg_reg_alloc_mov tcg_reg_alloc_mov_aarch64 +#define tcg_reg_alloc_movi tcg_reg_alloc_movi_aarch64 +#define tcg_reg_alloc_op tcg_reg_alloc_op_aarch64 +#define tcg_reg_alloc_start tcg_reg_alloc_start_aarch64 +#define tcg_reg_free tcg_reg_free_aarch64 +#define tcg_register_jit tcg_register_jit_aarch64 +#define tcg_register_jit_int tcg_register_jit_int_aarch64 +#define tcg_reg_sync tcg_reg_sync_aarch64 +#define tcg_set_frame tcg_set_frame_aarch64 +#define tcg_set_nop tcg_set_nop_aarch64 +#define tcg_swap_cond tcg_swap_cond_aarch64 +#define tcg_target_callee_save_regs tcg_target_callee_save_regs_aarch64 +#define tcg_target_call_iarg_regs tcg_target_call_iarg_regs_aarch64 +#define tcg_target_call_oarg_regs tcg_target_call_oarg_regs_aarch64 +#define tcg_target_const_match tcg_target_const_match_aarch64 +#define tcg_target_init tcg_target_init_aarch64 +#define tcg_target_qemu_prologue tcg_target_qemu_prologue_aarch64 +#define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_aarch64 +#define tcg_temp_alloc tcg_temp_alloc_aarch64 +#define tcg_temp_free_i32 tcg_temp_free_i32_aarch64 +#define tcg_temp_free_i64 tcg_temp_free_i64_aarch64 +#define tcg_temp_free_internal tcg_temp_free_internal_aarch64 +#define tcg_temp_local_new_i32 tcg_temp_local_new_i32_aarch64 +#define tcg_temp_local_new_i64 tcg_temp_local_new_i64_aarch64 +#define tcg_temp_new_i32 tcg_temp_new_i32_aarch64 +#define tcg_temp_new_i64 tcg_temp_new_i64_aarch64 +#define tcg_temp_new_internal tcg_temp_new_internal_aarch64 +#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_aarch64 +#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_aarch64 +#define tdb_hash tdb_hash_aarch64 +#define teecr_write teecr_write_aarch64 +#define teehbr_access teehbr_access_aarch64 +#define temp_allocate_frame temp_allocate_frame_aarch64 +#define temp_dead temp_dead_aarch64 +#define temps_are_copies temps_are_copies_aarch64 +#define temp_save temp_save_aarch64 +#define temp_sync temp_sync_aarch64 +#define tgen_arithi tgen_arithi_aarch64 +#define tgen_arithr tgen_arithr_aarch64 +#define thumb2_logic_op thumb2_logic_op_aarch64 +#define ti925t_initfn ti925t_initfn_aarch64 +#define tlb_add_large_page tlb_add_large_page_aarch64 +#define tlb_flush_entry tlb_flush_entry_aarch64 +#define tlbi_aa64_asid_is_write tlbi_aa64_asid_is_write_aarch64 +#define tlbi_aa64_asid_write tlbi_aa64_asid_write_aarch64 +#define tlbi_aa64_vaa_is_write tlbi_aa64_vaa_is_write_aarch64 +#define tlbi_aa64_vaa_write tlbi_aa64_vaa_write_aarch64 +#define tlbi_aa64_va_is_write tlbi_aa64_va_is_write_aarch64 +#define tlbi_aa64_va_write tlbi_aa64_va_write_aarch64 +#define tlbiall_is_write tlbiall_is_write_aarch64 +#define tlbiall_write tlbiall_write_aarch64 +#define tlbiasid_is_write tlbiasid_is_write_aarch64 +#define tlbiasid_write tlbiasid_write_aarch64 +#define tlbimvaa_is_write tlbimvaa_is_write_aarch64 +#define tlbimvaa_write tlbimvaa_write_aarch64 +#define tlbimva_is_write tlbimva_is_write_aarch64 +#define tlbimva_write tlbimva_write_aarch64 +#define tlb_is_dirty_ram tlb_is_dirty_ram_aarch64 +#define tlb_protect_code tlb_protect_code_aarch64 +#define tlb_reset_dirty_range tlb_reset_dirty_range_aarch64 +#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_aarch64 +#define tlb_set_dirty tlb_set_dirty_aarch64 +#define tlb_set_dirty1 tlb_set_dirty1_aarch64 +#define tlb_unprotect_code_phys tlb_unprotect_code_phys_aarch64 +#define tlb_vaddr_to_host tlb_vaddr_to_host_aarch64 +#define to_json to_json_aarch64 +#define to_json_dict_iter to_json_dict_iter_aarch64 +#define to_json_list_iter to_json_list_iter_aarch64 +#define token_get_type token_get_type_aarch64 +#define token_get_value token_get_value_aarch64 +#define token_is_escape token_is_escape_aarch64 +#define token_is_keyword token_is_keyword_aarch64 +#define token_is_operator token_is_operator_aarch64 +#define tokens_append_from_iter tokens_append_from_iter_aarch64 +#define to_qiv to_qiv_aarch64 +#define to_qov to_qov_aarch64 +#define tosa_init tosa_init_aarch64 +#define tosa_machine_init tosa_machine_init_aarch64 +#define tswap32 tswap32_aarch64 +#define tswap64 tswap64_aarch64 +#define type_class_get_size type_class_get_size_aarch64 +#define type_get_by_name type_get_by_name_aarch64 +#define type_get_parent type_get_parent_aarch64 +#define type_has_parent type_has_parent_aarch64 +#define type_initialize type_initialize_aarch64 +#define type_initialize_interface type_initialize_interface_aarch64 +#define type_is_ancestor type_is_ancestor_aarch64 +#define type_new type_new_aarch64 +#define type_object_get_size type_object_get_size_aarch64 +#define type_register_internal type_register_internal_aarch64 +#define type_table_add type_table_add_aarch64 +#define type_table_get type_table_get_aarch64 +#define type_table_lookup type_table_lookup_aarch64 +#define uint16_to_float32 uint16_to_float32_aarch64 +#define uint16_to_float64 uint16_to_float64_aarch64 +#define uint32_to_float32 uint32_to_float32_aarch64 +#define uint32_to_float64 uint32_to_float64_aarch64 +#define uint64_to_float128 uint64_to_float128_aarch64 +#define uint64_to_float32 uint64_to_float32_aarch64 +#define uint64_to_float64 uint64_to_float64_aarch64 +#define uleb128_decode_small uleb128_decode_small_aarch64 +#define uleb128_encode_small uleb128_encode_small_aarch64 +#define unassigned_io_ops unassigned_io_ops_aarch64 +#define unassigned_io_read unassigned_io_read_aarch64 +#define unassigned_io_write unassigned_io_write_aarch64 +#define unassigned_mem_accepts unassigned_mem_accepts_aarch64 +#define unassigned_mem_ops unassigned_mem_ops_aarch64 +#define unassigned_mem_read unassigned_mem_read_aarch64 +#define unassigned_mem_write unassigned_mem_write_aarch64 +#define update_spsel update_spsel_aarch64 +#define v6_cp_reginfo v6_cp_reginfo_aarch64 +#define v6k_cp_reginfo v6k_cp_reginfo_aarch64 +#define v7_cp_reginfo v7_cp_reginfo_aarch64 +#define v7mp_cp_reginfo v7mp_cp_reginfo_aarch64 +#define v7m_pop v7m_pop_aarch64 +#define v7m_push v7m_push_aarch64 +#define v8_cp_reginfo v8_cp_reginfo_aarch64 +#define v8_el2_cp_reginfo v8_el2_cp_reginfo_aarch64 +#define v8_el3_cp_reginfo v8_el3_cp_reginfo_aarch64 +#define v8_el3_no_el2_cp_reginfo v8_el3_no_el2_cp_reginfo_aarch64 +#define vapa_cp_reginfo vapa_cp_reginfo_aarch64 +#define vbar_write vbar_write_aarch64 +#define vfp_exceptbits_from_host vfp_exceptbits_from_host_aarch64 +#define vfp_exceptbits_to_host vfp_exceptbits_to_host_aarch64 +#define vfp_get_fpcr vfp_get_fpcr_aarch64 +#define vfp_get_fpscr vfp_get_fpscr_aarch64 +#define vfp_get_fpsr vfp_get_fpsr_aarch64 +#define vfp_reg_offset vfp_reg_offset_aarch64 +#define vfp_set_fpcr vfp_set_fpcr_aarch64 +#define vfp_set_fpscr vfp_set_fpscr_aarch64 +#define vfp_set_fpsr vfp_set_fpsr_aarch64 +#define visit_end_implicit_struct visit_end_implicit_struct_aarch64 +#define visit_end_list visit_end_list_aarch64 +#define visit_end_struct visit_end_struct_aarch64 +#define visit_end_union visit_end_union_aarch64 +#define visit_get_next_type visit_get_next_type_aarch64 +#define visit_next_list visit_next_list_aarch64 +#define visit_optional visit_optional_aarch64 +#define visit_start_implicit_struct visit_start_implicit_struct_aarch64 +#define visit_start_list visit_start_list_aarch64 +#define visit_start_struct visit_start_struct_aarch64 +#define visit_start_union visit_start_union_aarch64 +#define vmsa_cp_reginfo vmsa_cp_reginfo_aarch64 +#define vmsa_tcr_el1_write vmsa_tcr_el1_write_aarch64 +#define vmsa_ttbcr_raw_write vmsa_ttbcr_raw_write_aarch64 +#define vmsa_ttbcr_reset vmsa_ttbcr_reset_aarch64 +#define vmsa_ttbcr_write vmsa_ttbcr_write_aarch64 +#define vmsa_ttbr_write vmsa_ttbr_write_aarch64 +#define wchar_to_utf8 wchar_to_utf8_aarch64 +#define write_cpustate_to_list write_cpustate_to_list_aarch64 +#define write_list_to_cpustate write_list_to_cpustate_aarch64 +#define write_raw_cp_reg write_raw_cp_reg_aarch64 +#define X86CPURegister32_lookup X86CPURegister32_lookup_aarch64 +#define x86_op_defs x86_op_defs_aarch64 +#define xpsr_read xpsr_read_aarch64 +#define xpsr_write xpsr_write_aarch64 +#define xscale_cpar_write xscale_cpar_write_aarch64 +#define xscale_cp_reginfo xscale_cp_reginfo_aarch64 +#endif diff --git a/qemu/accel.c b/qemu/accel.c new file mode 100644 index 00000000..3de5416c --- /dev/null +++ b/qemu/accel.c @@ -0,0 +1,123 @@ +/* + * QEMU System Emulator, accelerator interfaces + * + * Copyright (c) 2003-2008 Fabrice Bellard + * Copyright (c) 2014 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */ + +#include "sysemu/accel.h" +#include "hw/boards.h" +#include "qemu-common.h" +#include "sysemu/sysemu.h" +#include "qom/object.h" +#include "hw/boards.h" + +// use default size for TCG translated block +#define TCG_TB_SIZE 0 + +static bool tcg_allowed = true; +static int tcg_init(MachineState *ms); +static AccelClass *accel_find(struct uc_struct *uc, const char *opt_name); +static int accel_init_machine(AccelClass *acc, MachineState *ms); +static void tcg_accel_class_init(struct uc_struct *uc, ObjectClass *oc, void *data); + +static int tcg_init(MachineState *ms) +{ + ms->uc->tcg_exec_init(ms->uc, TCG_TB_SIZE * 1024 * 1024); // arch-dependent + return 0; +} + +static const TypeInfo accel_type = { + .name = TYPE_ACCEL, + .parent = TYPE_OBJECT, + .class_size = sizeof(AccelClass), + .instance_size = sizeof(AccelState), +}; + +#define TYPE_TCG_ACCEL ACCEL_CLASS_NAME("tcg") + +static const TypeInfo tcg_accel_type = { + .name = TYPE_TCG_ACCEL, + .parent = TYPE_ACCEL, + .class_init = tcg_accel_class_init, +}; + + +int configure_accelerator(MachineState *ms) +{ + int ret; + bool accel_initialised = false; + AccelClass *acc; + + acc = accel_find(ms->uc, "tcg"); + ret = accel_init_machine(acc, ms); + if (ret < 0) { + fprintf(stderr, "failed to initialize %s: %s\n", + acc->name, + strerror(-ret)); + } else { + accel_initialised = true; + } + + return !accel_initialised; +} + +void register_accel_types(struct uc_struct *uc) +{ + type_register_static(uc, &accel_type); + type_register_static(uc, &tcg_accel_type); +} + +static void tcg_accel_class_init(struct uc_struct *uc, ObjectClass *oc, void *data) +{ + AccelClass *ac = ACCEL_CLASS(uc, oc); + ac->name = "tcg"; + ac->init_machine = tcg_init; + ac->allowed = &tcg_allowed; +} + +/* Lookup AccelClass from opt_name. Returns NULL if not found */ +static AccelClass *accel_find(struct uc_struct *uc, const char *opt_name) +{ + char *class_name = g_strdup_printf(ACCEL_CLASS_NAME("%s"), opt_name); + AccelClass *ac = ACCEL_CLASS(uc, object_class_by_name(uc, class_name)); + g_free(class_name); + return ac; +} + +static int accel_init_machine(AccelClass *acc, MachineState *ms) +{ + ObjectClass *oc = OBJECT_CLASS(acc); + const char *cname = object_class_get_name(oc); + AccelState *accel = ACCEL(ms->uc, object_new(ms->uc, cname)); + int ret; + ms->accelerator = accel; + *(acc->allowed) = true; + ret = acc->init_machine(ms); + if (ret < 0) { + ms->accelerator = NULL; + *(acc->allowed) = false; + object_unref(ms->uc, OBJECT(accel)); + } + return ret; +} diff --git a/qemu/arm.h b/qemu/arm.h new file mode 100644 index 00000000..c24329b3 --- /dev/null +++ b/qemu/arm.h @@ -0,0 +1,3168 @@ +/* Autogen header for Unicorn Engine - DONOT MODIFY */ +#ifndef UNICORN_AUTOGEN_ARM_H +#define UNICORN_AUTOGEN_ARM_H +#define check_exit_request check_exit_request_arm +#define address_space_unregister address_space_unregister_arm +#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_arm +#define phys_mem_clean phys_mem_clean_arm +#define tb_cleanup tb_cleanup_arm +#define memory_map memory_map_arm +#define memory_free memory_free_arm +#define helper_raise_exception helper_raise_exception_arm +#define tcg_enabled tcg_enabled_arm +#define tcg_exec_init tcg_exec_init_arm +#define memory_register_types memory_register_types_arm +#define cpu_exec_init_all cpu_exec_init_all_arm +#define vm_start vm_start_arm +#define resume_all_vcpus resume_all_vcpus_arm +#define a15_l2ctlr_read a15_l2ctlr_read_arm +#define a64_translate_init a64_translate_init_arm +#define aa32_generate_debug_exceptions aa32_generate_debug_exceptions_arm +#define aa64_cacheop_access aa64_cacheop_access_arm +#define aa64_daif_access aa64_daif_access_arm +#define aa64_daif_write aa64_daif_write_arm +#define aa64_dczid_read aa64_dczid_read_arm +#define aa64_fpcr_read aa64_fpcr_read_arm +#define aa64_fpcr_write aa64_fpcr_write_arm +#define aa64_fpsr_read aa64_fpsr_read_arm +#define aa64_fpsr_write aa64_fpsr_write_arm +#define aa64_generate_debug_exceptions aa64_generate_debug_exceptions_arm +#define aa64_zva_access aa64_zva_access_arm +#define aarch64_banked_spsr_index aarch64_banked_spsr_index_arm +#define aarch64_restore_sp aarch64_restore_sp_arm +#define aarch64_save_sp aarch64_save_sp_arm +#define accel_find accel_find_arm +#define accel_init_machine accel_init_machine_arm +#define accel_type accel_type_arm +#define access_with_adjusted_size access_with_adjusted_size_arm +#define add128 add128_arm +#define add16_sat add16_sat_arm +#define add16_usat add16_usat_arm +#define add192 add192_arm +#define add8_sat add8_sat_arm +#define add8_usat add8_usat_arm +#define add_cpreg_to_hashtable add_cpreg_to_hashtable_arm +#define add_cpreg_to_list add_cpreg_to_list_arm +#define addFloat128Sigs addFloat128Sigs_arm +#define addFloat32Sigs addFloat32Sigs_arm +#define addFloat64Sigs addFloat64Sigs_arm +#define addFloatx80Sigs addFloatx80Sigs_arm +#define add_qemu_ldst_label add_qemu_ldst_label_arm +#define address_space_access_valid address_space_access_valid_arm +#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_arm +#define address_space_destroy address_space_destroy_arm +#define address_space_destroy_dispatch address_space_destroy_dispatch_arm +#define address_space_get_flatview address_space_get_flatview_arm +#define address_space_init address_space_init_arm +#define address_space_init_dispatch address_space_init_dispatch_arm +#define address_space_lookup_region address_space_lookup_region_arm +#define address_space_map address_space_map_arm +#define address_space_read address_space_read_arm +#define address_space_rw address_space_rw_arm +#define address_space_translate address_space_translate_arm +#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm +#define address_space_translate_internal address_space_translate_internal_arm +#define address_space_unmap address_space_unmap_arm +#define address_space_update_ioeventfds address_space_update_ioeventfds_arm +#define address_space_update_topology address_space_update_topology_arm +#define address_space_update_topology_pass address_space_update_topology_pass_arm +#define address_space_write address_space_write_arm +#define addrrange_contains addrrange_contains_arm +#define addrrange_end addrrange_end_arm +#define addrrange_equal addrrange_equal_arm +#define addrrange_intersection addrrange_intersection_arm +#define addrrange_intersects addrrange_intersects_arm +#define addrrange_make addrrange_make_arm +#define addrrange_shift addrrange_shift_arm +#define adjust_endianness adjust_endianness_arm +#define AES_cbc_encrypt AES_cbc_encrypt_arm +#define AES_decrypt AES_decrypt_arm +#define AES_encrypt AES_encrypt_arm +#define AES_imc AES_imc_arm +#define AES_set_decrypt_key AES_set_decrypt_key_arm +#define AES_set_encrypt_key AES_set_encrypt_key_arm +#define all_helpers all_helpers_arm +#define alloc_code_gen_buffer alloc_code_gen_buffer_arm +#define alloc_entry alloc_entry_arm +#define always_true always_true_arm +#define arm1026_initfn arm1026_initfn_arm +#define arm1136_initfn arm1136_initfn_arm +#define arm1136_r2_initfn arm1136_r2_initfn_arm +#define arm1176_initfn arm1176_initfn_arm +#define arm11mpcore_initfn arm11mpcore_initfn_arm +#define arm926_initfn arm926_initfn_arm +#define arm946_initfn arm946_initfn_arm +#define arm_ccnt_enabled arm_ccnt_enabled_arm +#define arm_cp_read_zero arm_cp_read_zero_arm +#define arm_cp_reset_ignore arm_cp_reset_ignore_arm +#define arm_cpu_do_interrupt arm_cpu_do_interrupt_arm +#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_arm +#define arm_cpu_finalizefn arm_cpu_finalizefn_arm +#define arm_cpu_get_phys_page_debug arm_cpu_get_phys_page_debug_arm +#define arm_cpu_handle_mmu_fault arm_cpu_handle_mmu_fault_arm +#define arm_cpu_initfn arm_cpu_initfn_arm +#define arm_cpu_list arm_cpu_list_arm +#define cpu_loop_exit cpu_loop_exit_arm +#define arm_cpu_post_init arm_cpu_post_init_arm +#define arm_cpu_realizefn arm_cpu_realizefn_arm +#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_arm +#define arm_cpu_register_types arm_cpu_register_types_arm +#define cpu_resume_from_signal cpu_resume_from_signal_arm +#define arm_cpus arm_cpus_arm +#define arm_cpu_set_pc arm_cpu_set_pc_arm +#define arm_cp_write_ignore arm_cp_write_ignore_arm +#define arm_current_el arm_current_el_arm +#define arm_dc_feature arm_dc_feature_arm +#define arm_debug_excp_handler arm_debug_excp_handler_arm +#define arm_debug_target_el arm_debug_target_el_arm +#define arm_el_is_aa64 arm_el_is_aa64_arm +#define arm_env_get_cpu arm_env_get_cpu_arm +#define arm_excp_target_el arm_excp_target_el_arm +#define arm_excp_unmasked arm_excp_unmasked_arm +#define arm_feature arm_feature_arm +#define arm_generate_debug_exceptions arm_generate_debug_exceptions_arm +#define gen_intermediate_code gen_intermediate_code_arm +#define gen_intermediate_code_pc gen_intermediate_code_pc_arm +#define arm_gen_test_cc arm_gen_test_cc_arm +#define arm_gt_ptimer_cb arm_gt_ptimer_cb_arm +#define arm_gt_vtimer_cb arm_gt_vtimer_cb_arm +#define arm_handle_psci_call arm_handle_psci_call_arm +#define arm_is_psci_call arm_is_psci_call_arm +#define arm_is_secure arm_is_secure_arm +#define arm_is_secure_below_el3 arm_is_secure_below_el3_arm +#define arm_ldl_code arm_ldl_code_arm +#define arm_lduw_code arm_lduw_code_arm +#define arm_log_exception arm_log_exception_arm +#define arm_reg_read arm_reg_read_arm +#define arm_reg_reset arm_reg_reset_arm +#define arm_reg_write arm_reg_write_arm +#define restore_state_to_opc restore_state_to_opc_arm +#define arm_rmode_to_sf arm_rmode_to_sf_arm +#define arm_singlestep_active arm_singlestep_active_arm +#define tlb_fill tlb_fill_arm +#define tlb_flush tlb_flush_arm +#define tlb_flush_page tlb_flush_page_arm +#define tlb_set_page tlb_set_page_arm +#define arm_translate_init arm_translate_init_arm +#define arm_v7m_class_init arm_v7m_class_init_arm +#define arm_v7m_cpu_do_interrupt arm_v7m_cpu_do_interrupt_arm +#define ats_access ats_access_arm +#define ats_write ats_write_arm +#define bad_mode_switch bad_mode_switch_arm +#define bank_number bank_number_arm +#define bitmap_find_next_zero_area bitmap_find_next_zero_area_arm +#define bitmap_zero_extend bitmap_zero_extend_arm +#define bp_wp_matches bp_wp_matches_arm +#define breakpoint_invalidate breakpoint_invalidate_arm +#define build_page_bitmap build_page_bitmap_arm +#define bus_add_child bus_add_child_arm +#define bus_class_init bus_class_init_arm +#define bus_info bus_info_arm +#define bus_unparent bus_unparent_arm +#define cache_block_ops_cp_reginfo cache_block_ops_cp_reginfo_arm +#define cache_dirty_status_cp_reginfo cache_dirty_status_cp_reginfo_arm +#define cache_test_clean_cp_reginfo cache_test_clean_cp_reginfo_arm +#define call_recip_estimate call_recip_estimate_arm +#define can_merge can_merge_arm +#define capacity_increase capacity_increase_arm +#define ccsidr_read ccsidr_read_arm +#define check_ap check_ap_arm +#define check_breakpoints check_breakpoints_arm +#define check_watchpoints check_watchpoints_arm +#define cho cho_arm +#define clear_bit clear_bit_arm +#define clz32 clz32_arm +#define clz64 clz64_arm +#define cmp_flatrange_addr cmp_flatrange_addr_arm +#define code_gen_alloc code_gen_alloc_arm +#define commonNaNToFloat128 commonNaNToFloat128_arm +#define commonNaNToFloat16 commonNaNToFloat16_arm +#define commonNaNToFloat32 commonNaNToFloat32_arm +#define commonNaNToFloat64 commonNaNToFloat64_arm +#define commonNaNToFloatx80 commonNaNToFloatx80_arm +#define compute_abs_deadline compute_abs_deadline_arm +#define cond_name cond_name_arm +#define configure_accelerator configure_accelerator_arm +#define container_get container_get_arm +#define container_info container_info_arm +#define container_register_types container_register_types_arm +#define contextidr_write contextidr_write_arm +#define core_log_global_start core_log_global_start_arm +#define core_log_global_stop core_log_global_stop_arm +#define core_memory_listener core_memory_listener_arm +#define cortexa15_cp_reginfo cortexa15_cp_reginfo_arm +#define cortex_a15_initfn cortex_a15_initfn_arm +#define cortexa8_cp_reginfo cortexa8_cp_reginfo_arm +#define cortex_a8_initfn cortex_a8_initfn_arm +#define cortexa9_cp_reginfo cortexa9_cp_reginfo_arm +#define cortex_a9_initfn cortex_a9_initfn_arm +#define cortex_m3_initfn cortex_m3_initfn_arm +#define count_cpreg count_cpreg_arm +#define countLeadingZeros32 countLeadingZeros32_arm +#define countLeadingZeros64 countLeadingZeros64_arm +#define count_opts_list count_opts_list_arm +#define cp_access_ok cp_access_ok_arm +#define cpacr_write cpacr_write_arm +#define cpreg_field_is_64bit cpreg_field_is_64bit_arm +#define cp_reginfo cp_reginfo_arm +#define cpreg_key_compare cpreg_key_compare_arm +#define cpreg_make_keylist cpreg_make_keylist_arm +#define cp_reg_reset cp_reg_reset_arm +#define cpreg_to_kvm_id cpreg_to_kvm_id_arm +#define cpsr_read cpsr_read_arm +#define cpsr_write cpsr_write_arm +#define cptype_valid cptype_valid_arm +#define cpu_abort cpu_abort_arm +#define cpu_arm_exec cpu_arm_exec_arm +#define cpu_arm_gen_code cpu_arm_gen_code_arm +#define cpu_arm_init cpu_arm_init_arm +#define cpu_breakpoint_insert cpu_breakpoint_insert_arm +#define cpu_breakpoint_remove cpu_breakpoint_remove_arm +#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_arm +#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_arm +#define cpu_can_do_io cpu_can_do_io_arm +#define cpu_can_run cpu_can_run_arm +#define cpu_class_init cpu_class_init_arm +#define cpu_common_class_by_name cpu_common_class_by_name_arm +#define cpu_common_exec_interrupt cpu_common_exec_interrupt_arm +#define cpu_common_get_arch_id cpu_common_get_arch_id_arm +#define cpu_common_get_memory_mapping cpu_common_get_memory_mapping_arm +#define cpu_common_get_paging_enabled cpu_common_get_paging_enabled_arm +#define cpu_common_has_work cpu_common_has_work_arm +#define cpu_common_initfn cpu_common_initfn_arm +#define cpu_common_noop cpu_common_noop_arm +#define cpu_common_parse_features cpu_common_parse_features_arm +#define cpu_common_realizefn cpu_common_realizefn_arm +#define cpu_common_reset cpu_common_reset_arm +#define cpu_dump_statistics cpu_dump_statistics_arm +#define cpu_exec_init cpu_exec_init_arm +#define cpu_flush_icache_range cpu_flush_icache_range_arm +#define cpu_gen_init cpu_gen_init_arm +#define cpu_get_clock cpu_get_clock_arm +#define cpu_get_real_ticks cpu_get_real_ticks_arm +#define cpu_get_tb_cpu_state cpu_get_tb_cpu_state_arm +#define cpu_handle_debug_exception cpu_handle_debug_exception_arm +#define cpu_handle_guest_debug cpu_handle_guest_debug_arm +#define cpu_inb cpu_inb_arm +#define cpu_inl cpu_inl_arm +#define cpu_interrupt cpu_interrupt_arm +#define cpu_interrupt_handler cpu_interrupt_handler_arm +#define cpu_inw cpu_inw_arm +#define cpu_io_recompile cpu_io_recompile_arm +#define cpu_is_stopped cpu_is_stopped_arm +#define cpu_ldl_code cpu_ldl_code_arm +#define cpu_ldub_code cpu_ldub_code_arm +#define cpu_lduw_code cpu_lduw_code_arm +#define cpu_memory_rw_debug cpu_memory_rw_debug_arm +#define cpu_mmu_index cpu_mmu_index_arm +#define cpu_outb cpu_outb_arm +#define cpu_outl cpu_outl_arm +#define cpu_outw cpu_outw_arm +#define cpu_physical_memory_clear_dirty_range cpu_physical_memory_clear_dirty_range_arm +#define cpu_physical_memory_get_clean cpu_physical_memory_get_clean_arm +#define cpu_physical_memory_get_dirty cpu_physical_memory_get_dirty_arm +#define cpu_physical_memory_get_dirty_flag cpu_physical_memory_get_dirty_flag_arm +#define cpu_physical_memory_is_clean cpu_physical_memory_is_clean_arm +#define cpu_physical_memory_is_io cpu_physical_memory_is_io_arm +#define cpu_physical_memory_map cpu_physical_memory_map_arm +#define cpu_physical_memory_range_includes_clean cpu_physical_memory_range_includes_clean_arm +#define cpu_physical_memory_reset_dirty cpu_physical_memory_reset_dirty_arm +#define cpu_physical_memory_rw cpu_physical_memory_rw_arm +#define cpu_physical_memory_set_dirty_flag cpu_physical_memory_set_dirty_flag_arm +#define cpu_physical_memory_set_dirty_range cpu_physical_memory_set_dirty_range_arm +#define cpu_physical_memory_set_dirty_range_nocode cpu_physical_memory_set_dirty_range_nocode_arm +#define cpu_physical_memory_unmap cpu_physical_memory_unmap_arm +#define cpu_physical_memory_write_rom cpu_physical_memory_write_rom_arm +#define cpu_physical_memory_write_rom_internal cpu_physical_memory_write_rom_internal_arm +#define cpu_register cpu_register_arm +#define cpu_register_types cpu_register_types_arm +#define cpu_restore_state cpu_restore_state_arm +#define cpu_restore_state_from_tb cpu_restore_state_from_tb_arm +#define cpu_single_step cpu_single_step_arm +#define cpu_tb_exec cpu_tb_exec_arm +#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_arm +#define cpu_to_be64 cpu_to_be64_arm +#define cpu_to_le32 cpu_to_le32_arm +#define cpu_to_le64 cpu_to_le64_arm +#define cpu_type_info cpu_type_info_arm +#define cpu_unassigned_access cpu_unassigned_access_arm +#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_arm +#define cpu_watchpoint_insert cpu_watchpoint_insert_arm +#define cpu_watchpoint_remove cpu_watchpoint_remove_arm +#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_arm +#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_arm +#define crc32c_table crc32c_table_arm +#define create_new_memory_mapping create_new_memory_mapping_arm +#define csselr_write csselr_write_arm +#define cto32 cto32_arm +#define ctr_el0_access ctr_el0_access_arm +#define ctz32 ctz32_arm +#define ctz64 ctz64_arm +#define dacr_write dacr_write_arm +#define dbgbcr_write dbgbcr_write_arm +#define dbgbvr_write dbgbvr_write_arm +#define dbgwcr_write dbgwcr_write_arm +#define dbgwvr_write dbgwvr_write_arm +#define debug_cp_reginfo debug_cp_reginfo_arm +#define debug_frame debug_frame_arm +#define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_arm +#define define_arm_cp_regs define_arm_cp_regs_arm +#define define_arm_cp_regs_with_opaque define_arm_cp_regs_with_opaque_arm +#define define_debug_regs define_debug_regs_arm +#define define_one_arm_cp_reg define_one_arm_cp_reg_arm +#define define_one_arm_cp_reg_with_opaque define_one_arm_cp_reg_with_opaque_arm +#define deposit32 deposit32_arm +#define deposit64 deposit64_arm +#define deregister_tm_clones deregister_tm_clones_arm +#define device_class_base_init device_class_base_init_arm +#define device_class_init device_class_init_arm +#define device_finalize device_finalize_arm +#define device_get_realized device_get_realized_arm +#define device_initfn device_initfn_arm +#define device_post_init device_post_init_arm +#define device_reset device_reset_arm +#define device_set_realized device_set_realized_arm +#define device_type_info device_type_info_arm +#define disas_arm_insn disas_arm_insn_arm +#define disas_coproc_insn disas_coproc_insn_arm +#define disas_dsp_insn disas_dsp_insn_arm +#define disas_iwmmxt_insn disas_iwmmxt_insn_arm +#define disas_neon_data_insn disas_neon_data_insn_arm +#define disas_neon_ls_insn disas_neon_ls_insn_arm +#define disas_thumb2_insn disas_thumb2_insn_arm +#define disas_thumb_insn disas_thumb_insn_arm +#define disas_vfp_insn disas_vfp_insn_arm +#define disas_vfp_v8_insn disas_vfp_v8_insn_arm +#define do_arm_semihosting do_arm_semihosting_arm +#define do_clz16 do_clz16_arm +#define do_clz8 do_clz8_arm +#define do_constant_folding do_constant_folding_arm +#define do_constant_folding_2 do_constant_folding_2_arm +#define do_constant_folding_cond do_constant_folding_cond_arm +#define do_constant_folding_cond2 do_constant_folding_cond2_arm +#define do_constant_folding_cond_32 do_constant_folding_cond_32_arm +#define do_constant_folding_cond_64 do_constant_folding_cond_64_arm +#define do_constant_folding_cond_eq do_constant_folding_cond_eq_arm +#define do_fcvt_f16_to_f32 do_fcvt_f16_to_f32_arm +#define do_fcvt_f32_to_f16 do_fcvt_f32_to_f16_arm +#define do_ssat do_ssat_arm +#define do_usad do_usad_arm +#define do_usat do_usat_arm +#define do_v7m_exception_exit do_v7m_exception_exit_arm +#define dummy_c15_cp_reginfo dummy_c15_cp_reginfo_arm +#define dummy_func dummy_func_arm +#define dummy_section dummy_section_arm +#define _DYNAMIC _DYNAMIC_arm +#define _edata _edata_arm +#define _end _end_arm +#define end_list end_list_arm +#define eq128 eq128_arm +#define ErrorClass_lookup ErrorClass_lookup_arm +#define error_copy error_copy_arm +#define error_exit error_exit_arm +#define error_get_class error_get_class_arm +#define error_get_pretty error_get_pretty_arm +#define error_setg_file_open error_setg_file_open_arm +#define estimateDiv128To64 estimateDiv128To64_arm +#define estimateSqrt32 estimateSqrt32_arm +#define excnames excnames_arm +#define excp_is_internal excp_is_internal_arm +#define extended_addresses_enabled extended_addresses_enabled_arm +#define extended_mpu_ap_bits extended_mpu_ap_bits_arm +#define extract32 extract32_arm +#define extract64 extract64_arm +#define extractFloat128Exp extractFloat128Exp_arm +#define extractFloat128Frac0 extractFloat128Frac0_arm +#define extractFloat128Frac1 extractFloat128Frac1_arm +#define extractFloat128Sign extractFloat128Sign_arm +#define extractFloat16Exp extractFloat16Exp_arm +#define extractFloat16Frac extractFloat16Frac_arm +#define extractFloat16Sign extractFloat16Sign_arm +#define extractFloat32Exp extractFloat32Exp_arm +#define extractFloat32Frac extractFloat32Frac_arm +#define extractFloat32Sign extractFloat32Sign_arm +#define extractFloat64Exp extractFloat64Exp_arm +#define extractFloat64Frac extractFloat64Frac_arm +#define extractFloat64Sign extractFloat64Sign_arm +#define extractFloatx80Exp extractFloatx80Exp_arm +#define extractFloatx80Frac extractFloatx80Frac_arm +#define extractFloatx80Sign extractFloatx80Sign_arm +#define fcntl_setfl fcntl_setfl_arm +#define fcse_write fcse_write_arm +#define find_better_copy find_better_copy_arm +#define find_default_machine find_default_machine_arm +#define find_desc_by_name find_desc_by_name_arm +#define find_first_bit find_first_bit_arm +#define find_last_bit find_last_bit_arm +#define find_paging_enabled_cpu find_paging_enabled_cpu_arm +#define find_ram_block find_ram_block_arm +#define find_ram_offset find_ram_offset_arm +#define find_string find_string_arm +#define find_type find_type_arm +#define _fini _fini_arm +#define flatrange_equal flatrange_equal_arm +#define flatview_destroy flatview_destroy_arm +#define flatview_init flatview_init_arm +#define flatview_insert flatview_insert_arm +#define flatview_lookup flatview_lookup_arm +#define flatview_ref flatview_ref_arm +#define flatview_simplify flatview_simplify_arm +#define flatview_unref flatview_unref_arm +#define float128_add float128_add_arm +#define float128_compare float128_compare_arm +#define float128_compare_internal float128_compare_internal_arm +#define float128_compare_quiet float128_compare_quiet_arm +#define float128_default_nan float128_default_nan_arm +#define float128_div float128_div_arm +#define float128_eq float128_eq_arm +#define float128_eq_quiet float128_eq_quiet_arm +#define float128_is_quiet_nan float128_is_quiet_nan_arm +#define float128_is_signaling_nan float128_is_signaling_nan_arm +#define float128_le float128_le_arm +#define float128_le_quiet float128_le_quiet_arm +#define float128_lt float128_lt_arm +#define float128_lt_quiet float128_lt_quiet_arm +#define float128_maybe_silence_nan float128_maybe_silence_nan_arm +#define float128_mul float128_mul_arm +#define float128_rem float128_rem_arm +#define float128_round_to_int float128_round_to_int_arm +#define float128_scalbn float128_scalbn_arm +#define float128_sqrt float128_sqrt_arm +#define float128_sub float128_sub_arm +#define float128ToCommonNaN float128ToCommonNaN_arm +#define float128_to_float32 float128_to_float32_arm +#define float128_to_float64 float128_to_float64_arm +#define float128_to_floatx80 float128_to_floatx80_arm +#define float128_to_int32 float128_to_int32_arm +#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_arm +#define float128_to_int64 float128_to_int64_arm +#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_arm +#define float128_unordered float128_unordered_arm +#define float128_unordered_quiet float128_unordered_quiet_arm +#define float16_default_nan float16_default_nan_arm +#define float16_is_quiet_nan float16_is_quiet_nan_arm +#define float16_is_signaling_nan float16_is_signaling_nan_arm +#define float16_maybe_silence_nan float16_maybe_silence_nan_arm +#define float16ToCommonNaN float16ToCommonNaN_arm +#define float16_to_float32 float16_to_float32_arm +#define float16_to_float64 float16_to_float64_arm +#define float32_abs float32_abs_arm +#define float32_add float32_add_arm +#define float32_chs float32_chs_arm +#define float32_compare float32_compare_arm +#define float32_compare_internal float32_compare_internal_arm +#define float32_compare_quiet float32_compare_quiet_arm +#define float32_default_nan float32_default_nan_arm +#define float32_div float32_div_arm +#define float32_eq float32_eq_arm +#define float32_eq_quiet float32_eq_quiet_arm +#define float32_exp2 float32_exp2_arm +#define float32_exp2_coefficients float32_exp2_coefficients_arm +#define float32_is_any_nan float32_is_any_nan_arm +#define float32_is_infinity float32_is_infinity_arm +#define float32_is_neg float32_is_neg_arm +#define float32_is_quiet_nan float32_is_quiet_nan_arm +#define float32_is_signaling_nan float32_is_signaling_nan_arm +#define float32_is_zero float32_is_zero_arm +#define float32_is_zero_or_denormal float32_is_zero_or_denormal_arm +#define float32_le float32_le_arm +#define float32_le_quiet float32_le_quiet_arm +#define float32_log2 float32_log2_arm +#define float32_lt float32_lt_arm +#define float32_lt_quiet float32_lt_quiet_arm +#define float32_max float32_max_arm +#define float32_maxnum float32_maxnum_arm +#define float32_maxnummag float32_maxnummag_arm +#define float32_maybe_silence_nan float32_maybe_silence_nan_arm +#define float32_min float32_min_arm +#define float32_minmax float32_minmax_arm +#define float32_minnum float32_minnum_arm +#define float32_minnummag float32_minnummag_arm +#define float32_mul float32_mul_arm +#define float32_muladd float32_muladd_arm +#define float32_rem float32_rem_arm +#define float32_round_to_int float32_round_to_int_arm +#define float32_scalbn float32_scalbn_arm +#define float32_set_sign float32_set_sign_arm +#define float32_sqrt float32_sqrt_arm +#define float32_squash_input_denormal float32_squash_input_denormal_arm +#define float32_sub float32_sub_arm +#define float32ToCommonNaN float32ToCommonNaN_arm +#define float32_to_float128 float32_to_float128_arm +#define float32_to_float16 float32_to_float16_arm +#define float32_to_float64 float32_to_float64_arm +#define float32_to_floatx80 float32_to_floatx80_arm +#define float32_to_int16 float32_to_int16_arm +#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_arm +#define float32_to_int32 float32_to_int32_arm +#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_arm +#define float32_to_int64 float32_to_int64_arm +#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_arm +#define float32_to_uint16 float32_to_uint16_arm +#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_arm +#define float32_to_uint32 float32_to_uint32_arm +#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_arm +#define float32_to_uint64 float32_to_uint64_arm +#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_arm +#define float32_unordered float32_unordered_arm +#define float32_unordered_quiet float32_unordered_quiet_arm +#define float64_abs float64_abs_arm +#define float64_add float64_add_arm +#define float64_chs float64_chs_arm +#define float64_compare float64_compare_arm +#define float64_compare_internal float64_compare_internal_arm +#define float64_compare_quiet float64_compare_quiet_arm +#define float64_default_nan float64_default_nan_arm +#define float64_div float64_div_arm +#define float64_eq float64_eq_arm +#define float64_eq_quiet float64_eq_quiet_arm +#define float64_is_any_nan float64_is_any_nan_arm +#define float64_is_infinity float64_is_infinity_arm +#define float64_is_neg float64_is_neg_arm +#define float64_is_quiet_nan float64_is_quiet_nan_arm +#define float64_is_signaling_nan float64_is_signaling_nan_arm +#define float64_is_zero float64_is_zero_arm +#define float64_le float64_le_arm +#define float64_le_quiet float64_le_quiet_arm +#define float64_log2 float64_log2_arm +#define float64_lt float64_lt_arm +#define float64_lt_quiet float64_lt_quiet_arm +#define float64_max float64_max_arm +#define float64_maxnum float64_maxnum_arm +#define float64_maxnummag float64_maxnummag_arm +#define float64_maybe_silence_nan float64_maybe_silence_nan_arm +#define float64_min float64_min_arm +#define float64_minmax float64_minmax_arm +#define float64_minnum float64_minnum_arm +#define float64_minnummag float64_minnummag_arm +#define float64_mul float64_mul_arm +#define float64_muladd float64_muladd_arm +#define float64_rem float64_rem_arm +#define float64_round_to_int float64_round_to_int_arm +#define float64_scalbn float64_scalbn_arm +#define float64_set_sign float64_set_sign_arm +#define float64_sqrt float64_sqrt_arm +#define float64_squash_input_denormal float64_squash_input_denormal_arm +#define float64_sub float64_sub_arm +#define float64ToCommonNaN float64ToCommonNaN_arm +#define float64_to_float128 float64_to_float128_arm +#define float64_to_float16 float64_to_float16_arm +#define float64_to_float32 float64_to_float32_arm +#define float64_to_floatx80 float64_to_floatx80_arm +#define float64_to_int16 float64_to_int16_arm +#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_arm +#define float64_to_int32 float64_to_int32_arm +#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_arm +#define float64_to_int64 float64_to_int64_arm +#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_arm +#define float64_to_uint16 float64_to_uint16_arm +#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_arm +#define float64_to_uint32 float64_to_uint32_arm +#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_arm +#define float64_to_uint64 float64_to_uint64_arm +#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_arm +#define float64_trunc_to_int float64_trunc_to_int_arm +#define float64_unordered float64_unordered_arm +#define float64_unordered_quiet float64_unordered_quiet_arm +#define float_raise float_raise_arm +#define floatx80_add floatx80_add_arm +#define floatx80_compare floatx80_compare_arm +#define floatx80_compare_internal floatx80_compare_internal_arm +#define floatx80_compare_quiet floatx80_compare_quiet_arm +#define floatx80_default_nan floatx80_default_nan_arm +#define floatx80_div floatx80_div_arm +#define floatx80_eq floatx80_eq_arm +#define floatx80_eq_quiet floatx80_eq_quiet_arm +#define floatx80_is_quiet_nan floatx80_is_quiet_nan_arm +#define floatx80_is_signaling_nan floatx80_is_signaling_nan_arm +#define floatx80_le floatx80_le_arm +#define floatx80_le_quiet floatx80_le_quiet_arm +#define floatx80_lt floatx80_lt_arm +#define floatx80_lt_quiet floatx80_lt_quiet_arm +#define floatx80_maybe_silence_nan floatx80_maybe_silence_nan_arm +#define floatx80_mul floatx80_mul_arm +#define floatx80_rem floatx80_rem_arm +#define floatx80_round_to_int floatx80_round_to_int_arm +#define floatx80_scalbn floatx80_scalbn_arm +#define floatx80_sqrt floatx80_sqrt_arm +#define floatx80_sub floatx80_sub_arm +#define floatx80ToCommonNaN floatx80ToCommonNaN_arm +#define floatx80_to_float128 floatx80_to_float128_arm +#define floatx80_to_float32 floatx80_to_float32_arm +#define floatx80_to_float64 floatx80_to_float64_arm +#define floatx80_to_int32 floatx80_to_int32_arm +#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_arm +#define floatx80_to_int64 floatx80_to_int64_arm +#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_arm +#define floatx80_unordered floatx80_unordered_arm +#define floatx80_unordered_quiet floatx80_unordered_quiet_arm +#define flush_icache_range flush_icache_range_arm +#define format_string format_string_arm +#define fp_decode_rm fp_decode_rm_arm +#define frame_dummy frame_dummy_arm +#define free_range free_range_arm +#define fstat64 fstat64_arm +#define futex_wait futex_wait_arm +#define futex_wake futex_wake_arm +#define gen_aa32_ld16s gen_aa32_ld16s_arm +#define gen_aa32_ld16u gen_aa32_ld16u_arm +#define gen_aa32_ld32u gen_aa32_ld32u_arm +#define gen_aa32_ld64 gen_aa32_ld64_arm +#define gen_aa32_ld8s gen_aa32_ld8s_arm +#define gen_aa32_ld8u gen_aa32_ld8u_arm +#define gen_aa32_st16 gen_aa32_st16_arm +#define gen_aa32_st32 gen_aa32_st32_arm +#define gen_aa32_st64 gen_aa32_st64_arm +#define gen_aa32_st8 gen_aa32_st8_arm +#define gen_adc gen_adc_arm +#define gen_adc_CC gen_adc_CC_arm +#define gen_add16 gen_add16_arm +#define gen_add_carry gen_add_carry_arm +#define gen_add_CC gen_add_CC_arm +#define gen_add_datah_offset gen_add_datah_offset_arm +#define gen_add_data_offset gen_add_data_offset_arm +#define gen_addq gen_addq_arm +#define gen_addq_lo gen_addq_lo_arm +#define gen_addq_msw gen_addq_msw_arm +#define gen_arm_parallel_addsub gen_arm_parallel_addsub_arm +#define gen_arm_shift_im gen_arm_shift_im_arm +#define gen_arm_shift_reg gen_arm_shift_reg_arm +#define gen_bx gen_bx_arm +#define gen_bx_im gen_bx_im_arm +#define gen_clrex gen_clrex_arm +#define generate_memory_topology generate_memory_topology_arm +#define generic_timer_cp_reginfo generic_timer_cp_reginfo_arm +#define gen_exception gen_exception_arm +#define gen_exception_insn gen_exception_insn_arm +#define gen_exception_internal gen_exception_internal_arm +#define gen_exception_internal_insn gen_exception_internal_insn_arm +#define gen_exception_return gen_exception_return_arm +#define gen_goto_tb gen_goto_tb_arm +#define gen_helper_access_check_cp_reg gen_helper_access_check_cp_reg_arm +#define gen_helper_add_saturate gen_helper_add_saturate_arm +#define gen_helper_add_setq gen_helper_add_setq_arm +#define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_arm +#define gen_helper_clz32 gen_helper_clz32_arm +#define gen_helper_clz64 gen_helper_clz64_arm +#define gen_helper_clz_arm gen_helper_clz_arm_arm +#define gen_helper_cpsr_read gen_helper_cpsr_read_arm +#define gen_helper_cpsr_write gen_helper_cpsr_write_arm +#define gen_helper_crc32_arm gen_helper_crc32_arm_arm +#define gen_helper_crc32c gen_helper_crc32c_arm +#define gen_helper_crypto_aese gen_helper_crypto_aese_arm +#define gen_helper_crypto_aesmc gen_helper_crypto_aesmc_arm +#define gen_helper_crypto_sha1_3reg gen_helper_crypto_sha1_3reg_arm +#define gen_helper_crypto_sha1h gen_helper_crypto_sha1h_arm +#define gen_helper_crypto_sha1su1 gen_helper_crypto_sha1su1_arm +#define gen_helper_crypto_sha256h gen_helper_crypto_sha256h_arm +#define gen_helper_crypto_sha256h2 gen_helper_crypto_sha256h2_arm +#define gen_helper_crypto_sha256su0 gen_helper_crypto_sha256su0_arm +#define gen_helper_crypto_sha256su1 gen_helper_crypto_sha256su1_arm +#define gen_helper_double_saturate gen_helper_double_saturate_arm +#define gen_helper_exception_internal gen_helper_exception_internal_arm +#define gen_helper_exception_with_syndrome gen_helper_exception_with_syndrome_arm +#define gen_helper_get_cp_reg gen_helper_get_cp_reg_arm +#define gen_helper_get_cp_reg64 gen_helper_get_cp_reg64_arm +#define gen_helper_get_r13_banked gen_helper_get_r13_banked_arm +#define gen_helper_get_user_reg gen_helper_get_user_reg_arm +#define gen_helper_iwmmxt_addcb gen_helper_iwmmxt_addcb_arm +#define gen_helper_iwmmxt_addcl gen_helper_iwmmxt_addcl_arm +#define gen_helper_iwmmxt_addcw gen_helper_iwmmxt_addcw_arm +#define gen_helper_iwmmxt_addnb gen_helper_iwmmxt_addnb_arm +#define gen_helper_iwmmxt_addnl gen_helper_iwmmxt_addnl_arm +#define gen_helper_iwmmxt_addnw gen_helper_iwmmxt_addnw_arm +#define gen_helper_iwmmxt_addsb gen_helper_iwmmxt_addsb_arm +#define gen_helper_iwmmxt_addsl gen_helper_iwmmxt_addsl_arm +#define gen_helper_iwmmxt_addsw gen_helper_iwmmxt_addsw_arm +#define gen_helper_iwmmxt_addub gen_helper_iwmmxt_addub_arm +#define gen_helper_iwmmxt_addul gen_helper_iwmmxt_addul_arm +#define gen_helper_iwmmxt_adduw gen_helper_iwmmxt_adduw_arm +#define gen_helper_iwmmxt_align gen_helper_iwmmxt_align_arm +#define gen_helper_iwmmxt_avgb0 gen_helper_iwmmxt_avgb0_arm +#define gen_helper_iwmmxt_avgb1 gen_helper_iwmmxt_avgb1_arm +#define gen_helper_iwmmxt_avgw0 gen_helper_iwmmxt_avgw0_arm +#define gen_helper_iwmmxt_avgw1 gen_helper_iwmmxt_avgw1_arm +#define gen_helper_iwmmxt_bcstb gen_helper_iwmmxt_bcstb_arm +#define gen_helper_iwmmxt_bcstl gen_helper_iwmmxt_bcstl_arm +#define gen_helper_iwmmxt_bcstw gen_helper_iwmmxt_bcstw_arm +#define gen_helper_iwmmxt_cmpeqb gen_helper_iwmmxt_cmpeqb_arm +#define gen_helper_iwmmxt_cmpeql gen_helper_iwmmxt_cmpeql_arm +#define gen_helper_iwmmxt_cmpeqw gen_helper_iwmmxt_cmpeqw_arm +#define gen_helper_iwmmxt_cmpgtsb gen_helper_iwmmxt_cmpgtsb_arm +#define gen_helper_iwmmxt_cmpgtsl gen_helper_iwmmxt_cmpgtsl_arm +#define gen_helper_iwmmxt_cmpgtsw gen_helper_iwmmxt_cmpgtsw_arm +#define gen_helper_iwmmxt_cmpgtub gen_helper_iwmmxt_cmpgtub_arm +#define gen_helper_iwmmxt_cmpgtul gen_helper_iwmmxt_cmpgtul_arm +#define gen_helper_iwmmxt_cmpgtuw gen_helper_iwmmxt_cmpgtuw_arm +#define gen_helper_iwmmxt_insr gen_helper_iwmmxt_insr_arm +#define gen_helper_iwmmxt_macsw gen_helper_iwmmxt_macsw_arm +#define gen_helper_iwmmxt_macuw gen_helper_iwmmxt_macuw_arm +#define gen_helper_iwmmxt_maddsq gen_helper_iwmmxt_maddsq_arm +#define gen_helper_iwmmxt_madduq gen_helper_iwmmxt_madduq_arm +#define gen_helper_iwmmxt_maxsb gen_helper_iwmmxt_maxsb_arm +#define gen_helper_iwmmxt_maxsl gen_helper_iwmmxt_maxsl_arm +#define gen_helper_iwmmxt_maxsw gen_helper_iwmmxt_maxsw_arm +#define gen_helper_iwmmxt_maxub gen_helper_iwmmxt_maxub_arm +#define gen_helper_iwmmxt_maxul gen_helper_iwmmxt_maxul_arm +#define gen_helper_iwmmxt_maxuw gen_helper_iwmmxt_maxuw_arm +#define gen_helper_iwmmxt_minsb gen_helper_iwmmxt_minsb_arm +#define gen_helper_iwmmxt_minsl gen_helper_iwmmxt_minsl_arm +#define gen_helper_iwmmxt_minsw gen_helper_iwmmxt_minsw_arm +#define gen_helper_iwmmxt_minub gen_helper_iwmmxt_minub_arm +#define gen_helper_iwmmxt_minul gen_helper_iwmmxt_minul_arm +#define gen_helper_iwmmxt_minuw gen_helper_iwmmxt_minuw_arm +#define gen_helper_iwmmxt_msbb gen_helper_iwmmxt_msbb_arm +#define gen_helper_iwmmxt_msbl gen_helper_iwmmxt_msbl_arm +#define gen_helper_iwmmxt_msbw gen_helper_iwmmxt_msbw_arm +#define gen_helper_iwmmxt_muladdsl gen_helper_iwmmxt_muladdsl_arm +#define gen_helper_iwmmxt_muladdsw gen_helper_iwmmxt_muladdsw_arm +#define gen_helper_iwmmxt_muladdswl gen_helper_iwmmxt_muladdswl_arm +#define gen_helper_iwmmxt_mulshw gen_helper_iwmmxt_mulshw_arm +#define gen_helper_iwmmxt_mulslw gen_helper_iwmmxt_mulslw_arm +#define gen_helper_iwmmxt_muluhw gen_helper_iwmmxt_muluhw_arm +#define gen_helper_iwmmxt_mululw gen_helper_iwmmxt_mululw_arm +#define gen_helper_iwmmxt_packsl gen_helper_iwmmxt_packsl_arm +#define gen_helper_iwmmxt_packsq gen_helper_iwmmxt_packsq_arm +#define gen_helper_iwmmxt_packsw gen_helper_iwmmxt_packsw_arm +#define gen_helper_iwmmxt_packul gen_helper_iwmmxt_packul_arm +#define gen_helper_iwmmxt_packuq gen_helper_iwmmxt_packuq_arm +#define gen_helper_iwmmxt_packuw gen_helper_iwmmxt_packuw_arm +#define gen_helper_iwmmxt_rorl gen_helper_iwmmxt_rorl_arm +#define gen_helper_iwmmxt_rorq gen_helper_iwmmxt_rorq_arm +#define gen_helper_iwmmxt_rorw gen_helper_iwmmxt_rorw_arm +#define gen_helper_iwmmxt_sadb gen_helper_iwmmxt_sadb_arm +#define gen_helper_iwmmxt_sadw gen_helper_iwmmxt_sadw_arm +#define gen_helper_iwmmxt_setpsr_nz gen_helper_iwmmxt_setpsr_nz_arm +#define gen_helper_iwmmxt_shufh gen_helper_iwmmxt_shufh_arm +#define gen_helper_iwmmxt_slll gen_helper_iwmmxt_slll_arm +#define gen_helper_iwmmxt_sllq gen_helper_iwmmxt_sllq_arm +#define gen_helper_iwmmxt_sllw gen_helper_iwmmxt_sllw_arm +#define gen_helper_iwmmxt_sral gen_helper_iwmmxt_sral_arm +#define gen_helper_iwmmxt_sraq gen_helper_iwmmxt_sraq_arm +#define gen_helper_iwmmxt_sraw gen_helper_iwmmxt_sraw_arm +#define gen_helper_iwmmxt_srll gen_helper_iwmmxt_srll_arm +#define gen_helper_iwmmxt_srlq gen_helper_iwmmxt_srlq_arm +#define gen_helper_iwmmxt_srlw gen_helper_iwmmxt_srlw_arm +#define gen_helper_iwmmxt_subnb gen_helper_iwmmxt_subnb_arm +#define gen_helper_iwmmxt_subnl gen_helper_iwmmxt_subnl_arm +#define gen_helper_iwmmxt_subnw gen_helper_iwmmxt_subnw_arm +#define gen_helper_iwmmxt_subsb gen_helper_iwmmxt_subsb_arm +#define gen_helper_iwmmxt_subsl gen_helper_iwmmxt_subsl_arm +#define gen_helper_iwmmxt_subsw gen_helper_iwmmxt_subsw_arm +#define gen_helper_iwmmxt_subub gen_helper_iwmmxt_subub_arm +#define gen_helper_iwmmxt_subul gen_helper_iwmmxt_subul_arm +#define gen_helper_iwmmxt_subuw gen_helper_iwmmxt_subuw_arm +#define gen_helper_iwmmxt_unpackhb gen_helper_iwmmxt_unpackhb_arm +#define gen_helper_iwmmxt_unpackhl gen_helper_iwmmxt_unpackhl_arm +#define gen_helper_iwmmxt_unpackhsb gen_helper_iwmmxt_unpackhsb_arm +#define gen_helper_iwmmxt_unpackhsl gen_helper_iwmmxt_unpackhsl_arm +#define gen_helper_iwmmxt_unpackhsw gen_helper_iwmmxt_unpackhsw_arm +#define gen_helper_iwmmxt_unpackhub gen_helper_iwmmxt_unpackhub_arm +#define gen_helper_iwmmxt_unpackhul gen_helper_iwmmxt_unpackhul_arm +#define gen_helper_iwmmxt_unpackhuw gen_helper_iwmmxt_unpackhuw_arm +#define gen_helper_iwmmxt_unpackhw gen_helper_iwmmxt_unpackhw_arm +#define gen_helper_iwmmxt_unpacklb gen_helper_iwmmxt_unpacklb_arm +#define gen_helper_iwmmxt_unpackll gen_helper_iwmmxt_unpackll_arm +#define gen_helper_iwmmxt_unpacklsb gen_helper_iwmmxt_unpacklsb_arm +#define gen_helper_iwmmxt_unpacklsl gen_helper_iwmmxt_unpacklsl_arm +#define gen_helper_iwmmxt_unpacklsw gen_helper_iwmmxt_unpacklsw_arm +#define gen_helper_iwmmxt_unpacklub gen_helper_iwmmxt_unpacklub_arm +#define gen_helper_iwmmxt_unpacklul gen_helper_iwmmxt_unpacklul_arm +#define gen_helper_iwmmxt_unpackluw gen_helper_iwmmxt_unpackluw_arm +#define gen_helper_iwmmxt_unpacklw gen_helper_iwmmxt_unpacklw_arm +#define gen_helper_neon_abd_f32 gen_helper_neon_abd_f32_arm +#define gen_helper_neon_abdl_s16 gen_helper_neon_abdl_s16_arm +#define gen_helper_neon_abdl_s32 gen_helper_neon_abdl_s32_arm +#define gen_helper_neon_abdl_s64 gen_helper_neon_abdl_s64_arm +#define gen_helper_neon_abdl_u16 gen_helper_neon_abdl_u16_arm +#define gen_helper_neon_abdl_u32 gen_helper_neon_abdl_u32_arm +#define gen_helper_neon_abdl_u64 gen_helper_neon_abdl_u64_arm +#define gen_helper_neon_abd_s16 gen_helper_neon_abd_s16_arm +#define gen_helper_neon_abd_s32 gen_helper_neon_abd_s32_arm +#define gen_helper_neon_abd_s8 gen_helper_neon_abd_s8_arm +#define gen_helper_neon_abd_u16 gen_helper_neon_abd_u16_arm +#define gen_helper_neon_abd_u32 gen_helper_neon_abd_u32_arm +#define gen_helper_neon_abd_u8 gen_helper_neon_abd_u8_arm +#define gen_helper_neon_abs_s16 gen_helper_neon_abs_s16_arm +#define gen_helper_neon_abs_s8 gen_helper_neon_abs_s8_arm +#define gen_helper_neon_acge_f32 gen_helper_neon_acge_f32_arm +#define gen_helper_neon_acgt_f32 gen_helper_neon_acgt_f32_arm +#define gen_helper_neon_addl_saturate_s32 gen_helper_neon_addl_saturate_s32_arm +#define gen_helper_neon_addl_saturate_s64 gen_helper_neon_addl_saturate_s64_arm +#define gen_helper_neon_addl_u16 gen_helper_neon_addl_u16_arm +#define gen_helper_neon_addl_u32 gen_helper_neon_addl_u32_arm +#define gen_helper_neon_add_u16 gen_helper_neon_add_u16_arm +#define gen_helper_neon_add_u8 gen_helper_neon_add_u8_arm +#define gen_helper_neon_ceq_f32 gen_helper_neon_ceq_f32_arm +#define gen_helper_neon_ceq_u16 gen_helper_neon_ceq_u16_arm +#define gen_helper_neon_ceq_u32 gen_helper_neon_ceq_u32_arm +#define gen_helper_neon_ceq_u8 gen_helper_neon_ceq_u8_arm +#define gen_helper_neon_cge_f32 gen_helper_neon_cge_f32_arm +#define gen_helper_neon_cge_s16 gen_helper_neon_cge_s16_arm +#define gen_helper_neon_cge_s32 gen_helper_neon_cge_s32_arm +#define gen_helper_neon_cge_s8 gen_helper_neon_cge_s8_arm +#define gen_helper_neon_cge_u16 gen_helper_neon_cge_u16_arm +#define gen_helper_neon_cge_u32 gen_helper_neon_cge_u32_arm +#define gen_helper_neon_cge_u8 gen_helper_neon_cge_u8_arm +#define gen_helper_neon_cgt_f32 gen_helper_neon_cgt_f32_arm +#define gen_helper_neon_cgt_s16 gen_helper_neon_cgt_s16_arm +#define gen_helper_neon_cgt_s32 gen_helper_neon_cgt_s32_arm +#define gen_helper_neon_cgt_s8 gen_helper_neon_cgt_s8_arm +#define gen_helper_neon_cgt_u16 gen_helper_neon_cgt_u16_arm +#define gen_helper_neon_cgt_u32 gen_helper_neon_cgt_u32_arm +#define gen_helper_neon_cgt_u8 gen_helper_neon_cgt_u8_arm +#define gen_helper_neon_cls_s16 gen_helper_neon_cls_s16_arm +#define gen_helper_neon_cls_s32 gen_helper_neon_cls_s32_arm +#define gen_helper_neon_cls_s8 gen_helper_neon_cls_s8_arm +#define gen_helper_neon_clz_u16 gen_helper_neon_clz_u16_arm +#define gen_helper_neon_clz_u8 gen_helper_neon_clz_u8_arm +#define gen_helper_neon_cnt_u8 gen_helper_neon_cnt_u8_arm +#define gen_helper_neon_fcvt_f16_to_f32 gen_helper_neon_fcvt_f16_to_f32_arm +#define gen_helper_neon_fcvt_f32_to_f16 gen_helper_neon_fcvt_f32_to_f16_arm +#define gen_helper_neon_hadd_s16 gen_helper_neon_hadd_s16_arm +#define gen_helper_neon_hadd_s32 gen_helper_neon_hadd_s32_arm +#define gen_helper_neon_hadd_s8 gen_helper_neon_hadd_s8_arm +#define gen_helper_neon_hadd_u16 gen_helper_neon_hadd_u16_arm +#define gen_helper_neon_hadd_u32 gen_helper_neon_hadd_u32_arm +#define gen_helper_neon_hadd_u8 gen_helper_neon_hadd_u8_arm +#define gen_helper_neon_hsub_s16 gen_helper_neon_hsub_s16_arm +#define gen_helper_neon_hsub_s32 gen_helper_neon_hsub_s32_arm +#define gen_helper_neon_hsub_s8 gen_helper_neon_hsub_s8_arm +#define gen_helper_neon_hsub_u16 gen_helper_neon_hsub_u16_arm +#define gen_helper_neon_hsub_u32 gen_helper_neon_hsub_u32_arm +#define gen_helper_neon_hsub_u8 gen_helper_neon_hsub_u8_arm +#define gen_helper_neon_max_s16 gen_helper_neon_max_s16_arm +#define gen_helper_neon_max_s32 gen_helper_neon_max_s32_arm +#define gen_helper_neon_max_s8 gen_helper_neon_max_s8_arm +#define gen_helper_neon_max_u16 gen_helper_neon_max_u16_arm +#define gen_helper_neon_max_u32 gen_helper_neon_max_u32_arm +#define gen_helper_neon_max_u8 gen_helper_neon_max_u8_arm +#define gen_helper_neon_min_s16 gen_helper_neon_min_s16_arm +#define gen_helper_neon_min_s32 gen_helper_neon_min_s32_arm +#define gen_helper_neon_min_s8 gen_helper_neon_min_s8_arm +#define gen_helper_neon_min_u16 gen_helper_neon_min_u16_arm +#define gen_helper_neon_min_u32 gen_helper_neon_min_u32_arm +#define gen_helper_neon_min_u8 gen_helper_neon_min_u8_arm +#define gen_helper_neon_mull_p8 gen_helper_neon_mull_p8_arm +#define gen_helper_neon_mull_s16 gen_helper_neon_mull_s16_arm +#define gen_helper_neon_mull_s8 gen_helper_neon_mull_s8_arm +#define gen_helper_neon_mull_u16 gen_helper_neon_mull_u16_arm +#define gen_helper_neon_mull_u8 gen_helper_neon_mull_u8_arm +#define gen_helper_neon_mul_p8 gen_helper_neon_mul_p8_arm +#define gen_helper_neon_mul_u16 gen_helper_neon_mul_u16_arm +#define gen_helper_neon_mul_u8 gen_helper_neon_mul_u8_arm +#define gen_helper_neon_narrow_high_u16 gen_helper_neon_narrow_high_u16_arm +#define gen_helper_neon_narrow_high_u8 gen_helper_neon_narrow_high_u8_arm +#define gen_helper_neon_narrow_round_high_u16 gen_helper_neon_narrow_round_high_u16_arm +#define gen_helper_neon_narrow_round_high_u8 gen_helper_neon_narrow_round_high_u8_arm +#define gen_helper_neon_narrow_sat_s16 gen_helper_neon_narrow_sat_s16_arm +#define gen_helper_neon_narrow_sat_s32 gen_helper_neon_narrow_sat_s32_arm +#define gen_helper_neon_narrow_sat_s8 gen_helper_neon_narrow_sat_s8_arm +#define gen_helper_neon_narrow_sat_u16 gen_helper_neon_narrow_sat_u16_arm +#define gen_helper_neon_narrow_sat_u32 gen_helper_neon_narrow_sat_u32_arm +#define gen_helper_neon_narrow_sat_u8 gen_helper_neon_narrow_sat_u8_arm +#define gen_helper_neon_narrow_u16 gen_helper_neon_narrow_u16_arm +#define gen_helper_neon_narrow_u8 gen_helper_neon_narrow_u8_arm +#define gen_helper_neon_negl_u16 gen_helper_neon_negl_u16_arm +#define gen_helper_neon_negl_u32 gen_helper_neon_negl_u32_arm +#define gen_helper_neon_paddl_u16 gen_helper_neon_paddl_u16_arm +#define gen_helper_neon_paddl_u32 gen_helper_neon_paddl_u32_arm +#define gen_helper_neon_padd_u16 gen_helper_neon_padd_u16_arm +#define gen_helper_neon_padd_u8 gen_helper_neon_padd_u8_arm +#define gen_helper_neon_pmax_s16 gen_helper_neon_pmax_s16_arm +#define gen_helper_neon_pmax_s8 gen_helper_neon_pmax_s8_arm +#define gen_helper_neon_pmax_u16 gen_helper_neon_pmax_u16_arm +#define gen_helper_neon_pmax_u8 gen_helper_neon_pmax_u8_arm +#define gen_helper_neon_pmin_s16 gen_helper_neon_pmin_s16_arm +#define gen_helper_neon_pmin_s8 gen_helper_neon_pmin_s8_arm +#define gen_helper_neon_pmin_u16 gen_helper_neon_pmin_u16_arm +#define gen_helper_neon_pmin_u8 gen_helper_neon_pmin_u8_arm +#define gen_helper_neon_pmull_64_hi gen_helper_neon_pmull_64_hi_arm +#define gen_helper_neon_pmull_64_lo gen_helper_neon_pmull_64_lo_arm +#define gen_helper_neon_qabs_s16 gen_helper_neon_qabs_s16_arm +#define gen_helper_neon_qabs_s32 gen_helper_neon_qabs_s32_arm +#define gen_helper_neon_qabs_s8 gen_helper_neon_qabs_s8_arm +#define gen_helper_neon_qadd_s16 gen_helper_neon_qadd_s16_arm +#define gen_helper_neon_qadd_s32 gen_helper_neon_qadd_s32_arm +#define gen_helper_neon_qadd_s64 gen_helper_neon_qadd_s64_arm +#define gen_helper_neon_qadd_s8 gen_helper_neon_qadd_s8_arm +#define gen_helper_neon_qadd_u16 gen_helper_neon_qadd_u16_arm +#define gen_helper_neon_qadd_u32 gen_helper_neon_qadd_u32_arm +#define gen_helper_neon_qadd_u64 gen_helper_neon_qadd_u64_arm +#define gen_helper_neon_qadd_u8 gen_helper_neon_qadd_u8_arm +#define gen_helper_neon_qdmulh_s16 gen_helper_neon_qdmulh_s16_arm +#define gen_helper_neon_qdmulh_s32 gen_helper_neon_qdmulh_s32_arm +#define gen_helper_neon_qneg_s16 gen_helper_neon_qneg_s16_arm +#define gen_helper_neon_qneg_s32 gen_helper_neon_qneg_s32_arm +#define gen_helper_neon_qneg_s8 gen_helper_neon_qneg_s8_arm +#define gen_helper_neon_qrdmulh_s16 gen_helper_neon_qrdmulh_s16_arm +#define gen_helper_neon_qrdmulh_s32 gen_helper_neon_qrdmulh_s32_arm +#define gen_helper_neon_qrshl_s16 gen_helper_neon_qrshl_s16_arm +#define gen_helper_neon_qrshl_s32 gen_helper_neon_qrshl_s32_arm +#define gen_helper_neon_qrshl_s64 gen_helper_neon_qrshl_s64_arm +#define gen_helper_neon_qrshl_s8 gen_helper_neon_qrshl_s8_arm +#define gen_helper_neon_qrshl_u16 gen_helper_neon_qrshl_u16_arm +#define gen_helper_neon_qrshl_u32 gen_helper_neon_qrshl_u32_arm +#define gen_helper_neon_qrshl_u64 gen_helper_neon_qrshl_u64_arm +#define gen_helper_neon_qrshl_u8 gen_helper_neon_qrshl_u8_arm +#define gen_helper_neon_qshl_s16 gen_helper_neon_qshl_s16_arm +#define gen_helper_neon_qshl_s32 gen_helper_neon_qshl_s32_arm +#define gen_helper_neon_qshl_s64 gen_helper_neon_qshl_s64_arm +#define gen_helper_neon_qshl_s8 gen_helper_neon_qshl_s8_arm +#define gen_helper_neon_qshl_u16 gen_helper_neon_qshl_u16_arm +#define gen_helper_neon_qshl_u32 gen_helper_neon_qshl_u32_arm +#define gen_helper_neon_qshl_u64 gen_helper_neon_qshl_u64_arm +#define gen_helper_neon_qshl_u8 gen_helper_neon_qshl_u8_arm +#define gen_helper_neon_qshlu_s16 gen_helper_neon_qshlu_s16_arm +#define gen_helper_neon_qshlu_s32 gen_helper_neon_qshlu_s32_arm +#define gen_helper_neon_qshlu_s64 gen_helper_neon_qshlu_s64_arm +#define gen_helper_neon_qshlu_s8 gen_helper_neon_qshlu_s8_arm +#define gen_helper_neon_qsub_s16 gen_helper_neon_qsub_s16_arm +#define gen_helper_neon_qsub_s32 gen_helper_neon_qsub_s32_arm +#define gen_helper_neon_qsub_s64 gen_helper_neon_qsub_s64_arm +#define gen_helper_neon_qsub_s8 gen_helper_neon_qsub_s8_arm +#define gen_helper_neon_qsub_u16 gen_helper_neon_qsub_u16_arm +#define gen_helper_neon_qsub_u32 gen_helper_neon_qsub_u32_arm +#define gen_helper_neon_qsub_u64 gen_helper_neon_qsub_u64_arm +#define gen_helper_neon_qsub_u8 gen_helper_neon_qsub_u8_arm +#define gen_helper_neon_qunzip16 gen_helper_neon_qunzip16_arm +#define gen_helper_neon_qunzip32 gen_helper_neon_qunzip32_arm +#define gen_helper_neon_qunzip8 gen_helper_neon_qunzip8_arm +#define gen_helper_neon_qzip16 gen_helper_neon_qzip16_arm +#define gen_helper_neon_qzip32 gen_helper_neon_qzip32_arm +#define gen_helper_neon_qzip8 gen_helper_neon_qzip8_arm +#define gen_helper_neon_rhadd_s16 gen_helper_neon_rhadd_s16_arm +#define gen_helper_neon_rhadd_s32 gen_helper_neon_rhadd_s32_arm +#define gen_helper_neon_rhadd_s8 gen_helper_neon_rhadd_s8_arm +#define gen_helper_neon_rhadd_u16 gen_helper_neon_rhadd_u16_arm +#define gen_helper_neon_rhadd_u32 gen_helper_neon_rhadd_u32_arm +#define gen_helper_neon_rhadd_u8 gen_helper_neon_rhadd_u8_arm +#define gen_helper_neon_rshl_s16 gen_helper_neon_rshl_s16_arm +#define gen_helper_neon_rshl_s32 gen_helper_neon_rshl_s32_arm +#define gen_helper_neon_rshl_s64 gen_helper_neon_rshl_s64_arm +#define gen_helper_neon_rshl_s8 gen_helper_neon_rshl_s8_arm +#define gen_helper_neon_rshl_u16 gen_helper_neon_rshl_u16_arm +#define gen_helper_neon_rshl_u32 gen_helper_neon_rshl_u32_arm +#define gen_helper_neon_rshl_u64 gen_helper_neon_rshl_u64_arm +#define gen_helper_neon_rshl_u8 gen_helper_neon_rshl_u8_arm +#define gen_helper_neon_shl_s16 gen_helper_neon_shl_s16_arm +#define gen_helper_neon_shl_s32 gen_helper_neon_shl_s32_arm +#define gen_helper_neon_shl_s64 gen_helper_neon_shl_s64_arm +#define gen_helper_neon_shl_s8 gen_helper_neon_shl_s8_arm +#define gen_helper_neon_shl_u16 gen_helper_neon_shl_u16_arm +#define gen_helper_neon_shl_u32 gen_helper_neon_shl_u32_arm +#define gen_helper_neon_shl_u64 gen_helper_neon_shl_u64_arm +#define gen_helper_neon_shl_u8 gen_helper_neon_shl_u8_arm +#define gen_helper_neon_subl_u16 gen_helper_neon_subl_u16_arm +#define gen_helper_neon_subl_u32 gen_helper_neon_subl_u32_arm +#define gen_helper_neon_sub_u16 gen_helper_neon_sub_u16_arm +#define gen_helper_neon_sub_u8 gen_helper_neon_sub_u8_arm +#define gen_helper_neon_tbl gen_helper_neon_tbl_arm +#define gen_helper_neon_tst_u16 gen_helper_neon_tst_u16_arm +#define gen_helper_neon_tst_u32 gen_helper_neon_tst_u32_arm +#define gen_helper_neon_tst_u8 gen_helper_neon_tst_u8_arm +#define gen_helper_neon_unarrow_sat16 gen_helper_neon_unarrow_sat16_arm +#define gen_helper_neon_unarrow_sat32 gen_helper_neon_unarrow_sat32_arm +#define gen_helper_neon_unarrow_sat8 gen_helper_neon_unarrow_sat8_arm +#define gen_helper_neon_unzip16 gen_helper_neon_unzip16_arm +#define gen_helper_neon_unzip8 gen_helper_neon_unzip8_arm +#define gen_helper_neon_widen_s16 gen_helper_neon_widen_s16_arm +#define gen_helper_neon_widen_s8 gen_helper_neon_widen_s8_arm +#define gen_helper_neon_widen_u16 gen_helper_neon_widen_u16_arm +#define gen_helper_neon_widen_u8 gen_helper_neon_widen_u8_arm +#define gen_helper_neon_zip16 gen_helper_neon_zip16_arm +#define gen_helper_neon_zip8 gen_helper_neon_zip8_arm +#define gen_helper_pre_hvc gen_helper_pre_hvc_arm +#define gen_helper_pre_smc gen_helper_pre_smc_arm +#define gen_helper_qadd16 gen_helper_qadd16_arm +#define gen_helper_qadd8 gen_helper_qadd8_arm +#define gen_helper_qaddsubx gen_helper_qaddsubx_arm +#define gen_helper_qsub16 gen_helper_qsub16_arm +#define gen_helper_qsub8 gen_helper_qsub8_arm +#define gen_helper_qsubaddx gen_helper_qsubaddx_arm +#define gen_helper_rbit gen_helper_rbit_arm +#define gen_helper_recpe_f32 gen_helper_recpe_f32_arm +#define gen_helper_recpe_u32 gen_helper_recpe_u32_arm +#define gen_helper_recps_f32 gen_helper_recps_f32_arm +#define gen_helper_rintd gen_helper_rintd_arm +#define gen_helper_rintd_exact gen_helper_rintd_exact_arm +#define gen_helper_rints gen_helper_rints_arm +#define gen_helper_rints_exact gen_helper_rints_exact_arm +#define gen_helper_ror_cc gen_helper_ror_cc_arm +#define gen_helper_rsqrte_f32 gen_helper_rsqrte_f32_arm +#define gen_helper_rsqrte_u32 gen_helper_rsqrte_u32_arm +#define gen_helper_rsqrts_f32 gen_helper_rsqrts_f32_arm +#define gen_helper_sadd16 gen_helper_sadd16_arm +#define gen_helper_sadd8 gen_helper_sadd8_arm +#define gen_helper_saddsubx gen_helper_saddsubx_arm +#define gen_helper_sar_cc gen_helper_sar_cc_arm +#define gen_helper_sdiv gen_helper_sdiv_arm +#define gen_helper_sel_flags gen_helper_sel_flags_arm +#define gen_helper_set_cp_reg gen_helper_set_cp_reg_arm +#define gen_helper_set_cp_reg64 gen_helper_set_cp_reg64_arm +#define gen_helper_set_neon_rmode gen_helper_set_neon_rmode_arm +#define gen_helper_set_r13_banked gen_helper_set_r13_banked_arm +#define gen_helper_set_rmode gen_helper_set_rmode_arm +#define gen_helper_set_user_reg gen_helper_set_user_reg_arm +#define gen_helper_shadd16 gen_helper_shadd16_arm +#define gen_helper_shadd8 gen_helper_shadd8_arm +#define gen_helper_shaddsubx gen_helper_shaddsubx_arm +#define gen_helper_shl_cc gen_helper_shl_cc_arm +#define gen_helper_shr_cc gen_helper_shr_cc_arm +#define gen_helper_shsub16 gen_helper_shsub16_arm +#define gen_helper_shsub8 gen_helper_shsub8_arm +#define gen_helper_shsubaddx gen_helper_shsubaddx_arm +#define gen_helper_ssat gen_helper_ssat_arm +#define gen_helper_ssat16 gen_helper_ssat16_arm +#define gen_helper_ssub16 gen_helper_ssub16_arm +#define gen_helper_ssub8 gen_helper_ssub8_arm +#define gen_helper_ssubaddx gen_helper_ssubaddx_arm +#define gen_helper_sub_saturate gen_helper_sub_saturate_arm +#define gen_helper_sxtb16 gen_helper_sxtb16_arm +#define gen_helper_uadd16 gen_helper_uadd16_arm +#define gen_helper_uadd8 gen_helper_uadd8_arm +#define gen_helper_uaddsubx gen_helper_uaddsubx_arm +#define gen_helper_udiv gen_helper_udiv_arm +#define gen_helper_uhadd16 gen_helper_uhadd16_arm +#define gen_helper_uhadd8 gen_helper_uhadd8_arm +#define gen_helper_uhaddsubx gen_helper_uhaddsubx_arm +#define gen_helper_uhsub16 gen_helper_uhsub16_arm +#define gen_helper_uhsub8 gen_helper_uhsub8_arm +#define gen_helper_uhsubaddx gen_helper_uhsubaddx_arm +#define gen_helper_uqadd16 gen_helper_uqadd16_arm +#define gen_helper_uqadd8 gen_helper_uqadd8_arm +#define gen_helper_uqaddsubx gen_helper_uqaddsubx_arm +#define gen_helper_uqsub16 gen_helper_uqsub16_arm +#define gen_helper_uqsub8 gen_helper_uqsub8_arm +#define gen_helper_uqsubaddx gen_helper_uqsubaddx_arm +#define gen_helper_usad8 gen_helper_usad8_arm +#define gen_helper_usat gen_helper_usat_arm +#define gen_helper_usat16 gen_helper_usat16_arm +#define gen_helper_usub16 gen_helper_usub16_arm +#define gen_helper_usub8 gen_helper_usub8_arm +#define gen_helper_usubaddx gen_helper_usubaddx_arm +#define gen_helper_uxtb16 gen_helper_uxtb16_arm +#define gen_helper_v7m_mrs gen_helper_v7m_mrs_arm +#define gen_helper_v7m_msr gen_helper_v7m_msr_arm +#define gen_helper_vfp_absd gen_helper_vfp_absd_arm +#define gen_helper_vfp_abss gen_helper_vfp_abss_arm +#define gen_helper_vfp_addd gen_helper_vfp_addd_arm +#define gen_helper_vfp_adds gen_helper_vfp_adds_arm +#define gen_helper_vfp_cmpd gen_helper_vfp_cmpd_arm +#define gen_helper_vfp_cmped gen_helper_vfp_cmped_arm +#define gen_helper_vfp_cmpes gen_helper_vfp_cmpes_arm +#define gen_helper_vfp_cmps gen_helper_vfp_cmps_arm +#define gen_helper_vfp_divd gen_helper_vfp_divd_arm +#define gen_helper_vfp_divs gen_helper_vfp_divs_arm +#define gen_helper_vfp_fcvtds gen_helper_vfp_fcvtds_arm +#define gen_helper_vfp_fcvt_f16_to_f32 gen_helper_vfp_fcvt_f16_to_f32_arm +#define gen_helper_vfp_fcvt_f16_to_f64 gen_helper_vfp_fcvt_f16_to_f64_arm +#define gen_helper_vfp_fcvt_f32_to_f16 gen_helper_vfp_fcvt_f32_to_f16_arm +#define gen_helper_vfp_fcvt_f64_to_f16 gen_helper_vfp_fcvt_f64_to_f16_arm +#define gen_helper_vfp_fcvtsd gen_helper_vfp_fcvtsd_arm +#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_arm +#define gen_helper_vfp_maxnumd gen_helper_vfp_maxnumd_arm +#define gen_helper_vfp_maxnums gen_helper_vfp_maxnums_arm +#define gen_helper_vfp_maxs gen_helper_vfp_maxs_arm +#define gen_helper_vfp_minnumd gen_helper_vfp_minnumd_arm +#define gen_helper_vfp_minnums gen_helper_vfp_minnums_arm +#define gen_helper_vfp_mins gen_helper_vfp_mins_arm +#define gen_helper_vfp_muladdd gen_helper_vfp_muladdd_arm +#define gen_helper_vfp_muladds gen_helper_vfp_muladds_arm +#define gen_helper_vfp_muld gen_helper_vfp_muld_arm +#define gen_helper_vfp_muls gen_helper_vfp_muls_arm +#define gen_helper_vfp_negd gen_helper_vfp_negd_arm +#define gen_helper_vfp_negs gen_helper_vfp_negs_arm +#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_arm +#define gen_helper_vfp_shtod gen_helper_vfp_shtod_arm +#define gen_helper_vfp_shtos gen_helper_vfp_shtos_arm +#define gen_helper_vfp_sitod gen_helper_vfp_sitod_arm +#define gen_helper_vfp_sitos gen_helper_vfp_sitos_arm +#define gen_helper_vfp_sltod gen_helper_vfp_sltod_arm +#define gen_helper_vfp_sltos gen_helper_vfp_sltos_arm +#define gen_helper_vfp_sqrtd gen_helper_vfp_sqrtd_arm +#define gen_helper_vfp_sqrts gen_helper_vfp_sqrts_arm +#define gen_helper_vfp_subd gen_helper_vfp_subd_arm +#define gen_helper_vfp_subs gen_helper_vfp_subs_arm +#define gen_helper_vfp_toshd_round_to_zero gen_helper_vfp_toshd_round_to_zero_arm +#define gen_helper_vfp_toshs_round_to_zero gen_helper_vfp_toshs_round_to_zero_arm +#define gen_helper_vfp_tosid gen_helper_vfp_tosid_arm +#define gen_helper_vfp_tosis gen_helper_vfp_tosis_arm +#define gen_helper_vfp_tosizd gen_helper_vfp_tosizd_arm +#define gen_helper_vfp_tosizs gen_helper_vfp_tosizs_arm +#define gen_helper_vfp_tosld gen_helper_vfp_tosld_arm +#define gen_helper_vfp_tosld_round_to_zero gen_helper_vfp_tosld_round_to_zero_arm +#define gen_helper_vfp_tosls gen_helper_vfp_tosls_arm +#define gen_helper_vfp_tosls_round_to_zero gen_helper_vfp_tosls_round_to_zero_arm +#define gen_helper_vfp_touhd_round_to_zero gen_helper_vfp_touhd_round_to_zero_arm +#define gen_helper_vfp_touhs_round_to_zero gen_helper_vfp_touhs_round_to_zero_arm +#define gen_helper_vfp_touid gen_helper_vfp_touid_arm +#define gen_helper_vfp_touis gen_helper_vfp_touis_arm +#define gen_helper_vfp_touizd gen_helper_vfp_touizd_arm +#define gen_helper_vfp_touizs gen_helper_vfp_touizs_arm +#define gen_helper_vfp_tould gen_helper_vfp_tould_arm +#define gen_helper_vfp_tould_round_to_zero gen_helper_vfp_tould_round_to_zero_arm +#define gen_helper_vfp_touls gen_helper_vfp_touls_arm +#define gen_helper_vfp_touls_round_to_zero gen_helper_vfp_touls_round_to_zero_arm +#define gen_helper_vfp_uhtod gen_helper_vfp_uhtod_arm +#define gen_helper_vfp_uhtos gen_helper_vfp_uhtos_arm +#define gen_helper_vfp_uitod gen_helper_vfp_uitod_arm +#define gen_helper_vfp_uitos gen_helper_vfp_uitos_arm +#define gen_helper_vfp_ultod gen_helper_vfp_ultod_arm +#define gen_helper_vfp_ultos gen_helper_vfp_ultos_arm +#define gen_helper_wfe gen_helper_wfe_arm +#define gen_helper_wfi gen_helper_wfi_arm +#define gen_hvc gen_hvc_arm +#define gen_intermediate_code_internal gen_intermediate_code_internal_arm +#define gen_intermediate_code_internal_a64 gen_intermediate_code_internal_a64_arm +#define gen_iwmmxt_address gen_iwmmxt_address_arm +#define gen_iwmmxt_shift gen_iwmmxt_shift_arm +#define gen_jmp gen_jmp_arm +#define gen_load_and_replicate gen_load_and_replicate_arm +#define gen_load_exclusive gen_load_exclusive_arm +#define gen_logic_CC gen_logic_CC_arm +#define gen_logicq_cc gen_logicq_cc_arm +#define gen_lookup_tb gen_lookup_tb_arm +#define gen_mov_F0_vreg gen_mov_F0_vreg_arm +#define gen_mov_F1_vreg gen_mov_F1_vreg_arm +#define gen_mov_vreg_F0 gen_mov_vreg_F0_arm +#define gen_muls_i64_i32 gen_muls_i64_i32_arm +#define gen_mulu_i64_i32 gen_mulu_i64_i32_arm +#define gen_mulxy gen_mulxy_arm +#define gen_neon_add gen_neon_add_arm +#define gen_neon_addl gen_neon_addl_arm +#define gen_neon_addl_saturate gen_neon_addl_saturate_arm +#define gen_neon_bsl gen_neon_bsl_arm +#define gen_neon_dup_high16 gen_neon_dup_high16_arm +#define gen_neon_dup_low16 gen_neon_dup_low16_arm +#define gen_neon_dup_u8 gen_neon_dup_u8_arm +#define gen_neon_mull gen_neon_mull_arm +#define gen_neon_narrow gen_neon_narrow_arm +#define gen_neon_narrow_op gen_neon_narrow_op_arm +#define gen_neon_narrow_sats gen_neon_narrow_sats_arm +#define gen_neon_narrow_satu gen_neon_narrow_satu_arm +#define gen_neon_negl gen_neon_negl_arm +#define gen_neon_rsb gen_neon_rsb_arm +#define gen_neon_shift_narrow gen_neon_shift_narrow_arm +#define gen_neon_subl gen_neon_subl_arm +#define gen_neon_trn_u16 gen_neon_trn_u16_arm +#define gen_neon_trn_u8 gen_neon_trn_u8_arm +#define gen_neon_unarrow_sats gen_neon_unarrow_sats_arm +#define gen_neon_unzip gen_neon_unzip_arm +#define gen_neon_widen gen_neon_widen_arm +#define gen_neon_zip gen_neon_zip_arm +#define gen_new_label gen_new_label_arm +#define gen_nop_hint gen_nop_hint_arm +#define gen_op_iwmmxt_addl_M0_wRn gen_op_iwmmxt_addl_M0_wRn_arm +#define gen_op_iwmmxt_addnb_M0_wRn gen_op_iwmmxt_addnb_M0_wRn_arm +#define gen_op_iwmmxt_addnl_M0_wRn gen_op_iwmmxt_addnl_M0_wRn_arm +#define gen_op_iwmmxt_addnw_M0_wRn gen_op_iwmmxt_addnw_M0_wRn_arm +#define gen_op_iwmmxt_addsb_M0_wRn gen_op_iwmmxt_addsb_M0_wRn_arm +#define gen_op_iwmmxt_addsl_M0_wRn gen_op_iwmmxt_addsl_M0_wRn_arm +#define gen_op_iwmmxt_addsw_M0_wRn gen_op_iwmmxt_addsw_M0_wRn_arm +#define gen_op_iwmmxt_addub_M0_wRn gen_op_iwmmxt_addub_M0_wRn_arm +#define gen_op_iwmmxt_addul_M0_wRn gen_op_iwmmxt_addul_M0_wRn_arm +#define gen_op_iwmmxt_adduw_M0_wRn gen_op_iwmmxt_adduw_M0_wRn_arm +#define gen_op_iwmmxt_andq_M0_wRn gen_op_iwmmxt_andq_M0_wRn_arm +#define gen_op_iwmmxt_avgb0_M0_wRn gen_op_iwmmxt_avgb0_M0_wRn_arm +#define gen_op_iwmmxt_avgb1_M0_wRn gen_op_iwmmxt_avgb1_M0_wRn_arm +#define gen_op_iwmmxt_avgw0_M0_wRn gen_op_iwmmxt_avgw0_M0_wRn_arm +#define gen_op_iwmmxt_avgw1_M0_wRn gen_op_iwmmxt_avgw1_M0_wRn_arm +#define gen_op_iwmmxt_cmpeqb_M0_wRn gen_op_iwmmxt_cmpeqb_M0_wRn_arm +#define gen_op_iwmmxt_cmpeql_M0_wRn gen_op_iwmmxt_cmpeql_M0_wRn_arm +#define gen_op_iwmmxt_cmpeqw_M0_wRn gen_op_iwmmxt_cmpeqw_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtsb_M0_wRn gen_op_iwmmxt_cmpgtsb_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtsl_M0_wRn gen_op_iwmmxt_cmpgtsl_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtsw_M0_wRn gen_op_iwmmxt_cmpgtsw_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtub_M0_wRn gen_op_iwmmxt_cmpgtub_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtul_M0_wRn gen_op_iwmmxt_cmpgtul_M0_wRn_arm +#define gen_op_iwmmxt_cmpgtuw_M0_wRn gen_op_iwmmxt_cmpgtuw_M0_wRn_arm +#define gen_op_iwmmxt_macsw_M0_wRn gen_op_iwmmxt_macsw_M0_wRn_arm +#define gen_op_iwmmxt_macuw_M0_wRn gen_op_iwmmxt_macuw_M0_wRn_arm +#define gen_op_iwmmxt_maddsq_M0_wRn gen_op_iwmmxt_maddsq_M0_wRn_arm +#define gen_op_iwmmxt_madduq_M0_wRn gen_op_iwmmxt_madduq_M0_wRn_arm +#define gen_op_iwmmxt_maxsb_M0_wRn gen_op_iwmmxt_maxsb_M0_wRn_arm +#define gen_op_iwmmxt_maxsl_M0_wRn gen_op_iwmmxt_maxsl_M0_wRn_arm +#define gen_op_iwmmxt_maxsw_M0_wRn gen_op_iwmmxt_maxsw_M0_wRn_arm +#define gen_op_iwmmxt_maxub_M0_wRn gen_op_iwmmxt_maxub_M0_wRn_arm +#define gen_op_iwmmxt_maxul_M0_wRn gen_op_iwmmxt_maxul_M0_wRn_arm +#define gen_op_iwmmxt_maxuw_M0_wRn gen_op_iwmmxt_maxuw_M0_wRn_arm +#define gen_op_iwmmxt_minsb_M0_wRn gen_op_iwmmxt_minsb_M0_wRn_arm +#define gen_op_iwmmxt_minsl_M0_wRn gen_op_iwmmxt_minsl_M0_wRn_arm +#define gen_op_iwmmxt_minsw_M0_wRn gen_op_iwmmxt_minsw_M0_wRn_arm +#define gen_op_iwmmxt_minub_M0_wRn gen_op_iwmmxt_minub_M0_wRn_arm +#define gen_op_iwmmxt_minul_M0_wRn gen_op_iwmmxt_minul_M0_wRn_arm +#define gen_op_iwmmxt_minuw_M0_wRn gen_op_iwmmxt_minuw_M0_wRn_arm +#define gen_op_iwmmxt_movq_M0_wRn gen_op_iwmmxt_movq_M0_wRn_arm +#define gen_op_iwmmxt_movq_wRn_M0 gen_op_iwmmxt_movq_wRn_M0_arm +#define gen_op_iwmmxt_mulshw_M0_wRn gen_op_iwmmxt_mulshw_M0_wRn_arm +#define gen_op_iwmmxt_mulslw_M0_wRn gen_op_iwmmxt_mulslw_M0_wRn_arm +#define gen_op_iwmmxt_muluhw_M0_wRn gen_op_iwmmxt_muluhw_M0_wRn_arm +#define gen_op_iwmmxt_mululw_M0_wRn gen_op_iwmmxt_mululw_M0_wRn_arm +#define gen_op_iwmmxt_orq_M0_wRn gen_op_iwmmxt_orq_M0_wRn_arm +#define gen_op_iwmmxt_packsl_M0_wRn gen_op_iwmmxt_packsl_M0_wRn_arm +#define gen_op_iwmmxt_packsq_M0_wRn gen_op_iwmmxt_packsq_M0_wRn_arm +#define gen_op_iwmmxt_packsw_M0_wRn gen_op_iwmmxt_packsw_M0_wRn_arm +#define gen_op_iwmmxt_packul_M0_wRn gen_op_iwmmxt_packul_M0_wRn_arm +#define gen_op_iwmmxt_packuq_M0_wRn gen_op_iwmmxt_packuq_M0_wRn_arm +#define gen_op_iwmmxt_packuw_M0_wRn gen_op_iwmmxt_packuw_M0_wRn_arm +#define gen_op_iwmmxt_sadb_M0_wRn gen_op_iwmmxt_sadb_M0_wRn_arm +#define gen_op_iwmmxt_sadw_M0_wRn gen_op_iwmmxt_sadw_M0_wRn_arm +#define gen_op_iwmmxt_set_cup gen_op_iwmmxt_set_cup_arm +#define gen_op_iwmmxt_set_mup gen_op_iwmmxt_set_mup_arm +#define gen_op_iwmmxt_setpsr_nz gen_op_iwmmxt_setpsr_nz_arm +#define gen_op_iwmmxt_subnb_M0_wRn gen_op_iwmmxt_subnb_M0_wRn_arm +#define gen_op_iwmmxt_subnl_M0_wRn gen_op_iwmmxt_subnl_M0_wRn_arm +#define gen_op_iwmmxt_subnw_M0_wRn gen_op_iwmmxt_subnw_M0_wRn_arm +#define gen_op_iwmmxt_subsb_M0_wRn gen_op_iwmmxt_subsb_M0_wRn_arm +#define gen_op_iwmmxt_subsl_M0_wRn gen_op_iwmmxt_subsl_M0_wRn_arm +#define gen_op_iwmmxt_subsw_M0_wRn gen_op_iwmmxt_subsw_M0_wRn_arm +#define gen_op_iwmmxt_subub_M0_wRn gen_op_iwmmxt_subub_M0_wRn_arm +#define gen_op_iwmmxt_subul_M0_wRn gen_op_iwmmxt_subul_M0_wRn_arm +#define gen_op_iwmmxt_subuw_M0_wRn gen_op_iwmmxt_subuw_M0_wRn_arm +#define gen_op_iwmmxt_unpackhb_M0_wRn gen_op_iwmmxt_unpackhb_M0_wRn_arm +#define gen_op_iwmmxt_unpackhl_M0_wRn gen_op_iwmmxt_unpackhl_M0_wRn_arm +#define gen_op_iwmmxt_unpackhsb_M0 gen_op_iwmmxt_unpackhsb_M0_arm +#define gen_op_iwmmxt_unpackhsl_M0 gen_op_iwmmxt_unpackhsl_M0_arm +#define gen_op_iwmmxt_unpackhsw_M0 gen_op_iwmmxt_unpackhsw_M0_arm +#define gen_op_iwmmxt_unpackhub_M0 gen_op_iwmmxt_unpackhub_M0_arm +#define gen_op_iwmmxt_unpackhul_M0 gen_op_iwmmxt_unpackhul_M0_arm +#define gen_op_iwmmxt_unpackhuw_M0 gen_op_iwmmxt_unpackhuw_M0_arm +#define gen_op_iwmmxt_unpackhw_M0_wRn gen_op_iwmmxt_unpackhw_M0_wRn_arm +#define gen_op_iwmmxt_unpacklb_M0_wRn gen_op_iwmmxt_unpacklb_M0_wRn_arm +#define gen_op_iwmmxt_unpackll_M0_wRn gen_op_iwmmxt_unpackll_M0_wRn_arm +#define gen_op_iwmmxt_unpacklsb_M0 gen_op_iwmmxt_unpacklsb_M0_arm +#define gen_op_iwmmxt_unpacklsl_M0 gen_op_iwmmxt_unpacklsl_M0_arm +#define gen_op_iwmmxt_unpacklsw_M0 gen_op_iwmmxt_unpacklsw_M0_arm +#define gen_op_iwmmxt_unpacklub_M0 gen_op_iwmmxt_unpacklub_M0_arm +#define gen_op_iwmmxt_unpacklul_M0 gen_op_iwmmxt_unpacklul_M0_arm +#define gen_op_iwmmxt_unpackluw_M0 gen_op_iwmmxt_unpackluw_M0_arm +#define gen_op_iwmmxt_unpacklw_M0_wRn gen_op_iwmmxt_unpacklw_M0_wRn_arm +#define gen_op_iwmmxt_xorq_M0_wRn gen_op_iwmmxt_xorq_M0_wRn_arm +#define gen_rev16 gen_rev16_arm +#define gen_revsh gen_revsh_arm +#define gen_rfe gen_rfe_arm +#define gen_sar gen_sar_arm +#define gen_sbc_CC gen_sbc_CC_arm +#define gen_sbfx gen_sbfx_arm +#define gen_set_CF_bit31 gen_set_CF_bit31_arm +#define gen_set_condexec gen_set_condexec_arm +#define gen_set_cpsr gen_set_cpsr_arm +#define gen_set_label gen_set_label_arm +#define gen_set_pc_im gen_set_pc_im_arm +#define gen_set_psr gen_set_psr_arm +#define gen_set_psr_im gen_set_psr_im_arm +#define gen_shl gen_shl_arm +#define gen_shr gen_shr_arm +#define gen_smc gen_smc_arm +#define gen_smul_dual gen_smul_dual_arm +#define gen_srs gen_srs_arm +#define gen_ss_advance gen_ss_advance_arm +#define gen_step_complete_exception gen_step_complete_exception_arm +#define gen_store_exclusive gen_store_exclusive_arm +#define gen_storeq_reg gen_storeq_reg_arm +#define gen_sub_carry gen_sub_carry_arm +#define gen_sub_CC gen_sub_CC_arm +#define gen_subq_msw gen_subq_msw_arm +#define gen_swap_half gen_swap_half_arm +#define gen_thumb2_data_op gen_thumb2_data_op_arm +#define gen_thumb2_parallel_addsub gen_thumb2_parallel_addsub_arm +#define gen_ubfx gen_ubfx_arm +#define gen_vfp_abs gen_vfp_abs_arm +#define gen_vfp_add gen_vfp_add_arm +#define gen_vfp_cmp gen_vfp_cmp_arm +#define gen_vfp_cmpe gen_vfp_cmpe_arm +#define gen_vfp_div gen_vfp_div_arm +#define gen_vfp_F1_ld0 gen_vfp_F1_ld0_arm +#define gen_vfp_F1_mul gen_vfp_F1_mul_arm +#define gen_vfp_F1_neg gen_vfp_F1_neg_arm +#define gen_vfp_ld gen_vfp_ld_arm +#define gen_vfp_mrs gen_vfp_mrs_arm +#define gen_vfp_msr gen_vfp_msr_arm +#define gen_vfp_mul gen_vfp_mul_arm +#define gen_vfp_neg gen_vfp_neg_arm +#define gen_vfp_shto gen_vfp_shto_arm +#define gen_vfp_sito gen_vfp_sito_arm +#define gen_vfp_slto gen_vfp_slto_arm +#define gen_vfp_sqrt gen_vfp_sqrt_arm +#define gen_vfp_st gen_vfp_st_arm +#define gen_vfp_sub gen_vfp_sub_arm +#define gen_vfp_tosh gen_vfp_tosh_arm +#define gen_vfp_tosi gen_vfp_tosi_arm +#define gen_vfp_tosiz gen_vfp_tosiz_arm +#define gen_vfp_tosl gen_vfp_tosl_arm +#define gen_vfp_touh gen_vfp_touh_arm +#define gen_vfp_toui gen_vfp_toui_arm +#define gen_vfp_touiz gen_vfp_touiz_arm +#define gen_vfp_toul gen_vfp_toul_arm +#define gen_vfp_uhto gen_vfp_uhto_arm +#define gen_vfp_uito gen_vfp_uito_arm +#define gen_vfp_ulto gen_vfp_ulto_arm +#define get_arm_cp_reginfo get_arm_cp_reginfo_arm +#define get_clock get_clock_arm +#define get_clock_realtime get_clock_realtime_arm +#define get_constraint_priority get_constraint_priority_arm +#define get_float_exception_flags get_float_exception_flags_arm +#define get_float_rounding_mode get_float_rounding_mode_arm +#define get_fpstatus_ptr get_fpstatus_ptr_arm +#define get_level1_table_address get_level1_table_address_arm +#define get_mem_index get_mem_index_arm +#define get_next_param_value get_next_param_value_arm +#define get_opt_name get_opt_name_arm +#define get_opt_value get_opt_value_arm +#define get_page_addr_code get_page_addr_code_arm +#define get_param_value get_param_value_arm +#define get_phys_addr get_phys_addr_arm +#define get_phys_addr_lpae get_phys_addr_lpae_arm +#define get_phys_addr_mpu get_phys_addr_mpu_arm +#define get_phys_addr_v5 get_phys_addr_v5_arm +#define get_phys_addr_v6 get_phys_addr_v6_arm +#define get_system_memory get_system_memory_arm +#define get_ticks_per_sec get_ticks_per_sec_arm +#define g_list_insert_sorted_merged g_list_insert_sorted_merged_arm +#define _GLOBAL_OFFSET_TABLE_ _GLOBAL_OFFSET_TABLE__arm +#define gt_cntfrq_access gt_cntfrq_access_arm +#define gt_cnt_read gt_cnt_read_arm +#define gt_cnt_reset gt_cnt_reset_arm +#define gt_counter_access gt_counter_access_arm +#define gt_ctl_write gt_ctl_write_arm +#define gt_cval_write gt_cval_write_arm +#define gt_get_countervalue gt_get_countervalue_arm +#define gt_pct_access gt_pct_access_arm +#define gt_ptimer_access gt_ptimer_access_arm +#define gt_recalc_timer gt_recalc_timer_arm +#define gt_timer_access gt_timer_access_arm +#define gt_tval_read gt_tval_read_arm +#define gt_tval_write gt_tval_write_arm +#define gt_vct_access gt_vct_access_arm +#define gt_vtimer_access gt_vtimer_access_arm +#define guest_phys_blocks_free guest_phys_blocks_free_arm +#define guest_phys_blocks_init guest_phys_blocks_init_arm +#define handle_vcvt handle_vcvt_arm +#define handle_vminmaxnm handle_vminmaxnm_arm +#define handle_vrint handle_vrint_arm +#define handle_vsel handle_vsel_arm +#define has_help_option has_help_option_arm +#define have_bmi1 have_bmi1_arm +#define have_bmi2 have_bmi2_arm +#define hcr_write hcr_write_arm +#define helper_access_check_cp_reg helper_access_check_cp_reg_arm +#define helper_add_saturate helper_add_saturate_arm +#define helper_add_setq helper_add_setq_arm +#define helper_add_usaturate helper_add_usaturate_arm +#define helper_be_ldl_cmmu helper_be_ldl_cmmu_arm +#define helper_be_ldq_cmmu helper_be_ldq_cmmu_arm +#define helper_be_ldq_mmu helper_be_ldq_mmu_arm +#define helper_be_ldsl_mmu helper_be_ldsl_mmu_arm +#define helper_be_ldsw_mmu helper_be_ldsw_mmu_arm +#define helper_be_ldul_mmu helper_be_ldul_mmu_arm +#define helper_be_lduw_mmu helper_be_lduw_mmu_arm +#define helper_be_ldw_cmmu helper_be_ldw_cmmu_arm +#define helper_be_stl_mmu helper_be_stl_mmu_arm +#define helper_be_stq_mmu helper_be_stq_mmu_arm +#define helper_be_stw_mmu helper_be_stw_mmu_arm +#define helper_clear_pstate_ss helper_clear_pstate_ss_arm +#define helper_clz_arm helper_clz_arm_arm +#define helper_cpsr_read helper_cpsr_read_arm +#define helper_cpsr_write helper_cpsr_write_arm +#define helper_crc32_arm helper_crc32_arm_arm +#define helper_crc32c helper_crc32c_arm +#define helper_crypto_aese helper_crypto_aese_arm +#define helper_crypto_aesmc helper_crypto_aesmc_arm +#define helper_crypto_sha1_3reg helper_crypto_sha1_3reg_arm +#define helper_crypto_sha1h helper_crypto_sha1h_arm +#define helper_crypto_sha1su1 helper_crypto_sha1su1_arm +#define helper_crypto_sha256h helper_crypto_sha256h_arm +#define helper_crypto_sha256h2 helper_crypto_sha256h2_arm +#define helper_crypto_sha256su0 helper_crypto_sha256su0_arm +#define helper_crypto_sha256su1 helper_crypto_sha256su1_arm +#define helper_dc_zva helper_dc_zva_arm +#define helper_double_saturate helper_double_saturate_arm +#define helper_exception_internal helper_exception_internal_arm +#define helper_exception_return helper_exception_return_arm +#define helper_exception_with_syndrome helper_exception_with_syndrome_arm +#define helper_get_cp_reg helper_get_cp_reg_arm +#define helper_get_cp_reg64 helper_get_cp_reg64_arm +#define helper_get_r13_banked helper_get_r13_banked_arm +#define helper_get_user_reg helper_get_user_reg_arm +#define helper_iwmmxt_addcb helper_iwmmxt_addcb_arm +#define helper_iwmmxt_addcl helper_iwmmxt_addcl_arm +#define helper_iwmmxt_addcw helper_iwmmxt_addcw_arm +#define helper_iwmmxt_addnb helper_iwmmxt_addnb_arm +#define helper_iwmmxt_addnl helper_iwmmxt_addnl_arm +#define helper_iwmmxt_addnw helper_iwmmxt_addnw_arm +#define helper_iwmmxt_addsb helper_iwmmxt_addsb_arm +#define helper_iwmmxt_addsl helper_iwmmxt_addsl_arm +#define helper_iwmmxt_addsw helper_iwmmxt_addsw_arm +#define helper_iwmmxt_addub helper_iwmmxt_addub_arm +#define helper_iwmmxt_addul helper_iwmmxt_addul_arm +#define helper_iwmmxt_adduw helper_iwmmxt_adduw_arm +#define helper_iwmmxt_align helper_iwmmxt_align_arm +#define helper_iwmmxt_avgb0 helper_iwmmxt_avgb0_arm +#define helper_iwmmxt_avgb1 helper_iwmmxt_avgb1_arm +#define helper_iwmmxt_avgw0 helper_iwmmxt_avgw0_arm +#define helper_iwmmxt_avgw1 helper_iwmmxt_avgw1_arm +#define helper_iwmmxt_bcstb helper_iwmmxt_bcstb_arm +#define helper_iwmmxt_bcstl helper_iwmmxt_bcstl_arm +#define helper_iwmmxt_bcstw helper_iwmmxt_bcstw_arm +#define helper_iwmmxt_cmpeqb helper_iwmmxt_cmpeqb_arm +#define helper_iwmmxt_cmpeql helper_iwmmxt_cmpeql_arm +#define helper_iwmmxt_cmpeqw helper_iwmmxt_cmpeqw_arm +#define helper_iwmmxt_cmpgtsb helper_iwmmxt_cmpgtsb_arm +#define helper_iwmmxt_cmpgtsl helper_iwmmxt_cmpgtsl_arm +#define helper_iwmmxt_cmpgtsw helper_iwmmxt_cmpgtsw_arm +#define helper_iwmmxt_cmpgtub helper_iwmmxt_cmpgtub_arm +#define helper_iwmmxt_cmpgtul helper_iwmmxt_cmpgtul_arm +#define helper_iwmmxt_cmpgtuw helper_iwmmxt_cmpgtuw_arm +#define helper_iwmmxt_insr helper_iwmmxt_insr_arm +#define helper_iwmmxt_macsw helper_iwmmxt_macsw_arm +#define helper_iwmmxt_macuw helper_iwmmxt_macuw_arm +#define helper_iwmmxt_maddsq helper_iwmmxt_maddsq_arm +#define helper_iwmmxt_madduq helper_iwmmxt_madduq_arm +#define helper_iwmmxt_maxsb helper_iwmmxt_maxsb_arm +#define helper_iwmmxt_maxsl helper_iwmmxt_maxsl_arm +#define helper_iwmmxt_maxsw helper_iwmmxt_maxsw_arm +#define helper_iwmmxt_maxub helper_iwmmxt_maxub_arm +#define helper_iwmmxt_maxul helper_iwmmxt_maxul_arm +#define helper_iwmmxt_maxuw helper_iwmmxt_maxuw_arm +#define helper_iwmmxt_minsb helper_iwmmxt_minsb_arm +#define helper_iwmmxt_minsl helper_iwmmxt_minsl_arm +#define helper_iwmmxt_minsw helper_iwmmxt_minsw_arm +#define helper_iwmmxt_minub helper_iwmmxt_minub_arm +#define helper_iwmmxt_minul helper_iwmmxt_minul_arm +#define helper_iwmmxt_minuw helper_iwmmxt_minuw_arm +#define helper_iwmmxt_msbb helper_iwmmxt_msbb_arm +#define helper_iwmmxt_msbl helper_iwmmxt_msbl_arm +#define helper_iwmmxt_msbw helper_iwmmxt_msbw_arm +#define helper_iwmmxt_muladdsl helper_iwmmxt_muladdsl_arm +#define helper_iwmmxt_muladdsw helper_iwmmxt_muladdsw_arm +#define helper_iwmmxt_muladdswl helper_iwmmxt_muladdswl_arm +#define helper_iwmmxt_mulshw helper_iwmmxt_mulshw_arm +#define helper_iwmmxt_mulslw helper_iwmmxt_mulslw_arm +#define helper_iwmmxt_muluhw helper_iwmmxt_muluhw_arm +#define helper_iwmmxt_mululw helper_iwmmxt_mululw_arm +#define helper_iwmmxt_packsl helper_iwmmxt_packsl_arm +#define helper_iwmmxt_packsq helper_iwmmxt_packsq_arm +#define helper_iwmmxt_packsw helper_iwmmxt_packsw_arm +#define helper_iwmmxt_packul helper_iwmmxt_packul_arm +#define helper_iwmmxt_packuq helper_iwmmxt_packuq_arm +#define helper_iwmmxt_packuw helper_iwmmxt_packuw_arm +#define helper_iwmmxt_rorl helper_iwmmxt_rorl_arm +#define helper_iwmmxt_rorq helper_iwmmxt_rorq_arm +#define helper_iwmmxt_rorw helper_iwmmxt_rorw_arm +#define helper_iwmmxt_sadb helper_iwmmxt_sadb_arm +#define helper_iwmmxt_sadw helper_iwmmxt_sadw_arm +#define helper_iwmmxt_setpsr_nz helper_iwmmxt_setpsr_nz_arm +#define helper_iwmmxt_shufh helper_iwmmxt_shufh_arm +#define helper_iwmmxt_slll helper_iwmmxt_slll_arm +#define helper_iwmmxt_sllq helper_iwmmxt_sllq_arm +#define helper_iwmmxt_sllw helper_iwmmxt_sllw_arm +#define helper_iwmmxt_sral helper_iwmmxt_sral_arm +#define helper_iwmmxt_sraq helper_iwmmxt_sraq_arm +#define helper_iwmmxt_sraw helper_iwmmxt_sraw_arm +#define helper_iwmmxt_srll helper_iwmmxt_srll_arm +#define helper_iwmmxt_srlq helper_iwmmxt_srlq_arm +#define helper_iwmmxt_srlw helper_iwmmxt_srlw_arm +#define helper_iwmmxt_subnb helper_iwmmxt_subnb_arm +#define helper_iwmmxt_subnl helper_iwmmxt_subnl_arm +#define helper_iwmmxt_subnw helper_iwmmxt_subnw_arm +#define helper_iwmmxt_subsb helper_iwmmxt_subsb_arm +#define helper_iwmmxt_subsl helper_iwmmxt_subsl_arm +#define helper_iwmmxt_subsw helper_iwmmxt_subsw_arm +#define helper_iwmmxt_subub helper_iwmmxt_subub_arm +#define helper_iwmmxt_subul helper_iwmmxt_subul_arm +#define helper_iwmmxt_subuw helper_iwmmxt_subuw_arm +#define helper_iwmmxt_unpackhb helper_iwmmxt_unpackhb_arm +#define helper_iwmmxt_unpackhl helper_iwmmxt_unpackhl_arm +#define helper_iwmmxt_unpackhsb helper_iwmmxt_unpackhsb_arm +#define helper_iwmmxt_unpackhsl helper_iwmmxt_unpackhsl_arm +#define helper_iwmmxt_unpackhsw helper_iwmmxt_unpackhsw_arm +#define helper_iwmmxt_unpackhub helper_iwmmxt_unpackhub_arm +#define helper_iwmmxt_unpackhul helper_iwmmxt_unpackhul_arm +#define helper_iwmmxt_unpackhuw helper_iwmmxt_unpackhuw_arm +#define helper_iwmmxt_unpackhw helper_iwmmxt_unpackhw_arm +#define helper_iwmmxt_unpacklb helper_iwmmxt_unpacklb_arm +#define helper_iwmmxt_unpackll helper_iwmmxt_unpackll_arm +#define helper_iwmmxt_unpacklsb helper_iwmmxt_unpacklsb_arm +#define helper_iwmmxt_unpacklsl helper_iwmmxt_unpacklsl_arm +#define helper_iwmmxt_unpacklsw helper_iwmmxt_unpacklsw_arm +#define helper_iwmmxt_unpacklub helper_iwmmxt_unpacklub_arm +#define helper_iwmmxt_unpacklul helper_iwmmxt_unpacklul_arm +#define helper_iwmmxt_unpackluw helper_iwmmxt_unpackluw_arm +#define helper_iwmmxt_unpacklw helper_iwmmxt_unpacklw_arm +#define helper_ldb_cmmu helper_ldb_cmmu_arm +#define helper_ldb_mmu helper_ldb_mmu_arm +#define helper_ldl_cmmu helper_ldl_cmmu_arm +#define helper_ldl_mmu helper_ldl_mmu_arm +#define helper_ldq_cmmu helper_ldq_cmmu_arm +#define helper_ldq_mmu helper_ldq_mmu_arm +#define helper_ldw_cmmu helper_ldw_cmmu_arm +#define helper_ldw_mmu helper_ldw_mmu_arm +#define helper_le_ldl_cmmu helper_le_ldl_cmmu_arm +#define helper_le_ldq_cmmu helper_le_ldq_cmmu_arm +#define helper_le_ldq_mmu helper_le_ldq_mmu_arm +#define helper_le_ldsl_mmu helper_le_ldsl_mmu_arm +#define helper_le_ldsw_mmu helper_le_ldsw_mmu_arm +#define helper_le_ldul_mmu helper_le_ldul_mmu_arm +#define helper_le_lduw_mmu helper_le_lduw_mmu_arm +#define helper_le_ldw_cmmu helper_le_ldw_cmmu_arm +#define helper_le_stl_mmu helper_le_stl_mmu_arm +#define helper_le_stq_mmu helper_le_stq_mmu_arm +#define helper_le_stw_mmu helper_le_stw_mmu_arm +#define helper_msr_i_pstate helper_msr_i_pstate_arm +#define helper_neon_abd_f32 helper_neon_abd_f32_arm +#define helper_neon_abdl_s16 helper_neon_abdl_s16_arm +#define helper_neon_abdl_s32 helper_neon_abdl_s32_arm +#define helper_neon_abdl_s64 helper_neon_abdl_s64_arm +#define helper_neon_abdl_u16 helper_neon_abdl_u16_arm +#define helper_neon_abdl_u32 helper_neon_abdl_u32_arm +#define helper_neon_abdl_u64 helper_neon_abdl_u64_arm +#define helper_neon_abd_s16 helper_neon_abd_s16_arm +#define helper_neon_abd_s32 helper_neon_abd_s32_arm +#define helper_neon_abd_s8 helper_neon_abd_s8_arm +#define helper_neon_abd_u16 helper_neon_abd_u16_arm +#define helper_neon_abd_u32 helper_neon_abd_u32_arm +#define helper_neon_abd_u8 helper_neon_abd_u8_arm +#define helper_neon_abs_s16 helper_neon_abs_s16_arm +#define helper_neon_abs_s8 helper_neon_abs_s8_arm +#define helper_neon_acge_f32 helper_neon_acge_f32_arm +#define helper_neon_acge_f64 helper_neon_acge_f64_arm +#define helper_neon_acgt_f32 helper_neon_acgt_f32_arm +#define helper_neon_acgt_f64 helper_neon_acgt_f64_arm +#define helper_neon_addl_saturate_s32 helper_neon_addl_saturate_s32_arm +#define helper_neon_addl_saturate_s64 helper_neon_addl_saturate_s64_arm +#define helper_neon_addl_u16 helper_neon_addl_u16_arm +#define helper_neon_addl_u32 helper_neon_addl_u32_arm +#define helper_neon_add_u16 helper_neon_add_u16_arm +#define helper_neon_add_u8 helper_neon_add_u8_arm +#define helper_neon_ceq_f32 helper_neon_ceq_f32_arm +#define helper_neon_ceq_u16 helper_neon_ceq_u16_arm +#define helper_neon_ceq_u32 helper_neon_ceq_u32_arm +#define helper_neon_ceq_u8 helper_neon_ceq_u8_arm +#define helper_neon_cge_f32 helper_neon_cge_f32_arm +#define helper_neon_cge_s16 helper_neon_cge_s16_arm +#define helper_neon_cge_s32 helper_neon_cge_s32_arm +#define helper_neon_cge_s8 helper_neon_cge_s8_arm +#define helper_neon_cge_u16 helper_neon_cge_u16_arm +#define helper_neon_cge_u32 helper_neon_cge_u32_arm +#define helper_neon_cge_u8 helper_neon_cge_u8_arm +#define helper_neon_cgt_f32 helper_neon_cgt_f32_arm +#define helper_neon_cgt_s16 helper_neon_cgt_s16_arm +#define helper_neon_cgt_s32 helper_neon_cgt_s32_arm +#define helper_neon_cgt_s8 helper_neon_cgt_s8_arm +#define helper_neon_cgt_u16 helper_neon_cgt_u16_arm +#define helper_neon_cgt_u32 helper_neon_cgt_u32_arm +#define helper_neon_cgt_u8 helper_neon_cgt_u8_arm +#define helper_neon_cls_s16 helper_neon_cls_s16_arm +#define helper_neon_cls_s32 helper_neon_cls_s32_arm +#define helper_neon_cls_s8 helper_neon_cls_s8_arm +#define helper_neon_clz_u16 helper_neon_clz_u16_arm +#define helper_neon_clz_u8 helper_neon_clz_u8_arm +#define helper_neon_cnt_u8 helper_neon_cnt_u8_arm +#define helper_neon_fcvt_f16_to_f32 helper_neon_fcvt_f16_to_f32_arm +#define helper_neon_fcvt_f32_to_f16 helper_neon_fcvt_f32_to_f16_arm +#define helper_neon_hadd_s16 helper_neon_hadd_s16_arm +#define helper_neon_hadd_s32 helper_neon_hadd_s32_arm +#define helper_neon_hadd_s8 helper_neon_hadd_s8_arm +#define helper_neon_hadd_u16 helper_neon_hadd_u16_arm +#define helper_neon_hadd_u32 helper_neon_hadd_u32_arm +#define helper_neon_hadd_u8 helper_neon_hadd_u8_arm +#define helper_neon_hsub_s16 helper_neon_hsub_s16_arm +#define helper_neon_hsub_s32 helper_neon_hsub_s32_arm +#define helper_neon_hsub_s8 helper_neon_hsub_s8_arm +#define helper_neon_hsub_u16 helper_neon_hsub_u16_arm +#define helper_neon_hsub_u32 helper_neon_hsub_u32_arm +#define helper_neon_hsub_u8 helper_neon_hsub_u8_arm +#define helper_neon_max_s16 helper_neon_max_s16_arm +#define helper_neon_max_s32 helper_neon_max_s32_arm +#define helper_neon_max_s8 helper_neon_max_s8_arm +#define helper_neon_max_u16 helper_neon_max_u16_arm +#define helper_neon_max_u32 helper_neon_max_u32_arm +#define helper_neon_max_u8 helper_neon_max_u8_arm +#define helper_neon_min_s16 helper_neon_min_s16_arm +#define helper_neon_min_s32 helper_neon_min_s32_arm +#define helper_neon_min_s8 helper_neon_min_s8_arm +#define helper_neon_min_u16 helper_neon_min_u16_arm +#define helper_neon_min_u32 helper_neon_min_u32_arm +#define helper_neon_min_u8 helper_neon_min_u8_arm +#define helper_neon_mull_p8 helper_neon_mull_p8_arm +#define helper_neon_mull_s16 helper_neon_mull_s16_arm +#define helper_neon_mull_s8 helper_neon_mull_s8_arm +#define helper_neon_mull_u16 helper_neon_mull_u16_arm +#define helper_neon_mull_u8 helper_neon_mull_u8_arm +#define helper_neon_mul_p8 helper_neon_mul_p8_arm +#define helper_neon_mul_u16 helper_neon_mul_u16_arm +#define helper_neon_mul_u8 helper_neon_mul_u8_arm +#define helper_neon_narrow_high_u16 helper_neon_narrow_high_u16_arm +#define helper_neon_narrow_high_u8 helper_neon_narrow_high_u8_arm +#define helper_neon_narrow_round_high_u16 helper_neon_narrow_round_high_u16_arm +#define helper_neon_narrow_round_high_u8 helper_neon_narrow_round_high_u8_arm +#define helper_neon_narrow_sat_s16 helper_neon_narrow_sat_s16_arm +#define helper_neon_narrow_sat_s32 helper_neon_narrow_sat_s32_arm +#define helper_neon_narrow_sat_s8 helper_neon_narrow_sat_s8_arm +#define helper_neon_narrow_sat_u16 helper_neon_narrow_sat_u16_arm +#define helper_neon_narrow_sat_u32 helper_neon_narrow_sat_u32_arm +#define helper_neon_narrow_sat_u8 helper_neon_narrow_sat_u8_arm +#define helper_neon_narrow_u16 helper_neon_narrow_u16_arm +#define helper_neon_narrow_u8 helper_neon_narrow_u8_arm +#define helper_neon_negl_u16 helper_neon_negl_u16_arm +#define helper_neon_negl_u32 helper_neon_negl_u32_arm +#define helper_neon_paddl_u16 helper_neon_paddl_u16_arm +#define helper_neon_paddl_u32 helper_neon_paddl_u32_arm +#define helper_neon_padd_u16 helper_neon_padd_u16_arm +#define helper_neon_padd_u8 helper_neon_padd_u8_arm +#define helper_neon_pmax_s16 helper_neon_pmax_s16_arm +#define helper_neon_pmax_s8 helper_neon_pmax_s8_arm +#define helper_neon_pmax_u16 helper_neon_pmax_u16_arm +#define helper_neon_pmax_u8 helper_neon_pmax_u8_arm +#define helper_neon_pmin_s16 helper_neon_pmin_s16_arm +#define helper_neon_pmin_s8 helper_neon_pmin_s8_arm +#define helper_neon_pmin_u16 helper_neon_pmin_u16_arm +#define helper_neon_pmin_u8 helper_neon_pmin_u8_arm +#define helper_neon_pmull_64_hi helper_neon_pmull_64_hi_arm +#define helper_neon_pmull_64_lo helper_neon_pmull_64_lo_arm +#define helper_neon_qabs_s16 helper_neon_qabs_s16_arm +#define helper_neon_qabs_s32 helper_neon_qabs_s32_arm +#define helper_neon_qabs_s64 helper_neon_qabs_s64_arm +#define helper_neon_qabs_s8 helper_neon_qabs_s8_arm +#define helper_neon_qadd_s16 helper_neon_qadd_s16_arm +#define helper_neon_qadd_s32 helper_neon_qadd_s32_arm +#define helper_neon_qadd_s64 helper_neon_qadd_s64_arm +#define helper_neon_qadd_s8 helper_neon_qadd_s8_arm +#define helper_neon_qadd_u16 helper_neon_qadd_u16_arm +#define helper_neon_qadd_u32 helper_neon_qadd_u32_arm +#define helper_neon_qadd_u64 helper_neon_qadd_u64_arm +#define helper_neon_qadd_u8 helper_neon_qadd_u8_arm +#define helper_neon_qdmulh_s16 helper_neon_qdmulh_s16_arm +#define helper_neon_qdmulh_s32 helper_neon_qdmulh_s32_arm +#define helper_neon_qneg_s16 helper_neon_qneg_s16_arm +#define helper_neon_qneg_s32 helper_neon_qneg_s32_arm +#define helper_neon_qneg_s64 helper_neon_qneg_s64_arm +#define helper_neon_qneg_s8 helper_neon_qneg_s8_arm +#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_arm +#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_arm +#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_arm +#define helper_neon_qrshl_s32 helper_neon_qrshl_s32_arm +#define helper_neon_qrshl_s64 helper_neon_qrshl_s64_arm +#define helper_neon_qrshl_s8 helper_neon_qrshl_s8_arm +#define helper_neon_qrshl_u16 helper_neon_qrshl_u16_arm +#define helper_neon_qrshl_u32 helper_neon_qrshl_u32_arm +#define helper_neon_qrshl_u64 helper_neon_qrshl_u64_arm +#define helper_neon_qrshl_u8 helper_neon_qrshl_u8_arm +#define helper_neon_qshl_s16 helper_neon_qshl_s16_arm +#define helper_neon_qshl_s32 helper_neon_qshl_s32_arm +#define helper_neon_qshl_s64 helper_neon_qshl_s64_arm +#define helper_neon_qshl_s8 helper_neon_qshl_s8_arm +#define helper_neon_qshl_u16 helper_neon_qshl_u16_arm +#define helper_neon_qshl_u32 helper_neon_qshl_u32_arm +#define helper_neon_qshl_u64 helper_neon_qshl_u64_arm +#define helper_neon_qshl_u8 helper_neon_qshl_u8_arm +#define helper_neon_qshlu_s16 helper_neon_qshlu_s16_arm +#define helper_neon_qshlu_s32 helper_neon_qshlu_s32_arm +#define helper_neon_qshlu_s64 helper_neon_qshlu_s64_arm +#define helper_neon_qshlu_s8 helper_neon_qshlu_s8_arm +#define helper_neon_qsub_s16 helper_neon_qsub_s16_arm +#define helper_neon_qsub_s32 helper_neon_qsub_s32_arm +#define helper_neon_qsub_s64 helper_neon_qsub_s64_arm +#define helper_neon_qsub_s8 helper_neon_qsub_s8_arm +#define helper_neon_qsub_u16 helper_neon_qsub_u16_arm +#define helper_neon_qsub_u32 helper_neon_qsub_u32_arm +#define helper_neon_qsub_u64 helper_neon_qsub_u64_arm +#define helper_neon_qsub_u8 helper_neon_qsub_u8_arm +#define helper_neon_qunzip16 helper_neon_qunzip16_arm +#define helper_neon_qunzip32 helper_neon_qunzip32_arm +#define helper_neon_qunzip8 helper_neon_qunzip8_arm +#define helper_neon_qzip16 helper_neon_qzip16_arm +#define helper_neon_qzip32 helper_neon_qzip32_arm +#define helper_neon_qzip8 helper_neon_qzip8_arm +#define helper_neon_rbit_u8 helper_neon_rbit_u8_arm +#define helper_neon_rhadd_s16 helper_neon_rhadd_s16_arm +#define helper_neon_rhadd_s32 helper_neon_rhadd_s32_arm +#define helper_neon_rhadd_s8 helper_neon_rhadd_s8_arm +#define helper_neon_rhadd_u16 helper_neon_rhadd_u16_arm +#define helper_neon_rhadd_u32 helper_neon_rhadd_u32_arm +#define helper_neon_rhadd_u8 helper_neon_rhadd_u8_arm +#define helper_neon_rshl_s16 helper_neon_rshl_s16_arm +#define helper_neon_rshl_s32 helper_neon_rshl_s32_arm +#define helper_neon_rshl_s64 helper_neon_rshl_s64_arm +#define helper_neon_rshl_s8 helper_neon_rshl_s8_arm +#define helper_neon_rshl_u16 helper_neon_rshl_u16_arm +#define helper_neon_rshl_u32 helper_neon_rshl_u32_arm +#define helper_neon_rshl_u64 helper_neon_rshl_u64_arm +#define helper_neon_rshl_u8 helper_neon_rshl_u8_arm +#define helper_neon_shl_s16 helper_neon_shl_s16_arm +#define helper_neon_shl_s32 helper_neon_shl_s32_arm +#define helper_neon_shl_s64 helper_neon_shl_s64_arm +#define helper_neon_shl_s8 helper_neon_shl_s8_arm +#define helper_neon_shl_u16 helper_neon_shl_u16_arm +#define helper_neon_shl_u32 helper_neon_shl_u32_arm +#define helper_neon_shl_u64 helper_neon_shl_u64_arm +#define helper_neon_shl_u8 helper_neon_shl_u8_arm +#define helper_neon_sqadd_u16 helper_neon_sqadd_u16_arm +#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_arm +#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_arm +#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_arm +#define helper_neon_subl_u16 helper_neon_subl_u16_arm +#define helper_neon_subl_u32 helper_neon_subl_u32_arm +#define helper_neon_sub_u16 helper_neon_sub_u16_arm +#define helper_neon_sub_u8 helper_neon_sub_u8_arm +#define helper_neon_tbl helper_neon_tbl_arm +#define helper_neon_tst_u16 helper_neon_tst_u16_arm +#define helper_neon_tst_u32 helper_neon_tst_u32_arm +#define helper_neon_tst_u8 helper_neon_tst_u8_arm +#define helper_neon_unarrow_sat16 helper_neon_unarrow_sat16_arm +#define helper_neon_unarrow_sat32 helper_neon_unarrow_sat32_arm +#define helper_neon_unarrow_sat8 helper_neon_unarrow_sat8_arm +#define helper_neon_unzip16 helper_neon_unzip16_arm +#define helper_neon_unzip8 helper_neon_unzip8_arm +#define helper_neon_uqadd_s16 helper_neon_uqadd_s16_arm +#define helper_neon_uqadd_s32 helper_neon_uqadd_s32_arm +#define helper_neon_uqadd_s64 helper_neon_uqadd_s64_arm +#define helper_neon_uqadd_s8 helper_neon_uqadd_s8_arm +#define helper_neon_widen_s16 helper_neon_widen_s16_arm +#define helper_neon_widen_s8 helper_neon_widen_s8_arm +#define helper_neon_widen_u16 helper_neon_widen_u16_arm +#define helper_neon_widen_u8 helper_neon_widen_u8_arm +#define helper_neon_zip16 helper_neon_zip16_arm +#define helper_neon_zip8 helper_neon_zip8_arm +#define helper_pre_hvc helper_pre_hvc_arm +#define helper_pre_smc helper_pre_smc_arm +#define helper_qadd16 helper_qadd16_arm +#define helper_qadd8 helper_qadd8_arm +#define helper_qaddsubx helper_qaddsubx_arm +#define helper_qsub16 helper_qsub16_arm +#define helper_qsub8 helper_qsub8_arm +#define helper_qsubaddx helper_qsubaddx_arm +#define helper_rbit helper_rbit_arm +#define helper_recpe_f32 helper_recpe_f32_arm +#define helper_recpe_f64 helper_recpe_f64_arm +#define helper_recpe_u32 helper_recpe_u32_arm +#define helper_recps_f32 helper_recps_f32_arm +#define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_arm +#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_arm +#define helper_ret_ldub_mmu helper_ret_ldub_mmu_arm +#define helper_ret_stb_mmu helper_ret_stb_mmu_arm +#define helper_rintd helper_rintd_arm +#define helper_rintd_exact helper_rintd_exact_arm +#define helper_rints helper_rints_arm +#define helper_rints_exact helper_rints_exact_arm +#define helper_ror_cc helper_ror_cc_arm +#define helper_rsqrte_f32 helper_rsqrte_f32_arm +#define helper_rsqrte_f64 helper_rsqrte_f64_arm +#define helper_rsqrte_u32 helper_rsqrte_u32_arm +#define helper_rsqrts_f32 helper_rsqrts_f32_arm +#define helper_sadd16 helper_sadd16_arm +#define helper_sadd8 helper_sadd8_arm +#define helper_saddsubx helper_saddsubx_arm +#define helper_sar_cc helper_sar_cc_arm +#define helper_sdiv helper_sdiv_arm +#define helper_sel_flags helper_sel_flags_arm +#define helper_set_cp_reg helper_set_cp_reg_arm +#define helper_set_cp_reg64 helper_set_cp_reg64_arm +#define helper_set_neon_rmode helper_set_neon_rmode_arm +#define helper_set_r13_banked helper_set_r13_banked_arm +#define helper_set_rmode helper_set_rmode_arm +#define helper_set_user_reg helper_set_user_reg_arm +#define helper_shadd16 helper_shadd16_arm +#define helper_shadd8 helper_shadd8_arm +#define helper_shaddsubx helper_shaddsubx_arm +#define helper_shl_cc helper_shl_cc_arm +#define helper_shr_cc helper_shr_cc_arm +#define helper_shsub16 helper_shsub16_arm +#define helper_shsub8 helper_shsub8_arm +#define helper_shsubaddx helper_shsubaddx_arm +#define helper_ssat helper_ssat_arm +#define helper_ssat16 helper_ssat16_arm +#define helper_ssub16 helper_ssub16_arm +#define helper_ssub8 helper_ssub8_arm +#define helper_ssubaddx helper_ssubaddx_arm +#define helper_stb_mmu helper_stb_mmu_arm +#define helper_stl_mmu helper_stl_mmu_arm +#define helper_stq_mmu helper_stq_mmu_arm +#define helper_stw_mmu helper_stw_mmu_arm +#define helper_sub_saturate helper_sub_saturate_arm +#define helper_sub_usaturate helper_sub_usaturate_arm +#define helper_sxtb16 helper_sxtb16_arm +#define helper_uadd16 helper_uadd16_arm +#define helper_uadd8 helper_uadd8_arm +#define helper_uaddsubx helper_uaddsubx_arm +#define helper_udiv helper_udiv_arm +#define helper_uhadd16 helper_uhadd16_arm +#define helper_uhadd8 helper_uhadd8_arm +#define helper_uhaddsubx helper_uhaddsubx_arm +#define helper_uhsub16 helper_uhsub16_arm +#define helper_uhsub8 helper_uhsub8_arm +#define helper_uhsubaddx helper_uhsubaddx_arm +#define helper_uqadd16 helper_uqadd16_arm +#define helper_uqadd8 helper_uqadd8_arm +#define helper_uqaddsubx helper_uqaddsubx_arm +#define helper_uqsub16 helper_uqsub16_arm +#define helper_uqsub8 helper_uqsub8_arm +#define helper_uqsubaddx helper_uqsubaddx_arm +#define helper_usad8 helper_usad8_arm +#define helper_usat helper_usat_arm +#define helper_usat16 helper_usat16_arm +#define helper_usub16 helper_usub16_arm +#define helper_usub8 helper_usub8_arm +#define helper_usubaddx helper_usubaddx_arm +#define helper_uxtb16 helper_uxtb16_arm +#define helper_v7m_mrs helper_v7m_mrs_arm +#define helper_v7m_msr helper_v7m_msr_arm +#define helper_vfp_absd helper_vfp_absd_arm +#define helper_vfp_abss helper_vfp_abss_arm +#define helper_vfp_addd helper_vfp_addd_arm +#define helper_vfp_adds helper_vfp_adds_arm +#define helper_vfp_cmpd helper_vfp_cmpd_arm +#define helper_vfp_cmped helper_vfp_cmped_arm +#define helper_vfp_cmpes helper_vfp_cmpes_arm +#define helper_vfp_cmps helper_vfp_cmps_arm +#define helper_vfp_divd helper_vfp_divd_arm +#define helper_vfp_divs helper_vfp_divs_arm +#define helper_vfp_fcvtds helper_vfp_fcvtds_arm +#define helper_vfp_fcvt_f16_to_f32 helper_vfp_fcvt_f16_to_f32_arm +#define helper_vfp_fcvt_f16_to_f64 helper_vfp_fcvt_f16_to_f64_arm +#define helper_vfp_fcvt_f32_to_f16 helper_vfp_fcvt_f32_to_f16_arm +#define helper_vfp_fcvt_f64_to_f16 helper_vfp_fcvt_f64_to_f16_arm +#define helper_vfp_fcvtsd helper_vfp_fcvtsd_arm +#define helper_vfp_get_fpscr helper_vfp_get_fpscr_arm +#define helper_vfp_maxd helper_vfp_maxd_arm +#define helper_vfp_maxnumd helper_vfp_maxnumd_arm +#define helper_vfp_maxnums helper_vfp_maxnums_arm +#define helper_vfp_maxs helper_vfp_maxs_arm +#define helper_vfp_mind helper_vfp_mind_arm +#define helper_vfp_minnumd helper_vfp_minnumd_arm +#define helper_vfp_minnums helper_vfp_minnums_arm +#define helper_vfp_mins helper_vfp_mins_arm +#define helper_vfp_muladdd helper_vfp_muladdd_arm +#define helper_vfp_muladds helper_vfp_muladds_arm +#define helper_vfp_muld helper_vfp_muld_arm +#define helper_vfp_muls helper_vfp_muls_arm +#define helper_vfp_negd helper_vfp_negd_arm +#define helper_vfp_negs helper_vfp_negs_arm +#define helper_vfp_set_fpscr helper_vfp_set_fpscr_arm +#define helper_vfp_shtod helper_vfp_shtod_arm +#define helper_vfp_shtos helper_vfp_shtos_arm +#define helper_vfp_sitod helper_vfp_sitod_arm +#define helper_vfp_sitos helper_vfp_sitos_arm +#define helper_vfp_sltod helper_vfp_sltod_arm +#define helper_vfp_sltos helper_vfp_sltos_arm +#define helper_vfp_sqrtd helper_vfp_sqrtd_arm +#define helper_vfp_sqrts helper_vfp_sqrts_arm +#define helper_vfp_sqtod helper_vfp_sqtod_arm +#define helper_vfp_sqtos helper_vfp_sqtos_arm +#define helper_vfp_subd helper_vfp_subd_arm +#define helper_vfp_subs helper_vfp_subs_arm +#define helper_vfp_toshd helper_vfp_toshd_arm +#define helper_vfp_toshd_round_to_zero helper_vfp_toshd_round_to_zero_arm +#define helper_vfp_toshs helper_vfp_toshs_arm +#define helper_vfp_toshs_round_to_zero helper_vfp_toshs_round_to_zero_arm +#define helper_vfp_tosid helper_vfp_tosid_arm +#define helper_vfp_tosis helper_vfp_tosis_arm +#define helper_vfp_tosizd helper_vfp_tosizd_arm +#define helper_vfp_tosizs helper_vfp_tosizs_arm +#define helper_vfp_tosld helper_vfp_tosld_arm +#define helper_vfp_tosld_round_to_zero helper_vfp_tosld_round_to_zero_arm +#define helper_vfp_tosls helper_vfp_tosls_arm +#define helper_vfp_tosls_round_to_zero helper_vfp_tosls_round_to_zero_arm +#define helper_vfp_tosqd helper_vfp_tosqd_arm +#define helper_vfp_tosqs helper_vfp_tosqs_arm +#define helper_vfp_touhd helper_vfp_touhd_arm +#define helper_vfp_touhd_round_to_zero helper_vfp_touhd_round_to_zero_arm +#define helper_vfp_touhs helper_vfp_touhs_arm +#define helper_vfp_touhs_round_to_zero helper_vfp_touhs_round_to_zero_arm +#define helper_vfp_touid helper_vfp_touid_arm +#define helper_vfp_touis helper_vfp_touis_arm +#define helper_vfp_touizd helper_vfp_touizd_arm +#define helper_vfp_touizs helper_vfp_touizs_arm +#define helper_vfp_tould helper_vfp_tould_arm +#define helper_vfp_tould_round_to_zero helper_vfp_tould_round_to_zero_arm +#define helper_vfp_touls helper_vfp_touls_arm +#define helper_vfp_touls_round_to_zero helper_vfp_touls_round_to_zero_arm +#define helper_vfp_touqd helper_vfp_touqd_arm +#define helper_vfp_touqs helper_vfp_touqs_arm +#define helper_vfp_uhtod helper_vfp_uhtod_arm +#define helper_vfp_uhtos helper_vfp_uhtos_arm +#define helper_vfp_uitod helper_vfp_uitod_arm +#define helper_vfp_uitos helper_vfp_uitos_arm +#define helper_vfp_ultod helper_vfp_ultod_arm +#define helper_vfp_ultos helper_vfp_ultos_arm +#define helper_vfp_uqtod helper_vfp_uqtod_arm +#define helper_vfp_uqtos helper_vfp_uqtos_arm +#define helper_wfe helper_wfe_arm +#define helper_wfi helper_wfi_arm +#define hex2decimal hex2decimal_arm +#define hw_breakpoint_update hw_breakpoint_update_arm +#define hw_breakpoint_update_all hw_breakpoint_update_all_arm +#define hw_watchpoint_update hw_watchpoint_update_arm +#define hw_watchpoint_update_all hw_watchpoint_update_all_arm +#define _init _init_arm +#define init_cpreg_list init_cpreg_list_arm +#define init_lists init_lists_arm +#define input_type_enum input_type_enum_arm +#define int128_2_64 int128_2_64_arm +#define int128_add int128_add_arm +#define int128_addto int128_addto_arm +#define int128_and int128_and_arm +#define int128_eq int128_eq_arm +#define int128_ge int128_ge_arm +#define int128_get64 int128_get64_arm +#define int128_gt int128_gt_arm +#define int128_le int128_le_arm +#define int128_lt int128_lt_arm +#define int128_make64 int128_make64_arm +#define int128_max int128_max_arm +#define int128_min int128_min_arm +#define int128_ne int128_ne_arm +#define int128_neg int128_neg_arm +#define int128_nz int128_nz_arm +#define int128_rshift int128_rshift_arm +#define int128_sub int128_sub_arm +#define int128_subfrom int128_subfrom_arm +#define int128_zero int128_zero_arm +#define int16_to_float32 int16_to_float32_arm +#define int16_to_float64 int16_to_float64_arm +#define int32_to_float128 int32_to_float128_arm +#define int32_to_float32 int32_to_float32_arm +#define int32_to_float64 int32_to_float64_arm +#define int32_to_floatx80 int32_to_floatx80_arm +#define int64_to_float128 int64_to_float128_arm +#define int64_to_float32 int64_to_float32_arm +#define int64_to_float64 int64_to_float64_arm +#define int64_to_floatx80 int64_to_floatx80_arm +#define invalidate_and_set_dirty invalidate_and_set_dirty_arm +#define invalidate_page_bitmap invalidate_page_bitmap_arm +#define io_mem_read io_mem_read_arm +#define io_mem_write io_mem_write_arm +#define io_readb io_readb_arm +#define io_readl io_readl_arm +#define io_readq io_readq_arm +#define io_readw io_readw_arm +#define iotlb_to_region iotlb_to_region_arm +#define io_writeb io_writeb_arm +#define io_writel io_writel_arm +#define io_writeq io_writeq_arm +#define io_writew io_writew_arm +#define is_a64 is_a64_arm +#define is_help_option is_help_option_arm +#define is_power_of_2 is_power_of_2_arm +#define isr_read isr_read_arm +#define is_valid_option_list is_valid_option_list_arm +#define iwmmxt_load_creg iwmmxt_load_creg_arm +#define iwmmxt_load_reg iwmmxt_load_reg_arm +#define iwmmxt_store_creg iwmmxt_store_creg_arm +#define iwmmxt_store_reg iwmmxt_store_reg_arm +#define __jit_debug_descriptor __jit_debug_descriptor_arm +#define __jit_debug_register_code __jit_debug_register_code_arm +#define json_lexer json_lexer_arm +#define json_lexer_destroy json_lexer_destroy_arm +#define json_lexer_feed json_lexer_feed_arm +#define json_lexer_feed_char json_lexer_feed_char_arm +#define json_lexer_flush json_lexer_flush_arm +#define json_lexer_init json_lexer_init_arm +#define json_message_parser_destroy json_message_parser_destroy_arm +#define json_message_parser_feed json_message_parser_feed_arm +#define json_message_parser_flush json_message_parser_flush_arm +#define json_message_parser_init json_message_parser_init_arm +#define json_message_process_token json_message_process_token_arm +#define json_parser_parse json_parser_parse_arm +#define json_parser_parse_err json_parser_parse_err_arm +#define kvm_to_cpreg_id kvm_to_cpreg_id_arm +#define last_ram_offset last_ram_offset_arm +#define ldl_be_p ldl_be_p_arm +#define ldl_be_phys ldl_be_phys_arm +#define ldl_he_p ldl_he_p_arm +#define ldl_le_p ldl_le_p_arm +#define ldl_le_phys ldl_le_phys_arm +#define ldl_phys ldl_phys_arm +#define ldl_phys_internal ldl_phys_internal_arm +#define ldq_be_p ldq_be_p_arm +#define ldq_be_phys ldq_be_phys_arm +#define ldq_he_p ldq_he_p_arm +#define ldq_le_p ldq_le_p_arm +#define ldq_le_phys ldq_le_phys_arm +#define ldq_phys ldq_phys_arm +#define ldq_phys_internal ldq_phys_internal_arm +#define ldst_name ldst_name_arm +#define ldub_p ldub_p_arm +#define ldub_phys ldub_phys_arm +#define lduw_be_p lduw_be_p_arm +#define lduw_be_phys lduw_be_phys_arm +#define lduw_he_p lduw_he_p_arm +#define lduw_le_p lduw_le_p_arm +#define lduw_le_phys lduw_le_phys_arm +#define lduw_phys lduw_phys_arm +#define lduw_phys_internal lduw_phys_internal_arm +#define le128 le128_arm +#define linked_bp_matches linked_bp_matches_arm +#define listener_add_address_space listener_add_address_space_arm +#define load_cpu_offset load_cpu_offset_arm +#define load_reg load_reg_arm +#define load_reg_var load_reg_var_arm +#define log_cpu_state log_cpu_state_arm +#define lpae_cp_reginfo lpae_cp_reginfo_arm +#define lt128 lt128_arm +#define machine_class_init machine_class_init_arm +#define machine_finalize machine_finalize_arm +#define machine_info machine_info_arm +#define machine_initfn machine_initfn_arm +#define machine_register_types machine_register_types_arm +#define machvirt_init machvirt_init_arm +#define machvirt_machine_init machvirt_machine_init_arm +#define maj maj_arm +#define mapping_conflict mapping_conflict_arm +#define mapping_contiguous mapping_contiguous_arm +#define mapping_have_same_region mapping_have_same_region_arm +#define mapping_merge mapping_merge_arm +#define mem_add mem_add_arm +#define mem_begin mem_begin_arm +#define mem_commit mem_commit_arm +#define memory_access_is_direct memory_access_is_direct_arm +#define memory_access_size memory_access_size_arm +#define memory_init memory_init_arm +#define memory_listener_match memory_listener_match_arm +#define memory_listener_register memory_listener_register_arm +#define memory_listener_unregister memory_listener_unregister_arm +#define memory_map_init memory_map_init_arm +#define memory_mapping_filter memory_mapping_filter_arm +#define memory_mapping_list_add_mapping_sorted memory_mapping_list_add_mapping_sorted_arm +#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_arm +#define memory_mapping_list_free memory_mapping_list_free_arm +#define memory_mapping_list_init memory_mapping_list_init_arm +#define memory_region_access_valid memory_region_access_valid_arm +#define memory_region_add_eventfd memory_region_add_eventfd_arm +#define memory_region_add_subregion memory_region_add_subregion_arm +#define memory_region_add_subregion_common memory_region_add_subregion_common_arm +#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_arm +#define memory_region_big_endian memory_region_big_endian_arm +#define memory_region_clear_coalescing memory_region_clear_coalescing_arm +#define memory_region_clear_pending memory_region_clear_pending_arm +#define memory_region_del_eventfd memory_region_del_eventfd_arm +#define memory_region_del_subregion memory_region_del_subregion_arm +#define memory_region_destructor_alias memory_region_destructor_alias_arm +#define memory_region_destructor_none memory_region_destructor_none_arm +#define memory_region_destructor_ram memory_region_destructor_ram_arm +#define memory_region_destructor_ram_from_ptr memory_region_destructor_ram_from_ptr_arm +#define memory_region_dispatch_read memory_region_dispatch_read_arm +#define memory_region_dispatch_read1 memory_region_dispatch_read1_arm +#define memory_region_dispatch_write memory_region_dispatch_write_arm +#define memory_region_escape_name memory_region_escape_name_arm +#define memory_region_finalize memory_region_finalize_arm +#define memory_region_find memory_region_find_arm +#define memory_region_get_addr memory_region_get_addr_arm +#define memory_region_get_alignment memory_region_get_alignment_arm +#define memory_region_get_container memory_region_get_container_arm +#define memory_region_get_fd memory_region_get_fd_arm +#define memory_region_get_may_overlap memory_region_get_may_overlap_arm +#define memory_region_get_priority memory_region_get_priority_arm +#define memory_region_get_ram_addr memory_region_get_ram_addr_arm +#define memory_region_get_ram_ptr memory_region_get_ram_ptr_arm +#define memory_region_get_size memory_region_get_size_arm +#define memory_region_info memory_region_info_arm +#define memory_region_init memory_region_init_arm +#define memory_region_init_alias memory_region_init_alias_arm +#define memory_region_initfn memory_region_initfn_arm +#define memory_region_init_io memory_region_init_io_arm +#define memory_region_init_ram memory_region_init_ram_arm +#define memory_region_init_ram_ptr memory_region_init_ram_ptr_arm +#define memory_region_init_reservation memory_region_init_reservation_arm +#define memory_region_ioeventfd_before memory_region_ioeventfd_before_arm +#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_arm +#define memory_region_is_iommu memory_region_is_iommu_arm +#define memory_region_is_logging memory_region_is_logging_arm +#define memory_region_is_mapped memory_region_is_mapped_arm +#define memory_region_is_ram memory_region_is_ram_arm +#define memory_region_is_rom memory_region_is_rom_arm +#define memory_region_is_romd memory_region_is_romd_arm +#define memory_region_is_skip_dump memory_region_is_skip_dump_arm +#define memory_region_is_unassigned memory_region_is_unassigned_arm +#define memory_region_name memory_region_name_arm +#define memory_region_need_escape memory_region_need_escape_arm +#define memory_region_notify_iommu memory_region_notify_iommu_arm +#define memory_region_oldmmio_read_accessor memory_region_oldmmio_read_accessor_arm +#define memory_region_oldmmio_write_accessor memory_region_oldmmio_write_accessor_arm +#define memory_region_present memory_region_present_arm +#define memory_region_read_accessor memory_region_read_accessor_arm +#define memory_region_readd_subregion memory_region_readd_subregion_arm +#define memory_region_ref memory_region_ref_arm +#define memory_region_register_iommu_notifier memory_region_register_iommu_notifier_arm +#define memory_region_resolve_container memory_region_resolve_container_arm +#define memory_region_rom_device_set_romd memory_region_rom_device_set_romd_arm +#define memory_region_section_get_iotlb memory_region_section_get_iotlb_arm +#define memory_region_set_address memory_region_set_address_arm +#define memory_region_set_alias_offset memory_region_set_alias_offset_arm +#define memory_region_set_enabled memory_region_set_enabled_arm +#define memory_region_set_readonly memory_region_set_readonly_arm +#define memory_region_set_skip_dump memory_region_set_skip_dump_arm +#define memory_region_size memory_region_size_arm +#define memory_region_to_address_space memory_region_to_address_space_arm +#define memory_region_transaction_begin memory_region_transaction_begin_arm +#define memory_region_transaction_commit memory_region_transaction_commit_arm +#define memory_region_unref memory_region_unref_arm +#define memory_region_unregister_iommu_notifier memory_region_unregister_iommu_notifier_arm +#define memory_region_update_coalesced_range memory_region_update_coalesced_range_arm +#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_arm +#define memory_region_update_container_subregions memory_region_update_container_subregions_arm +#define memory_region_write_accessor memory_region_write_accessor_arm +#define memory_region_wrong_endianness memory_region_wrong_endianness_arm +#define memory_try_enable_merging memory_try_enable_merging_arm +#define mktimegm mktimegm_arm +#define module_call_init module_call_init_arm +#define module_load module_load_arm +#define mod_utf8_codepoint mod_utf8_codepoint_arm +#define mpidr_cp_reginfo mpidr_cp_reginfo_arm +#define mpidr_read mpidr_read_arm +#define msr_mask msr_mask_arm +#define mul128By64To192 mul128By64To192_arm +#define mul128To256 mul128To256_arm +#define mul64To128 mul64To128_arm +#define muldiv64 muldiv64_arm +#define neon_2rm_is_float_op neon_2rm_is_float_op_arm +#define neon_2rm_sizes neon_2rm_sizes_arm +#define neon_3r_sizes neon_3r_sizes_arm +#define neon_get_scalar neon_get_scalar_arm +#define neon_load_reg neon_load_reg_arm +#define neon_load_reg64 neon_load_reg64_arm +#define neon_load_scratch neon_load_scratch_arm +#define neon_ls_element_type neon_ls_element_type_arm +#define neon_reg_offset neon_reg_offset_arm +#define neon_store_reg neon_store_reg_arm +#define neon_store_reg64 neon_store_reg64_arm +#define neon_store_scratch neon_store_scratch_arm +#define new_ldst_label new_ldst_label_arm +#define next_list next_list_arm +#define normalizeFloat128Subnormal normalizeFloat128Subnormal_arm +#define normalizeFloat16Subnormal normalizeFloat16Subnormal_arm +#define normalizeFloat32Subnormal normalizeFloat32Subnormal_arm +#define normalizeFloat64Subnormal normalizeFloat64Subnormal_arm +#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_arm +#define normalizeRoundAndPackFloat128 normalizeRoundAndPackFloat128_arm +#define normalizeRoundAndPackFloat32 normalizeRoundAndPackFloat32_arm +#define normalizeRoundAndPackFloat64 normalizeRoundAndPackFloat64_arm +#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_arm +#define not_v6_cp_reginfo not_v6_cp_reginfo_arm +#define not_v7_cp_reginfo not_v7_cp_reginfo_arm +#define not_v8_cp_reginfo not_v8_cp_reginfo_arm +#define object_child_foreach object_child_foreach_arm +#define object_class_foreach object_class_foreach_arm +#define object_class_foreach_tramp object_class_foreach_tramp_arm +#define object_class_get_list object_class_get_list_arm +#define object_class_get_list_tramp object_class_get_list_tramp_arm +#define object_class_get_parent object_class_get_parent_arm +#define object_deinit object_deinit_arm +#define object_dynamic_cast object_dynamic_cast_arm +#define object_finalize object_finalize_arm +#define object_finalize_child_property object_finalize_child_property_arm +#define object_get_child_property object_get_child_property_arm +#define object_get_link_property object_get_link_property_arm +#define object_get_root object_get_root_arm +#define object_initialize_with_type object_initialize_with_type_arm +#define object_init_with_type object_init_with_type_arm +#define object_instance_init object_instance_init_arm +#define object_new_with_type object_new_with_type_arm +#define object_post_init_with_type object_post_init_with_type_arm +#define object_property_add_alias object_property_add_alias_arm +#define object_property_add_link object_property_add_link_arm +#define object_property_add_uint16_ptr object_property_add_uint16_ptr_arm +#define object_property_add_uint32_ptr object_property_add_uint32_ptr_arm +#define object_property_add_uint64_ptr object_property_add_uint64_ptr_arm +#define object_property_add_uint8_ptr object_property_add_uint8_ptr_arm +#define object_property_allow_set_link object_property_allow_set_link_arm +#define object_property_del object_property_del_arm +#define object_property_del_all object_property_del_all_arm +#define object_property_del_child object_property_del_child_arm +#define object_property_find object_property_find_arm +#define object_property_get object_property_get_arm +#define object_property_get_bool object_property_get_bool_arm +#define object_property_get_enum object_property_get_enum_arm +#define object_property_get_int object_property_get_int_arm +#define object_property_get_link object_property_get_link_arm +#define object_property_get_qobject object_property_get_qobject_arm +#define object_property_get_str object_property_get_str_arm +#define object_property_get_type object_property_get_type_arm +#define object_property_get_uint16List object_property_get_uint16List_arm +#define object_property_is_child object_property_is_child_arm +#define object_property_print object_property_print_arm +#define object_property_set object_property_set_arm +#define object_property_set_description object_property_set_description_arm +#define object_property_set_link object_property_set_link_arm +#define object_property_set_qobject object_property_set_qobject_arm +#define object_release_link_property object_release_link_property_arm +#define object_resolve_abs_path object_resolve_abs_path_arm +#define object_resolve_child_property object_resolve_child_property_arm +#define object_resolve_link object_resolve_link_arm +#define object_resolve_link_property object_resolve_link_property_arm +#define object_resolve_partial_path object_resolve_partial_path_arm +#define object_resolve_path object_resolve_path_arm +#define object_resolve_path_component object_resolve_path_component_arm +#define object_resolve_path_type object_resolve_path_type_arm +#define object_set_link_property object_set_link_property_arm +#define object_unparent object_unparent_arm +#define omap_cachemaint_write omap_cachemaint_write_arm +#define omap_cp_reginfo omap_cp_reginfo_arm +#define omap_threadid_write omap_threadid_write_arm +#define omap_ticonfig_write omap_ticonfig_write_arm +#define omap_wfi_write omap_wfi_write_arm +#define op_bits op_bits_arm +#define open_modeflags open_modeflags_arm +#define op_to_mov op_to_mov_arm +#define op_to_movi op_to_movi_arm +#define opts_accepts_any opts_accepts_any_arm +#define opts_do_parse opts_do_parse_arm +#define opt_set opt_set_arm +#define opts_parse opts_parse_arm +#define output_type_enum output_type_enum_arm +#define packFloat128 packFloat128_arm +#define packFloat16 packFloat16_arm +#define packFloat32 packFloat32_arm +#define packFloat64 packFloat64_arm +#define packFloatx80 packFloatx80_arm +#define page_find page_find_arm +#define page_find_alloc page_find_alloc_arm +#define page_flush_tb page_flush_tb_arm +#define page_flush_tb_1 page_flush_tb_1_arm +#define page_init page_init_arm +#define page_size_init page_size_init_arm +#define par par_arm +#define parse_array parse_array_arm +#define parse_error parse_error_arm +#define parse_escape parse_escape_arm +#define parse_json parse_json_arm +#define parse_keyword parse_keyword_arm +#define parse_literal parse_literal_arm +#define parse_object parse_object_arm +#define parse_optional parse_optional_arm +#define parse_option_bool parse_option_bool_arm +#define parse_option_number parse_option_number_arm +#define parse_option_size parse_option_size_arm +#define parse_pair parse_pair_arm +#define parser_context_free parser_context_free_arm +#define parser_context_new parser_context_new_arm +#define parser_context_peek_token parser_context_peek_token_arm +#define parser_context_pop_token parser_context_pop_token_arm +#define parser_context_restore parser_context_restore_arm +#define parser_context_save parser_context_save_arm +#define parse_str parse_str_arm +#define parse_type_bool parse_type_bool_arm +#define parse_type_int parse_type_int_arm +#define parse_type_number parse_type_number_arm +#define parse_type_size parse_type_size_arm +#define parse_type_str parse_type_str_arm +#define parse_uint parse_uint_arm +#define parse_uint_full parse_uint_full_arm +#define parse_value parse_value_arm +#define par_write par_write_arm +#define patch_reloc patch_reloc_arm +#define pause_all_vcpus pause_all_vcpus_arm +#define phys_map_node_alloc phys_map_node_alloc_arm +#define phys_map_node_reserve phys_map_node_reserve_arm +#define phys_mem_alloc phys_mem_alloc_arm +#define phys_mem_set_alloc phys_mem_set_alloc_arm +#define phys_page_compact phys_page_compact_arm +#define phys_page_compact_all phys_page_compact_all_arm +#define phys_page_find phys_page_find_arm +#define phys_page_set phys_page_set_arm +#define phys_page_set_level phys_page_set_level_arm +#define phys_section_add phys_section_add_arm +#define phys_section_destroy phys_section_destroy_arm +#define phys_sections_free phys_sections_free_arm +#define pickNaN pickNaN_arm +#define pickNaNMulAdd pickNaNMulAdd_arm +#define pmccfiltr_write pmccfiltr_write_arm +#define pmccntr_read pmccntr_read_arm +#define pmccntr_sync pmccntr_sync_arm +#define pmccntr_write pmccntr_write_arm +#define pmccntr_write32 pmccntr_write32_arm +#define pmcntenclr_write pmcntenclr_write_arm +#define pmcntenset_write pmcntenset_write_arm +#define pmcr_write pmcr_write_arm +#define pmintenclr_write pmintenclr_write_arm +#define pmintenset_write pmintenset_write_arm +#define pmovsr_write pmovsr_write_arm +#define pmreg_access pmreg_access_arm +#define pmsav5_cp_reginfo pmsav5_cp_reginfo_arm +#define pmsav5_data_ap_read pmsav5_data_ap_read_arm +#define pmsav5_data_ap_write pmsav5_data_ap_write_arm +#define pmsav5_insn_ap_read pmsav5_insn_ap_read_arm +#define pmsav5_insn_ap_write pmsav5_insn_ap_write_arm +#define pmuserenr_write pmuserenr_write_arm +#define pmxevtyper_write pmxevtyper_write_arm +#define pow2floor pow2floor_arm +#define print_type_bool print_type_bool_arm +#define print_type_int print_type_int_arm +#define print_type_number print_type_number_arm +#define print_type_size print_type_size_arm +#define print_type_str print_type_str_arm +#define propagateFloat128NaN propagateFloat128NaN_arm +#define propagateFloat32MulAddNaN propagateFloat32MulAddNaN_arm +#define propagateFloat32NaN propagateFloat32NaN_arm +#define propagateFloat64MulAddNaN propagateFloat64MulAddNaN_arm +#define propagateFloat64NaN propagateFloat64NaN_arm +#define propagateFloatx80NaN propagateFloatx80NaN_arm +#define property_get_alias property_get_alias_arm +#define property_get_bool property_get_bool_arm +#define property_get_str property_get_str_arm +#define property_get_uint16_ptr property_get_uint16_ptr_arm +#define property_get_uint32_ptr property_get_uint32_ptr_arm +#define property_get_uint64_ptr property_get_uint64_ptr_arm +#define property_get_uint8_ptr property_get_uint8_ptr_arm +#define property_release_alias property_release_alias_arm +#define property_release_bool property_release_bool_arm +#define property_release_str property_release_str_arm +#define property_resolve_alias property_resolve_alias_arm +#define property_set_alias property_set_alias_arm +#define property_set_bool property_set_bool_arm +#define property_set_str property_set_str_arm +#define pstate_read pstate_read_arm +#define pstate_write pstate_write_arm +#define pxa250_initfn pxa250_initfn_arm +#define pxa255_initfn pxa255_initfn_arm +#define pxa260_initfn pxa260_initfn_arm +#define pxa261_initfn pxa261_initfn_arm +#define pxa262_initfn pxa262_initfn_arm +#define pxa270a0_initfn pxa270a0_initfn_arm +#define pxa270a1_initfn pxa270a1_initfn_arm +#define pxa270b0_initfn pxa270b0_initfn_arm +#define pxa270b1_initfn pxa270b1_initfn_arm +#define pxa270c0_initfn pxa270c0_initfn_arm +#define pxa270c5_initfn pxa270c5_initfn_arm +#define qapi_dealloc_end_implicit_struct qapi_dealloc_end_implicit_struct_arm +#define qapi_dealloc_end_list qapi_dealloc_end_list_arm +#define qapi_dealloc_end_struct qapi_dealloc_end_struct_arm +#define qapi_dealloc_get_visitor qapi_dealloc_get_visitor_arm +#define qapi_dealloc_next_list qapi_dealloc_next_list_arm +#define qapi_dealloc_pop qapi_dealloc_pop_arm +#define qapi_dealloc_push qapi_dealloc_push_arm +#define qapi_dealloc_start_implicit_struct qapi_dealloc_start_implicit_struct_arm +#define qapi_dealloc_start_list qapi_dealloc_start_list_arm +#define qapi_dealloc_start_struct qapi_dealloc_start_struct_arm +#define qapi_dealloc_start_union qapi_dealloc_start_union_arm +#define qapi_dealloc_type_bool qapi_dealloc_type_bool_arm +#define qapi_dealloc_type_enum qapi_dealloc_type_enum_arm +#define qapi_dealloc_type_int qapi_dealloc_type_int_arm +#define qapi_dealloc_type_number qapi_dealloc_type_number_arm +#define qapi_dealloc_type_size qapi_dealloc_type_size_arm +#define qapi_dealloc_type_str qapi_dealloc_type_str_arm +#define qapi_dealloc_visitor_cleanup qapi_dealloc_visitor_cleanup_arm +#define qapi_dealloc_visitor_new qapi_dealloc_visitor_new_arm +#define qapi_free_boolList qapi_free_boolList_arm +#define qapi_free_ErrorClassList qapi_free_ErrorClassList_arm +#define qapi_free_int16List qapi_free_int16List_arm +#define qapi_free_int32List qapi_free_int32List_arm +#define qapi_free_int64List qapi_free_int64List_arm +#define qapi_free_int8List qapi_free_int8List_arm +#define qapi_free_intList qapi_free_intList_arm +#define qapi_free_numberList qapi_free_numberList_arm +#define qapi_free_strList qapi_free_strList_arm +#define qapi_free_uint16List qapi_free_uint16List_arm +#define qapi_free_uint32List qapi_free_uint32List_arm +#define qapi_free_uint64List qapi_free_uint64List_arm +#define qapi_free_uint8List qapi_free_uint8List_arm +#define qapi_free_X86CPUFeatureWordInfo qapi_free_X86CPUFeatureWordInfo_arm +#define qapi_free_X86CPUFeatureWordInfoList qapi_free_X86CPUFeatureWordInfoList_arm +#define qapi_free_X86CPURegister32List qapi_free_X86CPURegister32List_arm +#define qbool_destroy_obj qbool_destroy_obj_arm +#define qbool_from_int qbool_from_int_arm +#define qbool_get_int qbool_get_int_arm +#define qbool_type qbool_type_arm +#define qbus_create qbus_create_arm +#define qbus_create_inplace qbus_create_inplace_arm +#define qbus_finalize qbus_finalize_arm +#define qbus_initfn qbus_initfn_arm +#define qbus_realize qbus_realize_arm +#define qdev_create qdev_create_arm +#define qdev_get_type qdev_get_type_arm +#define qdev_register_types qdev_register_types_arm +#define qdev_set_parent_bus qdev_set_parent_bus_arm +#define qdev_try_create qdev_try_create_arm +#define qdict_add_key qdict_add_key_arm +#define qdict_array_split qdict_array_split_arm +#define qdict_clone_shallow qdict_clone_shallow_arm +#define qdict_del qdict_del_arm +#define qdict_destroy_obj qdict_destroy_obj_arm +#define qdict_entry_key qdict_entry_key_arm +#define qdict_entry_value qdict_entry_value_arm +#define qdict_extract_subqdict qdict_extract_subqdict_arm +#define qdict_find qdict_find_arm +#define qdict_first qdict_first_arm +#define qdict_flatten qdict_flatten_arm +#define qdict_flatten_qdict qdict_flatten_qdict_arm +#define qdict_flatten_qlist qdict_flatten_qlist_arm +#define qdict_get qdict_get_arm +#define qdict_get_bool qdict_get_bool_arm +#define qdict_get_double qdict_get_double_arm +#define qdict_get_int qdict_get_int_arm +#define qdict_get_obj qdict_get_obj_arm +#define qdict_get_qdict qdict_get_qdict_arm +#define qdict_get_qlist qdict_get_qlist_arm +#define qdict_get_str qdict_get_str_arm +#define qdict_get_try_bool qdict_get_try_bool_arm +#define qdict_get_try_int qdict_get_try_int_arm +#define qdict_get_try_str qdict_get_try_str_arm +#define qdict_haskey qdict_haskey_arm +#define qdict_has_prefixed_entries qdict_has_prefixed_entries_arm +#define qdict_iter qdict_iter_arm +#define qdict_join qdict_join_arm +#define qdict_new qdict_new_arm +#define qdict_next qdict_next_arm +#define qdict_next_entry qdict_next_entry_arm +#define qdict_put_obj qdict_put_obj_arm +#define qdict_size qdict_size_arm +#define qdict_type qdict_type_arm +#define qemu_clock_get_us qemu_clock_get_us_arm +#define qemu_clock_ptr qemu_clock_ptr_arm +#define qemu_clocks qemu_clocks_arm +#define qemu_cond_destroy qemu_cond_destroy_arm +#define qemu_cpu_is_self qemu_cpu_is_self_arm +#define qemu_cpu_kick_thread qemu_cpu_kick_thread_arm +#define qemu_daemon qemu_daemon_arm +#define qemu_event_destroy qemu_event_destroy_arm +#define qemu_event_init qemu_event_init_arm +#define qemu_event_reset qemu_event_reset_arm +#define qemu_event_set qemu_event_set_arm +#define qemu_event_wait qemu_event_wait_arm +#define qemu_fdatasync qemu_fdatasync_arm +#define qemu_flush_coalesced_mmio_buffer qemu_flush_coalesced_mmio_buffer_arm +#define qemu_get_cpu qemu_get_cpu_arm +#define qemu_get_guest_memory_mapping qemu_get_guest_memory_mapping_arm +#define qemu_get_guest_simple_memory_mapping qemu_get_guest_simple_memory_mapping_arm +#define qemu_get_local_state_pathname qemu_get_local_state_pathname_arm +#define qemu_get_ram_block qemu_get_ram_block_arm +#define qemu_get_ram_block_host_ptr qemu_get_ram_block_host_ptr_arm +#define qemu_get_ram_fd qemu_get_ram_fd_arm +#define qemu_get_ram_ptr qemu_get_ram_ptr_arm +#define qemu_host_page_mask qemu_host_page_mask_arm +#define qemu_host_page_size qemu_host_page_size_arm +#define qemu_init_vcpu qemu_init_vcpu_arm +#define qemu_ld_helpers qemu_ld_helpers_arm +#define qemu_log_close qemu_log_close_arm +#define qemu_log_enabled qemu_log_enabled_arm +#define qemu_log_flush qemu_log_flush_arm +#define qemu_loglevel_mask qemu_loglevel_mask_arm +#define qemu_log_vprintf qemu_log_vprintf_arm +#define qemu_mutex_destroy qemu_mutex_destroy_arm +#define qemu_mutex_lock_ramlist qemu_mutex_lock_ramlist_arm +#define qemu_mutex_trylock qemu_mutex_trylock_arm +#define qemu_mutex_unlock_ramlist qemu_mutex_unlock_ramlist_arm +#define qemu_oom_check qemu_oom_check_arm +#define qemu_opt_del qemu_opt_del_arm +#define qemu_opt_del_all qemu_opt_del_all_arm +#define qemu_opt_find qemu_opt_find_arm +#define qemu_opt_foreach qemu_opt_foreach_arm +#define qemu_opt_get qemu_opt_get_arm +#define qemu_opt_get_bool qemu_opt_get_bool_arm +#define qemu_opt_get_bool_del qemu_opt_get_bool_del_arm +#define qemu_opt_get_bool_helper qemu_opt_get_bool_helper_arm +#define qemu_opt_get_del qemu_opt_get_del_arm +#define qemu_opt_get_number qemu_opt_get_number_arm +#define qemu_opt_get_number_del qemu_opt_get_number_del_arm +#define qemu_opt_get_number_helper qemu_opt_get_number_helper_arm +#define qemu_opt_get_size qemu_opt_get_size_arm +#define qemu_opt_get_size_del qemu_opt_get_size_del_arm +#define qemu_opt_get_size_helper qemu_opt_get_size_helper_arm +#define qemu_opt_has_help_opt qemu_opt_has_help_opt_arm +#define qemu_opt_parse qemu_opt_parse_arm +#define qemu_opts_absorb_qdict qemu_opts_absorb_qdict_arm +#define qemu_opts_append qemu_opts_append_arm +#define qemu_opts_create qemu_opts_create_arm +#define qemu_opts_del qemu_opts_del_arm +#define qemu_opts_do_parse qemu_opts_do_parse_arm +#define qemu_opt_set qemu_opt_set_arm +#define qemu_opt_set_bool qemu_opt_set_bool_arm +#define qemu_opt_set_err qemu_opt_set_err_arm +#define qemu_opt_set_number qemu_opt_set_number_arm +#define qemu_opts_find qemu_opts_find_arm +#define qemu_opts_foreach qemu_opts_foreach_arm +#define qemu_opts_free qemu_opts_free_arm +#define qemu_opts_from_qdict qemu_opts_from_qdict_arm +#define qemu_opts_from_qdict_1 qemu_opts_from_qdict_1_arm +#define qemu_opts_id qemu_opts_id_arm +#define qemu_opts_parse qemu_opts_parse_arm +#define qemu_opts_print qemu_opts_print_arm +#define qemu_opts_print_help qemu_opts_print_help_arm +#define qemu_opts_reset qemu_opts_reset_arm +#define qemu_opts_set qemu_opts_set_arm +#define qemu_opts_set_defaults qemu_opts_set_defaults_arm +#define qemu_opts_set_id qemu_opts_set_id_arm +#define qemu_opts_to_qdict qemu_opts_to_qdict_arm +#define qemu_opts_validate qemu_opts_validate_arm +#define qemu_opt_unset qemu_opt_unset_arm +#define qemu_parse_fd qemu_parse_fd_arm +#define qemu_pipe qemu_pipe_arm +#define qemu_ram_addr_from_host qemu_ram_addr_from_host_arm +#define qemu_ram_addr_from_host_nofail qemu_ram_addr_from_host_nofail_arm +#define qemu_ram_alloc qemu_ram_alloc_arm +#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_arm +#define qemu_ram_foreach_block qemu_ram_foreach_block_arm +#define qemu_ram_free qemu_ram_free_arm +#define qemu_ram_free_from_ptr qemu_ram_free_from_ptr_arm +#define qemu_ram_ptr_length qemu_ram_ptr_length_arm +#define qemu_ram_remap qemu_ram_remap_arm +#define qemu_ram_setup_dump qemu_ram_setup_dump_arm +#define qemu_ram_unset_idstr qemu_ram_unset_idstr_arm +#define qemu_real_host_page_size qemu_real_host_page_size_arm +#define qemu_sem_destroy qemu_sem_destroy_arm +#define qemu_sem_init qemu_sem_init_arm +#define qemu_sem_post qemu_sem_post_arm +#define qemu_sem_timedwait qemu_sem_timedwait_arm +#define qemu_sem_wait qemu_sem_wait_arm +#define qemu_set_cloexec qemu_set_cloexec_arm +#define qemu_set_tty_echo qemu_set_tty_echo_arm +#define qemu_st_helpers qemu_st_helpers_arm +#define qemu_strnlen qemu_strnlen_arm +#define qemu_strsep qemu_strsep_arm +#define qemu_tcg_cpu_thread_fn qemu_tcg_cpu_thread_fn_arm +#define qemu_tcg_init_vcpu qemu_tcg_init_vcpu_arm +#define qemu_thread_exit qemu_thread_exit_arm +#define qemu_try_memalign qemu_try_memalign_arm +#define qentry_destroy qentry_destroy_arm +#define qerror_human qerror_human_arm +#define qerror_report qerror_report_arm +#define qerror_report_err qerror_report_err_arm +#define qfloat_destroy_obj qfloat_destroy_obj_arm +#define qfloat_from_double qfloat_from_double_arm +#define qfloat_get_double qfloat_get_double_arm +#define qfloat_type qfloat_type_arm +#define qint_destroy_obj qint_destroy_obj_arm +#define qint_from_int qint_from_int_arm +#define qint_get_int qint_get_int_arm +#define qint_type qint_type_arm +#define qlist_append_obj qlist_append_obj_arm +#define qlist_copy qlist_copy_arm +#define qlist_copy_elem qlist_copy_elem_arm +#define qlist_destroy_obj qlist_destroy_obj_arm +#define qlist_empty qlist_empty_arm +#define qlist_entry_obj qlist_entry_obj_arm +#define qlist_first qlist_first_arm +#define qlist_iter qlist_iter_arm +#define qlist_new qlist_new_arm +#define qlist_next qlist_next_arm +#define qlist_peek qlist_peek_arm +#define qlist_pop qlist_pop_arm +#define qlist_size qlist_size_arm +#define qlist_size_iter qlist_size_iter_arm +#define qlist_type qlist_type_arm +#define qmp_input_end_implicit_struct qmp_input_end_implicit_struct_arm +#define qmp_input_end_list qmp_input_end_list_arm +#define qmp_input_end_struct qmp_input_end_struct_arm +#define qmp_input_get_next_type qmp_input_get_next_type_arm +#define qmp_input_get_object qmp_input_get_object_arm +#define qmp_input_get_visitor qmp_input_get_visitor_arm +#define qmp_input_next_list qmp_input_next_list_arm +#define qmp_input_optional qmp_input_optional_arm +#define qmp_input_pop qmp_input_pop_arm +#define qmp_input_push qmp_input_push_arm +#define qmp_input_start_implicit_struct qmp_input_start_implicit_struct_arm +#define qmp_input_start_list qmp_input_start_list_arm +#define qmp_input_start_struct qmp_input_start_struct_arm +#define qmp_input_type_bool qmp_input_type_bool_arm +#define qmp_input_type_int qmp_input_type_int_arm +#define qmp_input_type_number qmp_input_type_number_arm +#define qmp_input_type_str qmp_input_type_str_arm +#define qmp_input_visitor_cleanup qmp_input_visitor_cleanup_arm +#define qmp_input_visitor_new qmp_input_visitor_new_arm +#define qmp_input_visitor_new_strict qmp_input_visitor_new_strict_arm +#define qmp_output_add_obj qmp_output_add_obj_arm +#define qmp_output_end_list qmp_output_end_list_arm +#define qmp_output_end_struct qmp_output_end_struct_arm +#define qmp_output_first qmp_output_first_arm +#define qmp_output_get_qobject qmp_output_get_qobject_arm +#define qmp_output_get_visitor qmp_output_get_visitor_arm +#define qmp_output_last qmp_output_last_arm +#define qmp_output_next_list qmp_output_next_list_arm +#define qmp_output_pop qmp_output_pop_arm +#define qmp_output_push_obj qmp_output_push_obj_arm +#define qmp_output_start_list qmp_output_start_list_arm +#define qmp_output_start_struct qmp_output_start_struct_arm +#define qmp_output_type_bool qmp_output_type_bool_arm +#define qmp_output_type_int qmp_output_type_int_arm +#define qmp_output_type_number qmp_output_type_number_arm +#define qmp_output_type_str qmp_output_type_str_arm +#define qmp_output_visitor_cleanup qmp_output_visitor_cleanup_arm +#define qmp_output_visitor_new qmp_output_visitor_new_arm +#define qobject_decref qobject_decref_arm +#define qobject_from_json qobject_from_json_arm +#define qobject_from_jsonf qobject_from_jsonf_arm +#define qobject_from_jsonv qobject_from_jsonv_arm +#define qobject_incref qobject_incref_arm +#define qobject_to_json qobject_to_json_arm +#define qobject_to_json_pretty qobject_to_json_pretty_arm +#define qobject_to_qbool qobject_to_qbool_arm +#define qobject_to_qdict qobject_to_qdict_arm +#define qobject_to_qfloat qobject_to_qfloat_arm +#define qobject_to_qint qobject_to_qint_arm +#define qobject_to_qlist qobject_to_qlist_arm +#define qobject_to_qstring qobject_to_qstring_arm +#define qobject_type qobject_type_arm +#define qstring_append qstring_append_arm +#define qstring_append_chr qstring_append_chr_arm +#define qstring_append_int qstring_append_int_arm +#define qstring_destroy_obj qstring_destroy_obj_arm +#define qstring_from_escaped_str qstring_from_escaped_str_arm +#define qstring_from_str qstring_from_str_arm +#define qstring_from_substr qstring_from_substr_arm +#define qstring_get_length qstring_get_length_arm +#define qstring_get_str qstring_get_str_arm +#define qstring_new qstring_new_arm +#define qstring_type qstring_type_arm +#define ram_block_add ram_block_add_arm +#define ram_size ram_size_arm +#define range_compare range_compare_arm +#define range_covers_byte range_covers_byte_arm +#define range_get_last range_get_last_arm +#define range_merge range_merge_arm +#define ranges_can_merge ranges_can_merge_arm +#define raw_read raw_read_arm +#define raw_write raw_write_arm +#define rcon rcon_arm +#define read_raw_cp_reg read_raw_cp_reg_arm +#define recip_estimate recip_estimate_arm +#define recip_sqrt_estimate recip_sqrt_estimate_arm +#define register_cp_regs_for_features register_cp_regs_for_features_arm +#define register_multipage register_multipage_arm +#define register_subpage register_subpage_arm +#define register_tm_clones register_tm_clones_arm +#define register_types_object register_types_object_arm +#define regnames regnames_arm +#define render_memory_region render_memory_region_arm +#define reset_all_temps reset_all_temps_arm +#define reset_temp reset_temp_arm +#define rol32 rol32_arm +#define rol64 rol64_arm +#define ror32 ror32_arm +#define ror64 ror64_arm +#define roundAndPackFloat128 roundAndPackFloat128_arm +#define roundAndPackFloat16 roundAndPackFloat16_arm +#define roundAndPackFloat32 roundAndPackFloat32_arm +#define roundAndPackFloat64 roundAndPackFloat64_arm +#define roundAndPackFloatx80 roundAndPackFloatx80_arm +#define roundAndPackInt32 roundAndPackInt32_arm +#define roundAndPackInt64 roundAndPackInt64_arm +#define roundAndPackUint64 roundAndPackUint64_arm +#define round_to_inf round_to_inf_arm +#define run_on_cpu run_on_cpu_arm +#define s0 s0_arm +#define S0 S0_arm +#define s1 s1_arm +#define S1 S1_arm +#define sa1100_initfn sa1100_initfn_arm +#define sa1110_initfn sa1110_initfn_arm +#define save_globals save_globals_arm +#define scr_write scr_write_arm +#define sctlr_write sctlr_write_arm +#define set_bit set_bit_arm +#define set_bits set_bits_arm +#define set_default_nan_mode set_default_nan_mode_arm +#define set_feature set_feature_arm +#define set_float_detect_tininess set_float_detect_tininess_arm +#define set_float_exception_flags set_float_exception_flags_arm +#define set_float_rounding_mode set_float_rounding_mode_arm +#define set_flush_inputs_to_zero set_flush_inputs_to_zero_arm +#define set_flush_to_zero set_flush_to_zero_arm +#define set_swi_errno set_swi_errno_arm +#define sextract32 sextract32_arm +#define sextract64 sextract64_arm +#define shift128ExtraRightJamming shift128ExtraRightJamming_arm +#define shift128Right shift128Right_arm +#define shift128RightJamming shift128RightJamming_arm +#define shift32RightJamming shift32RightJamming_arm +#define shift64ExtraRightJamming shift64ExtraRightJamming_arm +#define shift64RightJamming shift64RightJamming_arm +#define shifter_out_im shifter_out_im_arm +#define shortShift128Left shortShift128Left_arm +#define shortShift192Left shortShift192Left_arm +#define simple_mpu_ap_bits simple_mpu_ap_bits_arm +#define size_code_gen_buffer size_code_gen_buffer_arm +#define slow_bitmap_and slow_bitmap_and_arm +#define slow_bitmap_andnot slow_bitmap_andnot_arm +#define slow_bitmap_complement slow_bitmap_complement_arm +#define slow_bitmap_empty slow_bitmap_empty_arm +#define slow_bitmap_equal slow_bitmap_equal_arm +#define slow_bitmap_full slow_bitmap_full_arm +#define slow_bitmap_intersects slow_bitmap_intersects_arm +#define slow_bitmap_or slow_bitmap_or_arm +#define slow_bitmap_xor slow_bitmap_xor_arm +#define softmmu_lock_user softmmu_lock_user_arm +#define softmmu_lock_user_string softmmu_lock_user_string_arm +#define softmmu_tget32 softmmu_tget32_arm +#define softmmu_tget8 softmmu_tget8_arm +#define softmmu_tput32 softmmu_tput32_arm +#define softmmu_unlock_user softmmu_unlock_user_arm +#define sort_constraints sort_constraints_arm +#define sp_el0_access sp_el0_access_arm +#define spin_lock spin_lock_arm +#define spin_unlock spin_unlock_arm +#define spsel_read spsel_read_arm +#define spsel_write spsel_write_arm +#define start_list start_list_arm +#define stb_p stb_p_arm +#define stb_phys stb_phys_arm +#define stl_be_p stl_be_p_arm +#define stl_be_phys stl_be_phys_arm +#define stl_he_p stl_he_p_arm +#define stl_le_p stl_le_p_arm +#define stl_le_phys stl_le_phys_arm +#define stl_phys stl_phys_arm +#define stl_phys_internal stl_phys_internal_arm +#define stl_phys_notdirty stl_phys_notdirty_arm +#define store_cpu_offset store_cpu_offset_arm +#define store_reg store_reg_arm +#define store_reg_bx store_reg_bx_arm +#define store_reg_from_load store_reg_from_load_arm +#define stq_be_p stq_be_p_arm +#define stq_be_phys stq_be_phys_arm +#define stq_he_p stq_he_p_arm +#define stq_le_p stq_le_p_arm +#define stq_le_phys stq_le_phys_arm +#define stq_phys stq_phys_arm +#define string_input_get_visitor string_input_get_visitor_arm +#define string_input_visitor_cleanup string_input_visitor_cleanup_arm +#define string_input_visitor_new string_input_visitor_new_arm +#define string_output_append string_output_append_arm +#define string_output_append_range string_output_append_range_arm +#define string_output_get_string string_output_get_string_arm +#define string_output_get_visitor string_output_get_visitor_arm +#define string_output_set string_output_set_arm +#define string_output_visitor_cleanup string_output_visitor_cleanup_arm +#define string_output_visitor_new string_output_visitor_new_arm +#define stristart stristart_arm +#define strongarm_cp_reginfo strongarm_cp_reginfo_arm +#define strpadcpy strpadcpy_arm +#define strstart strstart_arm +#define strtosz strtosz_arm +#define strtosz_suffix strtosz_suffix_arm +#define stw_be_p stw_be_p_arm +#define stw_be_phys stw_be_phys_arm +#define stw_he_p stw_he_p_arm +#define stw_le_p stw_le_p_arm +#define stw_le_phys stw_le_phys_arm +#define stw_phys stw_phys_arm +#define stw_phys_internal stw_phys_internal_arm +#define sub128 sub128_arm +#define sub16_sat sub16_sat_arm +#define sub16_usat sub16_usat_arm +#define sub192 sub192_arm +#define sub8_sat sub8_sat_arm +#define sub8_usat sub8_usat_arm +#define subFloat128Sigs subFloat128Sigs_arm +#define subFloat32Sigs subFloat32Sigs_arm +#define subFloat64Sigs subFloat64Sigs_arm +#define subFloatx80Sigs subFloatx80Sigs_arm +#define subpage_accepts subpage_accepts_arm +#define subpage_init subpage_init_arm +#define subpage_ops subpage_ops_arm +#define subpage_read subpage_read_arm +#define subpage_register subpage_register_arm +#define subpage_write subpage_write_arm +#define suffix_mul suffix_mul_arm +#define swap_commutative swap_commutative_arm +#define swap_commutative2 swap_commutative2_arm +#define switch_mode switch_mode_arm +#define switch_v7m_sp switch_v7m_sp_arm +#define syn_aa32_bkpt syn_aa32_bkpt_arm +#define syn_aa32_hvc syn_aa32_hvc_arm +#define syn_aa32_smc syn_aa32_smc_arm +#define syn_aa32_svc syn_aa32_svc_arm +#define syn_breakpoint syn_breakpoint_arm +#define sync_globals sync_globals_arm +#define syn_cp14_rrt_trap syn_cp14_rrt_trap_arm +#define syn_cp14_rt_trap syn_cp14_rt_trap_arm +#define syn_cp15_rrt_trap syn_cp15_rrt_trap_arm +#define syn_cp15_rt_trap syn_cp15_rt_trap_arm +#define syn_data_abort syn_data_abort_arm +#define syn_fp_access_trap syn_fp_access_trap_arm +#define syn_insn_abort syn_insn_abort_arm +#define syn_swstep syn_swstep_arm +#define syn_uncategorized syn_uncategorized_arm +#define syn_watchpoint syn_watchpoint_arm +#define syscall_err syscall_err_arm +#define system_bus_class_init system_bus_class_init_arm +#define system_bus_info system_bus_info_arm +#define t2ee_cp_reginfo t2ee_cp_reginfo_arm +#define table_logic_cc table_logic_cc_arm +#define target_parse_constraint target_parse_constraint_arm +#define target_words_bigendian target_words_bigendian_arm +#define tb_add_jump tb_add_jump_arm +#define tb_alloc tb_alloc_arm +#define tb_alloc_page tb_alloc_page_arm +#define tb_check_watchpoint tb_check_watchpoint_arm +#define tb_find_fast tb_find_fast_arm +#define tb_find_pc tb_find_pc_arm +#define tb_find_slow tb_find_slow_arm +#define tb_flush tb_flush_arm +#define tb_flush_jmp_cache tb_flush_jmp_cache_arm +#define tb_free tb_free_arm +#define tb_gen_code tb_gen_code_arm +#define tb_hash_remove tb_hash_remove_arm +#define tb_invalidate_phys_addr tb_invalidate_phys_addr_arm +#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_arm +#define tb_invalidate_phys_range tb_invalidate_phys_range_arm +#define tb_jmp_cache_hash_func tb_jmp_cache_hash_func_arm +#define tb_jmp_cache_hash_page tb_jmp_cache_hash_page_arm +#define tb_jmp_remove tb_jmp_remove_arm +#define tb_link_page tb_link_page_arm +#define tb_page_remove tb_page_remove_arm +#define tb_phys_hash_func tb_phys_hash_func_arm +#define tb_phys_invalidate tb_phys_invalidate_arm +#define tb_reset_jump tb_reset_jump_arm +#define tb_set_jmp_target tb_set_jmp_target_arm +#define tb_set_jmp_target1 tb_set_jmp_target1_arm +#define tcg_accel_class_init tcg_accel_class_init_arm +#define tcg_accel_type tcg_accel_type_arm +#define tcg_add_param_i32 tcg_add_param_i32_arm +#define tcg_add_param_i64 tcg_add_param_i64_arm +#define tcg_add_target_add_op_defs tcg_add_target_add_op_defs_arm +#define tcg_allowed tcg_allowed_arm +#define tcg_canonicalize_memop tcg_canonicalize_memop_arm +#define tcg_commit tcg_commit_arm +#define tcg_cond_to_jcc tcg_cond_to_jcc_arm +#define tcg_constant_folding tcg_constant_folding_arm +#define tcg_const_i32 tcg_const_i32_arm +#define tcg_const_i64 tcg_const_i64_arm +#define tcg_const_local_i32 tcg_const_local_i32_arm +#define tcg_const_local_i64 tcg_const_local_i64_arm +#define tcg_context_init tcg_context_init_arm +#define tcg_cpu_address_space_init tcg_cpu_address_space_init_arm +#define tcg_cpu_exec tcg_cpu_exec_arm +#define tcg_current_code_size tcg_current_code_size_arm +#define tcg_dump_info tcg_dump_info_arm +#define tcg_dump_ops tcg_dump_ops_arm +#define tcg_exec_all tcg_exec_all_arm +#define tcg_find_helper tcg_find_helper_arm +#define tcg_func_start tcg_func_start_arm +#define tcg_gen_abs_i32 tcg_gen_abs_i32_arm +#define tcg_gen_add2_i32 tcg_gen_add2_i32_arm +#define tcg_gen_add_i32 tcg_gen_add_i32_arm +#define tcg_gen_add_i64 tcg_gen_add_i64_arm +#define tcg_gen_addi_i32 tcg_gen_addi_i32_arm +#define tcg_gen_addi_i64 tcg_gen_addi_i64_arm +#define tcg_gen_andc_i32 tcg_gen_andc_i32_arm +#define tcg_gen_and_i32 tcg_gen_and_i32_arm +#define tcg_gen_and_i64 tcg_gen_and_i64_arm +#define tcg_gen_andi_i32 tcg_gen_andi_i32_arm +#define tcg_gen_andi_i64 tcg_gen_andi_i64_arm +#define tcg_gen_br tcg_gen_br_arm +#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_arm +#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_arm +#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_arm +#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_arm +#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_arm +#define tcg_gen_callN tcg_gen_callN_arm +#define tcg_gen_code tcg_gen_code_arm +#define tcg_gen_code_common tcg_gen_code_common_arm +#define tcg_gen_code_search_pc tcg_gen_code_search_pc_arm +#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_arm +#define tcg_gen_debug_insn_start tcg_gen_debug_insn_start_arm +#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_arm +#define tcg_gen_exit_tb tcg_gen_exit_tb_arm +#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_arm +#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_arm +#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_arm +#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_arm +#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_arm +#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_arm +#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_arm +#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_arm +#define tcg_gen_goto_tb tcg_gen_goto_tb_arm +#define tcg_gen_ld_i32 tcg_gen_ld_i32_arm +#define tcg_gen_ld_i64 tcg_gen_ld_i64_arm +#define tcg_gen_ldst_op_i32 tcg_gen_ldst_op_i32_arm +#define tcg_gen_ldst_op_i64 tcg_gen_ldst_op_i64_arm +#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_arm +#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_arm +#define tcg_gen_mov_i32 tcg_gen_mov_i32_arm +#define tcg_gen_mov_i64 tcg_gen_mov_i64_arm +#define tcg_gen_movi_i32 tcg_gen_movi_i32_arm +#define tcg_gen_movi_i64 tcg_gen_movi_i64_arm +#define tcg_gen_mul_i32 tcg_gen_mul_i32_arm +#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_arm +#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_arm +#define tcg_gen_neg_i32 tcg_gen_neg_i32_arm +#define tcg_gen_neg_i64 tcg_gen_neg_i64_arm +#define tcg_gen_not_i32 tcg_gen_not_i32_arm +#define tcg_gen_op0 tcg_gen_op0_arm +#define tcg_gen_op1i tcg_gen_op1i_arm +#define tcg_gen_op2_i32 tcg_gen_op2_i32_arm +#define tcg_gen_op2_i64 tcg_gen_op2_i64_arm +#define tcg_gen_op2i_i32 tcg_gen_op2i_i32_arm +#define tcg_gen_op2i_i64 tcg_gen_op2i_i64_arm +#define tcg_gen_op3_i32 tcg_gen_op3_i32_arm +#define tcg_gen_op3_i64 tcg_gen_op3_i64_arm +#define tcg_gen_op4_i32 tcg_gen_op4_i32_arm +#define tcg_gen_op4i_i32 tcg_gen_op4i_i32_arm +#define tcg_gen_op4ii_i32 tcg_gen_op4ii_i32_arm +#define tcg_gen_op4ii_i64 tcg_gen_op4ii_i64_arm +#define tcg_gen_op5ii_i32 tcg_gen_op5ii_i32_arm +#define tcg_gen_op6_i32 tcg_gen_op6_i32_arm +#define tcg_gen_op6i_i32 tcg_gen_op6i_i32_arm +#define tcg_gen_op6i_i64 tcg_gen_op6i_i64_arm +#define tcg_gen_orc_i32 tcg_gen_orc_i32_arm +#define tcg_gen_or_i32 tcg_gen_or_i32_arm +#define tcg_gen_or_i64 tcg_gen_or_i64_arm +#define tcg_gen_ori_i32 tcg_gen_ori_i32_arm +#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_arm +#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_arm +#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_arm +#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_arm +#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_arm +#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_arm +#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_arm +#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_arm +#define tcg_gen_sar_i32 tcg_gen_sar_i32_arm +#define tcg_gen_sari_i32 tcg_gen_sari_i32_arm +#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_arm +#define tcg_gen_shl_i32 tcg_gen_shl_i32_arm +#define tcg_gen_shl_i64 tcg_gen_shl_i64_arm +#define tcg_gen_shli_i32 tcg_gen_shli_i32_arm +#define tcg_gen_shli_i64 tcg_gen_shli_i64_arm +#define tcg_gen_shr_i32 tcg_gen_shr_i32_arm +#define tcg_gen_shifti_i64 tcg_gen_shifti_i64_arm +#define tcg_gen_shr_i64 tcg_gen_shr_i64_arm +#define tcg_gen_shri_i32 tcg_gen_shri_i32_arm +#define tcg_gen_shri_i64 tcg_gen_shri_i64_arm +#define tcg_gen_st_i32 tcg_gen_st_i32_arm +#define tcg_gen_st_i64 tcg_gen_st_i64_arm +#define tcg_gen_sub_i32 tcg_gen_sub_i32_arm +#define tcg_gen_sub_i64 tcg_gen_sub_i64_arm +#define tcg_gen_subi_i32 tcg_gen_subi_i32_arm +#define tcg_gen_trunc_i64_i32 tcg_gen_trunc_i64_i32_arm +#define tcg_gen_trunc_shr_i64_i32 tcg_gen_trunc_shr_i64_i32_arm +#define tcg_gen_xor_i32 tcg_gen_xor_i32_arm +#define tcg_gen_xor_i64 tcg_gen_xor_i64_arm +#define tcg_gen_xori_i32 tcg_gen_xori_i32_arm +#define tcg_get_arg_str_i32 tcg_get_arg_str_i32_arm +#define tcg_get_arg_str_i64 tcg_get_arg_str_i64_arm +#define tcg_get_arg_str_idx tcg_get_arg_str_idx_arm +#define tcg_global_mem_new_i32 tcg_global_mem_new_i32_arm +#define tcg_global_mem_new_i64 tcg_global_mem_new_i64_arm +#define tcg_global_mem_new_internal tcg_global_mem_new_internal_arm +#define tcg_global_reg_new_i32 tcg_global_reg_new_i32_arm +#define tcg_global_reg_new_i64 tcg_global_reg_new_i64_arm +#define tcg_global_reg_new_internal tcg_global_reg_new_internal_arm +#define tcg_handle_interrupt tcg_handle_interrupt_arm +#define tcg_init tcg_init_arm +#define tcg_invert_cond tcg_invert_cond_arm +#define tcg_la_bb_end tcg_la_bb_end_arm +#define tcg_la_func_end tcg_la_func_end_arm +#define tcg_liveness_analysis tcg_liveness_analysis_arm +#define tcg_malloc tcg_malloc_arm +#define tcg_malloc_internal tcg_malloc_internal_arm +#define tcg_op_defs_org tcg_op_defs_org_arm +#define tcg_opt_gen_mov tcg_opt_gen_mov_arm +#define tcg_opt_gen_movi tcg_opt_gen_movi_arm +#define tcg_optimize tcg_optimize_arm +#define tcg_out16 tcg_out16_arm +#define tcg_out32 tcg_out32_arm +#define tcg_out64 tcg_out64_arm +#define tcg_out8 tcg_out8_arm +#define tcg_out_addi tcg_out_addi_arm +#define tcg_out_branch tcg_out_branch_arm +#define tcg_out_brcond32 tcg_out_brcond32_arm +#define tcg_out_brcond64 tcg_out_brcond64_arm +#define tcg_out_bswap32 tcg_out_bswap32_arm +#define tcg_out_bswap64 tcg_out_bswap64_arm +#define tcg_out_call tcg_out_call_arm +#define tcg_out_cmp tcg_out_cmp_arm +#define tcg_out_ext16s tcg_out_ext16s_arm +#define tcg_out_ext16u tcg_out_ext16u_arm +#define tcg_out_ext32s tcg_out_ext32s_arm +#define tcg_out_ext32u tcg_out_ext32u_arm +#define tcg_out_ext8s tcg_out_ext8s_arm +#define tcg_out_ext8u tcg_out_ext8u_arm +#define tcg_out_jmp tcg_out_jmp_arm +#define tcg_out_jxx tcg_out_jxx_arm +#define tcg_out_label tcg_out_label_arm +#define tcg_out_ld tcg_out_ld_arm +#define tcg_out_modrm tcg_out_modrm_arm +#define tcg_out_modrm_offset tcg_out_modrm_offset_arm +#define tcg_out_modrm_sib_offset tcg_out_modrm_sib_offset_arm +#define tcg_out_mov tcg_out_mov_arm +#define tcg_out_movcond32 tcg_out_movcond32_arm +#define tcg_out_movcond64 tcg_out_movcond64_arm +#define tcg_out_movi tcg_out_movi_arm +#define tcg_out_op tcg_out_op_arm +#define tcg_out_pop tcg_out_pop_arm +#define tcg_out_push tcg_out_push_arm +#define tcg_out_qemu_ld tcg_out_qemu_ld_arm +#define tcg_out_qemu_ld_direct tcg_out_qemu_ld_direct_arm +#define tcg_out_qemu_ld_slow_path tcg_out_qemu_ld_slow_path_arm +#define tcg_out_qemu_st tcg_out_qemu_st_arm +#define tcg_out_qemu_st_direct tcg_out_qemu_st_direct_arm +#define tcg_out_qemu_st_slow_path tcg_out_qemu_st_slow_path_arm +#define tcg_out_reloc tcg_out_reloc_arm +#define tcg_out_rolw_8 tcg_out_rolw_8_arm +#define tcg_out_setcond32 tcg_out_setcond32_arm +#define tcg_out_setcond64 tcg_out_setcond64_arm +#define tcg_out_shifti tcg_out_shifti_arm +#define tcg_out_st tcg_out_st_arm +#define tcg_out_tb_finalize tcg_out_tb_finalize_arm +#define tcg_out_tb_init tcg_out_tb_init_arm +#define tcg_out_tlb_load tcg_out_tlb_load_arm +#define tcg_out_vex_modrm tcg_out_vex_modrm_arm +#define tcg_patch32 tcg_patch32_arm +#define tcg_patch8 tcg_patch8_arm +#define tcg_pcrel_diff tcg_pcrel_diff_arm +#define tcg_pool_reset tcg_pool_reset_arm +#define tcg_prologue_init tcg_prologue_init_arm +#define tcg_ptr_byte_diff tcg_ptr_byte_diff_arm +#define tcg_reg_alloc tcg_reg_alloc_arm +#define tcg_reg_alloc_bb_end tcg_reg_alloc_bb_end_arm +#define tcg_reg_alloc_call tcg_reg_alloc_call_arm +#define tcg_reg_alloc_mov tcg_reg_alloc_mov_arm +#define tcg_reg_alloc_movi tcg_reg_alloc_movi_arm +#define tcg_reg_alloc_op tcg_reg_alloc_op_arm +#define tcg_reg_alloc_start tcg_reg_alloc_start_arm +#define tcg_reg_free tcg_reg_free_arm +#define tcg_register_jit tcg_register_jit_arm +#define tcg_register_jit_int tcg_register_jit_int_arm +#define tcg_reg_sync tcg_reg_sync_arm +#define tcg_set_frame tcg_set_frame_arm +#define tcg_set_nop tcg_set_nop_arm +#define tcg_swap_cond tcg_swap_cond_arm +#define tcg_target_callee_save_regs tcg_target_callee_save_regs_arm +#define tcg_target_call_iarg_regs tcg_target_call_iarg_regs_arm +#define tcg_target_call_oarg_regs tcg_target_call_oarg_regs_arm +#define tcg_target_const_match tcg_target_const_match_arm +#define tcg_target_init tcg_target_init_arm +#define tcg_target_qemu_prologue tcg_target_qemu_prologue_arm +#define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_arm +#define tcg_temp_alloc tcg_temp_alloc_arm +#define tcg_temp_free_i32 tcg_temp_free_i32_arm +#define tcg_temp_free_i64 tcg_temp_free_i64_arm +#define tcg_temp_free_internal tcg_temp_free_internal_arm +#define tcg_temp_local_new_i32 tcg_temp_local_new_i32_arm +#define tcg_temp_local_new_i64 tcg_temp_local_new_i64_arm +#define tcg_temp_new_i32 tcg_temp_new_i32_arm +#define tcg_temp_new_i64 tcg_temp_new_i64_arm +#define tcg_temp_new_internal tcg_temp_new_internal_arm +#define tcg_temp_new_internal_i32 tcg_temp_new_internal_i32_arm +#define tcg_temp_new_internal_i64 tcg_temp_new_internal_i64_arm +#define tdb_hash tdb_hash_arm +#define teecr_write teecr_write_arm +#define teehbr_access teehbr_access_arm +#define temp_allocate_frame temp_allocate_frame_arm +#define temp_dead temp_dead_arm +#define temps_are_copies temps_are_copies_arm +#define temp_save temp_save_arm +#define temp_sync temp_sync_arm +#define tgen_arithi tgen_arithi_arm +#define tgen_arithr tgen_arithr_arm +#define thumb2_logic_op thumb2_logic_op_arm +#define ti925t_initfn ti925t_initfn_arm +#define tlb_add_large_page tlb_add_large_page_arm +#define tlb_flush_entry tlb_flush_entry_arm +#define tlbi_aa64_asid_is_write tlbi_aa64_asid_is_write_arm +#define tlbi_aa64_asid_write tlbi_aa64_asid_write_arm +#define tlbi_aa64_vaa_is_write tlbi_aa64_vaa_is_write_arm +#define tlbi_aa64_vaa_write tlbi_aa64_vaa_write_arm +#define tlbi_aa64_va_is_write tlbi_aa64_va_is_write_arm +#define tlbi_aa64_va_write tlbi_aa64_va_write_arm +#define tlbiall_is_write tlbiall_is_write_arm +#define tlbiall_write tlbiall_write_arm +#define tlbiasid_is_write tlbiasid_is_write_arm +#define tlbiasid_write tlbiasid_write_arm +#define tlbimvaa_is_write tlbimvaa_is_write_arm +#define tlbimvaa_write tlbimvaa_write_arm +#define tlbimva_is_write tlbimva_is_write_arm +#define tlbimva_write tlbimva_write_arm +#define tlb_is_dirty_ram tlb_is_dirty_ram_arm +#define tlb_protect_code tlb_protect_code_arm +#define tlb_reset_dirty_range tlb_reset_dirty_range_arm +#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_arm +#define tlb_set_dirty tlb_set_dirty_arm +#define tlb_set_dirty1 tlb_set_dirty1_arm +#define tlb_unprotect_code_phys tlb_unprotect_code_phys_arm +#define tlb_vaddr_to_host tlb_vaddr_to_host_arm +#define to_json to_json_arm +#define to_json_dict_iter to_json_dict_iter_arm +#define to_json_list_iter to_json_list_iter_arm +#define token_get_type token_get_type_arm +#define token_get_value token_get_value_arm +#define token_is_escape token_is_escape_arm +#define token_is_keyword token_is_keyword_arm +#define token_is_operator token_is_operator_arm +#define tokens_append_from_iter tokens_append_from_iter_arm +#define to_qiv to_qiv_arm +#define to_qov to_qov_arm +#define tosa_init tosa_init_arm +#define tosa_machine_init tosa_machine_init_arm +#define tswap32 tswap32_arm +#define tswap64 tswap64_arm +#define type_class_get_size type_class_get_size_arm +#define type_get_by_name type_get_by_name_arm +#define type_get_parent type_get_parent_arm +#define type_has_parent type_has_parent_arm +#define type_initialize type_initialize_arm +#define type_initialize_interface type_initialize_interface_arm +#define type_is_ancestor type_is_ancestor_arm +#define type_new type_new_arm +#define type_object_get_size type_object_get_size_arm +#define type_register_internal type_register_internal_arm +#define type_table_add type_table_add_arm +#define type_table_get type_table_get_arm +#define type_table_lookup type_table_lookup_arm +#define uint16_to_float32 uint16_to_float32_arm +#define uint16_to_float64 uint16_to_float64_arm +#define uint32_to_float32 uint32_to_float32_arm +#define uint32_to_float64 uint32_to_float64_arm +#define uint64_to_float128 uint64_to_float128_arm +#define uint64_to_float32 uint64_to_float32_arm +#define uint64_to_float64 uint64_to_float64_arm +#define uleb128_decode_small uleb128_decode_small_arm +#define uleb128_encode_small uleb128_encode_small_arm +#define unassigned_io_ops unassigned_io_ops_arm +#define unassigned_io_read unassigned_io_read_arm +#define unassigned_io_write unassigned_io_write_arm +#define unassigned_mem_accepts unassigned_mem_accepts_arm +#define unassigned_mem_ops unassigned_mem_ops_arm +#define unassigned_mem_read unassigned_mem_read_arm +#define unassigned_mem_write unassigned_mem_write_arm +#define update_spsel update_spsel_arm +#define v6_cp_reginfo v6_cp_reginfo_arm +#define v6k_cp_reginfo v6k_cp_reginfo_arm +#define v7_cp_reginfo v7_cp_reginfo_arm +#define v7mp_cp_reginfo v7mp_cp_reginfo_arm +#define v7m_pop v7m_pop_arm +#define v7m_push v7m_push_arm +#define v8_cp_reginfo v8_cp_reginfo_arm +#define v8_el2_cp_reginfo v8_el2_cp_reginfo_arm +#define v8_el3_cp_reginfo v8_el3_cp_reginfo_arm +#define v8_el3_no_el2_cp_reginfo v8_el3_no_el2_cp_reginfo_arm +#define vapa_cp_reginfo vapa_cp_reginfo_arm +#define vbar_write vbar_write_arm +#define vfp_exceptbits_from_host vfp_exceptbits_from_host_arm +#define vfp_exceptbits_to_host vfp_exceptbits_to_host_arm +#define vfp_get_fpcr vfp_get_fpcr_arm +#define vfp_get_fpscr vfp_get_fpscr_arm +#define vfp_get_fpsr vfp_get_fpsr_arm +#define vfp_reg_offset vfp_reg_offset_arm +#define vfp_set_fpcr vfp_set_fpcr_arm +#define vfp_set_fpscr vfp_set_fpscr_arm +#define vfp_set_fpsr vfp_set_fpsr_arm +#define visit_end_implicit_struct visit_end_implicit_struct_arm +#define visit_end_list visit_end_list_arm +#define visit_end_struct visit_end_struct_arm +#define visit_end_union visit_end_union_arm +#define visit_get_next_type visit_get_next_type_arm +#define visit_next_list visit_next_list_arm +#define visit_optional visit_optional_arm +#define visit_start_implicit_struct visit_start_implicit_struct_arm +#define visit_start_list visit_start_list_arm +#define visit_start_struct visit_start_struct_arm +#define visit_start_union visit_start_union_arm +#define vmsa_cp_reginfo vmsa_cp_reginfo_arm +#define vmsa_tcr_el1_write vmsa_tcr_el1_write_arm +#define vmsa_ttbcr_raw_write vmsa_ttbcr_raw_write_arm +#define vmsa_ttbcr_reset vmsa_ttbcr_reset_arm +#define vmsa_ttbcr_write vmsa_ttbcr_write_arm +#define vmsa_ttbr_write vmsa_ttbr_write_arm +#define wchar_to_utf8 wchar_to_utf8_arm +#define write_cpustate_to_list write_cpustate_to_list_arm +#define write_list_to_cpustate write_list_to_cpustate_arm +#define write_raw_cp_reg write_raw_cp_reg_arm +#define X86CPURegister32_lookup X86CPURegister32_lookup_arm +#define x86_op_defs x86_op_defs_arm +#define xpsr_read xpsr_read_arm +#define xpsr_write xpsr_write_arm +#define xscale_cpar_write xscale_cpar_write_arm +#define xscale_cp_reginfo xscale_cp_reginfo_arm +#endif diff --git a/qemu/config-all-disas.mak b/qemu/config-all-disas.mak new file mode 100644 index 00000000..ecbfede8 --- /dev/null +++ b/qemu/config-all-disas.mak @@ -0,0 +1 @@ +# Automatically generated by configure - do not modify diff --git a/qemu/configure b/qemu/configure new file mode 100755 index 00000000..c1c6d52e --- /dev/null +++ b/qemu/configure @@ -0,0 +1,1938 @@ +#!/bin/sh +# +# qemu configure script (c) 2003 Fabrice Bellard +# + +# Unset some variables known to interfere with behavior of common tools, +# just as autoconf does. +CLICOLOR_FORCE= GREP_OPTIONS= +unset CLICOLOR_FORCE GREP_OPTIONS + +# Temporary directory used for files created while +# configure runs. Since it is in the build directory +# we can safely blow away any previous version of it +# (and we need not jump through hoops to try to delete +# it when configure exits.) +TMPDIR1="config-temp" +rm -rf "${TMPDIR1}" +mkdir -p "${TMPDIR1}" +if [ $? -ne 0 ]; then + echo "ERROR: failed to create temporary directory" + exit 1 +fi + +TMPB="qemu-conf" +TMPC="${TMPDIR1}/${TMPB}.c" +TMPO="${TMPDIR1}/${TMPB}.o" +TMPL="${TMPDIR1}/${TMPB}.lo" +TMPA="${TMPDIR1}/lib${TMPB}.la" +TMPE="${TMPDIR1}/${TMPB}.exe" + +rm -f config.log + +# Print a helpful header at the top of config.log +echo "# QEMU configure log $(date)" >> config.log +printf "# Configured with:" >> config.log +printf " '%s'" "$0" "$@" >> config.log +echo >> config.log +echo "#" >> config.log + +error_exit() { + echo + echo "ERROR: $1" + while test -n "$2"; do + echo " $2" + shift + done + echo + exit 1 +} + +do_compiler() { + # Run the compiler, capturing its output to the log. First argument + # is compiler binary to execute. + local compiler="$1" + shift + echo $compiler "$@" >> config.log + $compiler "$@" >> config.log 2>&1 || return $? + # Test passed. If this is an --enable-werror build, rerun + # the test with -Werror and bail out if it fails. This + # makes warning-generating-errors in configure test code + # obvious to developers. + if test "$werror" != "yes"; then + return 0 + fi + # Don't bother rerunning the compile if we were already using -Werror + case "$*" in + *-Werror*) + return 0 + ;; + esac + echo $compiler -Werror "$@" >> config.log + $compiler -Werror "$@" >> config.log 2>&1 && return $? + error_exit "configure test passed without -Werror but failed with -Werror." \ + "This is probably a bug in the configure script. The failing command" \ + "will be at the bottom of config.log." \ + "You can run configure with --disable-werror to bypass this check." +} + +do_cc() { + do_compiler "$cc" "$@" +} + +compile_object() { + do_cc $QEMU_CFLAGS -c -o $TMPO $TMPC +} + +compile_prog() { + local_cflags="$1" + local_ldflags="$2" + do_cc $QEMU_CFLAGS $local_cflags -o $TMPE $TMPC $LDFLAGS $local_ldflags +} + +do_libtool() { + local mode=$1 + shift + # Run the compiler, capturing its output to the log. + echo $libtool $mode --tag=CC $cc "$@" >> config.log + $libtool $mode --tag=CC $cc "$@" >> config.log 2>&1 || return $? + # Test passed. If this is an --enable-werror build, rerun + # the test with -Werror and bail out if it fails. This + # makes warning-generating-errors in configure test code + # obvious to developers. + if test "$werror" != "yes"; then + return 0 + fi + # Don't bother rerunning the compile if we were already using -Werror + case "$*" in + *-Werror*) + return 0 + ;; + esac + echo $libtool $mode --tag=CC $cc -Werror "$@" >> config.log + $libtool $mode --tag=CC $cc -Werror "$@" >> config.log 2>&1 && return $? + error_exit "configure test passed without -Werror but failed with -Werror." \ + "This is probably a bug in the configure script. The failing command" \ + "will be at the bottom of config.log." \ + "You can run configure with --disable-werror to bypass this check." +} + +libtool_prog() { + do_libtool --mode=compile $QEMU_CFLAGS -c -fPIE -DPIE -o $TMPO $TMPC || return $? + do_libtool --mode=link $LDFLAGS -o $TMPA $TMPL -rpath /usr/local/lib +} + +# symbolically link $1 to $2. Portable version of "ln -sf". +symlink() { + rm -rf "$2" + mkdir -p "$(dirname "$2")" + ln -s "$1" "$2" +} + +# check whether a command is available to this shell (may be either an +# executable or a builtin) +has() { + type "$1" >/dev/null 2>&1 +} + +# search for an executable in PATH +path_of() { + local_command="$1" + local_ifs="$IFS" + local_dir="" + + # pathname has a dir component? + if [ "${local_command#*/}" != "$local_command" ]; then + if [ -x "$local_command" ] && [ ! -d "$local_command" ]; then + echo "$local_command" + return 0 + fi + fi + if [ -z "$local_command" ]; then + return 1 + fi + + IFS=: + for local_dir in $PATH; do + if [ -x "$local_dir/$local_command" ] && [ ! -d "$local_dir/$local_command" ]; then + echo "$local_dir/$local_command" + IFS="${local_ifs:-$(printf ' \t\n')}" + return 0 + fi + done + # not found + IFS="${local_ifs:-$(printf ' \t\n')}" + return 1 +} + +# default parameters +source_path=`dirname "$0"` +cpu="" +interp_prefix="/usr/gnemul/qemu-%M" +static="no" +cross_prefix="" +host_cc="cc" +libs_softmmu="" +cc_i386=i386-pc-linux-gnu-gcc +debug_info="yes" +stack_protector="" + +# Don't accept a target_list environment variable. +unset target_list + +# Default value for a variable defining feature "foo". +# * foo="no" feature will only be used if --enable-foo arg is given +# * foo="" feature will be searched for, and if found, will be used +# unless --disable-foo is given +# * foo="yes" this value will only be set by --enable-foo flag. +# feature will searched for, +# if not found, configure exits with error +# +# Always add --enable-foo and --disable-foo command line args. +# Distributions want to ensure that several features are compiled in, and it +# is impossible without a --enable-foo that exits if a feature is not found. + +debug_tcg="no" +debug="no" +strip_opt="yes" +tcg_interpreter="no" +bigendian="no" +mingw32="no" +EXESUF="" +DSOSUF=".so" +LDFLAGS_SHARED="-shared" +prefix="/usr/local" +mandir="\${prefix}/share/man" +qemu_docdir="\${prefix}/share/doc/qemu" +bindir="\${prefix}/bin" +libdir="\${prefix}/lib" +libexecdir="\${prefix}/libexec" +includedir="\${prefix}/include" +sysconfdir="\${prefix}/etc" +local_statedir="\${prefix}/var" +confsuffix="/qemu" +bsd="no" +linux="no" +solaris="no" +softmmu="yes" +aix="no" +pkgversion="" +pie="" +zero_malloc="" +win_sdk="no" +zlib="yes" + +# parse CC options first +for opt do + optarg=`expr "x$opt" : 'x[^=]*=\(.*\)'` + case "$opt" in + --cross-prefix=*) cross_prefix="$optarg" + ;; + --cc=*) CC="$optarg" + ;; + --source-path=*) source_path="$optarg" + ;; + --cpu=*) cpu="$optarg" + ;; + --extra-cflags=*) QEMU_CFLAGS="$optarg $QEMU_CFLAGS" + EXTRA_CFLAGS="$optarg" + ;; + --extra-ldflags=*) LDFLAGS="$optarg $LDFLAGS" + EXTRA_LDFLAGS="$optarg" + ;; + --enable-debug-info) debug_info="yes" + ;; + --disable-debug-info) debug_info="no" + ;; + esac +done +# OS specific +# Using uname is really, really broken. Once we have the right set of checks +# we can eliminate its usage altogether. + +# Preferred compiler: +# ${CC} (if set) +# ${cross_prefix}gcc (if cross-prefix specified) +# system compiler +if test -z "${CC}${cross_prefix}"; then + cc="$host_cc" +else + cc="${CC-${cross_prefix}gcc}" +fi + +ar="${AR-${cross_prefix}ar}" +as="${AS-${cross_prefix}as}" +cpp="${CPP-$cc -E}" +objcopy="${OBJCOPY-${cross_prefix}objcopy}" +ld="${LD-${cross_prefix}ld}" +libtool="${LIBTOOL-${cross_prefix}libtool}" +nm="${NM-${cross_prefix}nm}" +strip="${STRIP-${cross_prefix}strip}" +windres="${WINDRES-${cross_prefix}windres}" +pkg_config_exe="${PKG_CONFIG-${cross_prefix}pkg-config}" +query_pkg_config() { + "${pkg_config_exe}" ${QEMU_PKG_CONFIG_FLAGS} "$@" +} +pkg_config=query_pkg_config + +# If the user hasn't specified ARFLAGS, default to 'rv', just as make does. +ARFLAGS="${ARFLAGS-rv}" + +# default flags for all hosts +QEMU_CFLAGS="-fno-strict-aliasing -fno-common $QEMU_CFLAGS" +QEMU_CFLAGS="-Wall -Wundef -Wwrite-strings -Wmissing-prototypes $QEMU_CFLAGS" +QEMU_CFLAGS="-Wstrict-prototypes -Wredundant-decls $QEMU_CFLAGS" +QEMU_CFLAGS="-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE $QEMU_CFLAGS" +QEMU_INCLUDES="-I. -I\$(SRC_PATH) -I\$(SRC_PATH)/include" +if test "$debug_info" = "yes"; then + CFLAGS="-g $CFLAGS" + LDFLAGS="-g $LDFLAGS" +else + CFLAGS="-O3 $CFLAGS" + LDFLAGS="-O3 $LDFLAGS" +fi + +# make source path absolute +source_path=`cd "$source_path"; pwd` + +# running configure in the source tree? +# we know that's the case if configure is there. +if test -f "./configure"; then + pwd_is_source_path="y" +else + pwd_is_source_path="n" +fi + +check_define() { +cat > $TMPC < $TMPC << EOF +int main(void) { return 0; } +EOF + if compile_prog "" "-liberty" ; then + LIBS="-liberty $LIBS" + fi + prefix="c:/Program Files/QEMU" + mandir="\${prefix}" + qemu_docdir="\${prefix}" + bindir="\${prefix}" + sysconfdir="\${prefix}" + local_statedir= + confsuffix="" +fi + +werror="" + +for opt do + optarg=`expr "x$opt" : 'x[^=]*=\(.*\)'` + case "$opt" in + --help|-h) show_help=yes + ;; + --version|-V) exec cat $source_path/VERSION + ;; + --prefix=*) prefix="$optarg" + ;; + --interp-prefix=*) interp_prefix="$optarg" + ;; + --source-path=*) + ;; + --cross-prefix=*) + ;; + --cc=*) + ;; + --host-cc=*) host_cc="$optarg" + ;; + --objcc=*) objcc="$optarg" + ;; + --make=*) make="$optarg" + ;; + --install=*) install="$optarg" + ;; + --python=*) python="$optarg" + ;; + --extra-cflags=*) + ;; + --extra-ldflags=*) + ;; + --enable-debug-info) + ;; + --disable-debug-info) + ;; + --cpu=*) + ;; + --target-list=*) target_list="$optarg" + ;; + --static) + static="yes" + LDFLAGS="-static $LDFLAGS" + QEMU_PKG_CONFIG_FLAGS="--static $QEMU_PKG_CONFIG_FLAGS" + ;; + --mandir=*) mandir="$optarg" + ;; + --bindir=*) bindir="$optarg" + ;; + --libdir=*) libdir="$optarg" + ;; + --libexecdir=*) libexecdir="$optarg" + ;; + --includedir=*) includedir="$optarg" + ;; + --with-confsuffix=*) confsuffix="$optarg" + ;; + --docdir=*) qemu_docdir="$optarg" + ;; + --sysconfdir=*) sysconfdir="$optarg" + ;; + --localstatedir=*) local_statedir="$optarg" + ;; + --sbindir=*|--sharedstatedir=*|\ + --oldincludedir=*|--datarootdir=*|--infodir=*|\ + --htmldir=*|--dvidir=*|--pdfdir=*|--psdir=*) + # These switches are silently ignored, for compatibility with + # autoconf-generated configure scripts. This allows QEMU's + # configure to be used by RPM and similar macros that set + # lots of directory switches by default. + ;; + --enable-debug-tcg) debug_tcg="yes" + ;; + --disable-debug-tcg) debug_tcg="no" + ;; + --enable-debug) + # Enable debugging options that aren't excessively noisy + debug_tcg="yes" + debug="yes" + strip_opt="no" + ;; + --disable-strip) strip_opt="no" + ;; + --enable-pie) pie="yes" + ;; + --disable-pie) pie="no" + ;; + --enable-werror) werror="yes" + ;; + --disable-werror) werror="no" + ;; + --enable-stack-protector) stack_protector="yes" + ;; + --disable-stack-protector) stack_protector="no" + ;; + --with-pkgversion=*) pkgversion=" ($optarg)" + ;; + --with-win-sdk) win_sdk="" + ;; + --with-win-sdk=*) win_sdk="$optarg" + ;; + --without-win-sdk) win_sdk="no" + ;; + *) + echo "ERROR: unknown option $opt" + echo "Try '$0 --help' for more information" + exit 1 + ;; + esac +done + +if ! has $python; then + error_exit "Python not found. Use --python=/path/to/python" +fi + +# Note that if the Python conditional here evaluates True we will exit +# with status 1 which is a shell 'false' value. +if ! $python -c 'import sys; sys.exit(sys.version_info < (2,4) or sys.version_info >= (3,))'; then + error_exit "Cannot use '$python', Python 2.4 or later is required." \ + "Note that Python 3 or later is not yet supported." \ + "Use --python=/path/to/python to specify a supported Python." +fi + +# The -B switch was added in Python 2.6. +# If it is supplied, compiled files are not written. +# Use it for Python versions which support it. +if $python -B -c 'import sys; sys.exit(0)' 2>/dev/null; then + python="$python -B" +fi + +case "$cpu" in + ppc) + CPU_CFLAGS="-m32" + LDFLAGS="-m32 $LDFLAGS" + ;; + ppc64) + CPU_CFLAGS="-m64" + LDFLAGS="-m64 $LDFLAGS" + ;; + sparc) + LDFLAGS="-m32 $LDFLAGS" + CPU_CFLAGS="-m32 -mcpu=ultrasparc" + ;; + sparc64) + LDFLAGS="-m64 $LDFLAGS" + CPU_CFLAGS="-m64 -mcpu=ultrasparc" + ;; + s390) + CPU_CFLAGS="-m31" + LDFLAGS="-m31 $LDFLAGS" + ;; + s390x) + CPU_CFLAGS="-m64" + LDFLAGS="-m64 $LDFLAGS" + ;; + i386) + CPU_CFLAGS="-m32" + LDFLAGS="-m32 $LDFLAGS" + cc_i386='$(CC) -m32' + ;; + x86_64) + CPU_CFLAGS="-m64" + LDFLAGS="-m64 $LDFLAGS" + cc_i386='$(CC) -m32' + ;; + x32) + CPU_CFLAGS="-mx32" + LDFLAGS="-mx32 $LDFLAGS" + cc_i386='$(CC) -m32' + ;; + # No special flags required for other host CPUs +esac + +QEMU_CFLAGS="$CPU_CFLAGS $QEMU_CFLAGS" +EXTRA_CFLAGS="$CPU_CFLAGS $EXTRA_CFLAGS" + +default_target_list="" + +mak_wilds="" + +if [ "$softmmu" = "yes" ]; then + mak_wilds="${mak_wilds} $source_path/default-configs/*-softmmu.mak" +fi + +for config in $mak_wilds; do + default_target_list="${default_target_list} $(basename "$config" .mak)" +done + +if test x"$show_help" = x"yes" ; then +cat << EOF + +Usage: configure [options] +Options: [defaults in brackets after descriptions] + +Standard options: + --help print this message + --prefix=PREFIX install in PREFIX [$prefix] + --interp-prefix=PREFIX where to find shared libraries, etc. + use %M for cpu name [$interp_prefix] + --target-list=LIST set target list (default: build everything) +$(echo Available targets: $default_target_list | \ + fold -s -w 53 | sed -e 's/^/ /') + +Advanced options (experts only): + --source-path=PATH path of source code [$source_path] + --cross-prefix=PREFIX use PREFIX for compile tools [$cross_prefix] + --cc=CC use C compiler CC [$cc] + --host-cc=CC use C compiler CC [$host_cc] for code run at + build time + --objcc=OBJCC use Objective-C compiler OBJCC [$objcc] + --extra-cflags=CFLAGS append extra C compiler flags QEMU_CFLAGS + --extra-ldflags=LDFLAGS append extra linker flags LDFLAGS + --make=MAKE use specified make [$make] + --install=INSTALL use specified install [$install] + --python=PYTHON use specified python [$python] + --static enable static build [$static] + --mandir=PATH install man pages in PATH + --docdir=PATH install documentation in PATH$confsuffix + --bindir=PATH install binaries in PATH + --libdir=PATH install libraries in PATH + --sysconfdir=PATH install config in PATH$confsuffix + --localstatedir=PATH install local state in PATH (set at runtime on win32) + --with-confsuffix=SUFFIX suffix for QEMU data inside datadir/libdir/sysconfdir [$confsuffix] + --enable-debug-tcg enable TCG debugging + --disable-debug-tcg disable TCG debugging (default) + --enable-debug-info enable debugging information (default) + --disable-debug-info disable debugging information + --enable-debug enable common debug build options + --disable-strip disable stripping binaries + --disable-werror disable compilation abort on warning + --disable-stack-protector disable compiler-provided stack protection + --enable-pie build Position Independent Executables + --disable-pie do not build Position Independent Executables + --cpu=CPU Build for host CPU [$cpu] + +NOTE: The object files are built at the place where configure is launched +EOF +exit 0 +fi + +# Consult white-list to determine whether to enable werror +# by default. Only enable by default for git builds +z_version=`cut -f3 -d. $source_path/VERSION` + +if test -z "$werror" ; then + if test -d "$source_path/.git" -a \ + "$linux" = "yes" ; then + werror="yes" + else + werror="no" + fi +fi + +# check that the C compiler works. +cat > $TMPC < $TMPC << EOF +int main(void) { return 0; } +EOF +for flag in $gcc_flags; do + # Use the positive sense of the flag when testing for -Wno-wombat + # support (gcc will happily accept the -Wno- form of unknown + # warning options). + optflag="$(echo $flag | sed -e 's/^-Wno-/-W/')" + if compile_prog "-Werror $optflag" "" ; then + QEMU_CFLAGS="$QEMU_CFLAGS $flag" + fi +done + +if test "$stack_protector" != "no"; then + gcc_flags="-fstack-protector-strong -fstack-protector-all" + sp_on=0 + for flag in $gcc_flags; do + # We need to check both a compile and a link, since some compiler + # setups fail only on a .c->.o compile and some only at link time + if do_cc $QEMU_CFLAGS -Werror $flag -c -o $TMPO $TMPC && + compile_prog "-Werror $flag" ""; then + QEMU_CFLAGS="$QEMU_CFLAGS $flag" + LIBTOOLFLAGS="$LIBTOOLFLAGS -Wc,$flag" + sp_on=1 + break + fi + done + if test "$stack_protector" = yes; then + if test $sp_on = 0; then + error_exit "Stack protector not supported" + fi + fi +fi + +# Workaround for http://gcc.gnu.org/PR55489. Happens with -fPIE/-fPIC and +# large functions that use global variables. The bug is in all releases of +# GCC, but it became particularly acute in 4.6.x and 4.7.x. It is fixed in +# 4.7.3 and 4.8.0. We should be able to delete this at the end of 2013. +cat > $TMPC << EOF +#if __GNUC__ == 4 && (__GNUC_MINOR__ == 6 || (__GNUC_MINOR__ == 7 && __GNUC_PATCHLEVEL__ <= 2)) +int main(void) { return 0; } +#else +#error No bug in this compiler. +#endif +EOF +if compile_prog "-Werror -fno-gcse" "" ; then + TRANSLATE_OPT_CFLAGS=-fno-gcse +fi + +if test "$static" = "yes" ; then + if test "$pie" = "yes" ; then + error_exit "static and pie are mutually incompatible" + else + pie="no" + fi +fi + +if test "$pie" = ""; then + case "$cpu-$targetos" in + i386-Linux|x86_64-Linux|x32-Linux|i386-OpenBSD|x86_64-OpenBSD) + ;; + *) + pie="no" + ;; + esac +fi + +if test "$pie" != "no" ; then + cat > $TMPC << EOF + +#ifdef __linux__ +# define THREAD __thread +#else +# define THREAD +#endif + +static THREAD int tls_var; + +int main(void) { return tls_var; } + +EOF + if compile_prog "-fPIE -DPIE" "-pie"; then + QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS" + LDFLAGS="-pie $LDFLAGS" + pie="yes" + if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then + LDFLAGS="-Wl,-z,relro -Wl,-z,now $LDFLAGS" + fi + else + if test "$pie" = "yes"; then + error_exit "PIE not available due to missing toolchain support" + else + echo "Disabling PIE due to missing toolchain support" + pie="no" + fi + fi + + if compile_prog "-fno-pie" "-nopie"; then + CFLAGS_NOPIE="-fno-pie" + LDFLAGS_NOPIE="-nopie" + fi +fi + +# check for broken gcc and libtool in RHEL5 +if test -n "$libtool" -a "$pie" != "no" ; then + cat > $TMPC < $TMPC << EOF +static int sfaa(int *ptr) +{ + return __sync_fetch_and_and(ptr, 0); +} + +int main(void) +{ + int val = 42; + val = __sync_val_compare_and_swap(&val, 0, 1); + sfaa(&val); + return val; +} +EOF + if ! compile_prog "" "" ; then + QEMU_CFLAGS="-march=i486 $QEMU_CFLAGS" + fi +fi + +######################################### +# Solaris specific configure tool chain decisions + +if test "$solaris" = "yes" ; then + if has $install; then + : + else + error_exit "Solaris install program not found. Use --install=/usr/ucb/install or" \ + "install fileutils from www.blastwave.org using pkg-get -i fileutils" \ + "to get ginstall which is used by default (which lives in /opt/csw/bin)" + fi + if test "`path_of $install`" = "/usr/sbin/install" ; then + error_exit "Solaris /usr/sbin/install is not an appropriate install program." \ + "try ginstall from the GNU fileutils available from www.blastwave.org" \ + "using pkg-get -i fileutils, or use --install=/usr/ucb/install" + fi + if has ar; then + : + else + if test -f /usr/ccs/bin/ar ; then + error_exit "No path includes ar" \ + "Add /usr/ccs/bin to your path and rerun configure" + fi + error_exit "No path includes ar" + fi +fi + +if test -z "${target_list+xxx}" ; then + target_list="$default_target_list" +else + target_list=`echo "$target_list" | sed -e 's/,/ /g'` +fi + +# Check that we recognised the target name; this allows a more +# friendly error message than if we let it fall through. +for target in $target_list; do + case " $default_target_list " in + *" $target "*) + ;; + *) + error_exit "Unknown target name '$target'" + ;; + esac +done + +# see if system emulation was really requested +case " $target_list " in + *"-softmmu "*) softmmu=yes + ;; + *) softmmu=no + ;; +esac + +feature_not_found() { + feature=$1 + remedy=$2 + + error_exit "User requested feature $feature" \ + "configure was not able to find it." \ + "$remedy" +} + +# --- +# big/little endian test +cat > $TMPC << EOF +short big_endian[] = { 0x4269, 0x4765, 0x4e64, 0x4961, 0x4e00, 0, }; +short little_endian[] = { 0x694c, 0x7454, 0x654c, 0x6e45, 0x6944, 0x6e41, 0, }; +extern int foo(short *, short *); +int main(int argc, char *argv[]) { + return foo(big_endian, little_endian); +} +EOF + +if compile_object ; then + if grep -q BiGeNdIaN $TMPO ; then + bigendian="yes" + elif grep -q LiTtLeEnDiAn $TMPO ; then + bigendian="no" + else + echo big/little test failed + fi +else + echo big/little test failed +fi + +########################################## +# pkg-config probe + +if ! has "$pkg_config_exe"; then + error_exit "pkg-config binary '$pkg_config_exe' not found" +fi + +########################################## +# zlib check + +if test "$zlib" != "no" ; then + cat > $TMPC << EOF +#include +int main(void) { zlibVersion(); return 0; } +EOF + if compile_prog "" "-lz" ; then + : + else + error_exit "zlib check failed" \ + "Make sure to have the zlib libs and headers installed." + fi +fi +LIBS="$LIBS -lz" + +########################################## +# libtool probe + +if ! has $libtool; then + libtool= +fi + +# MacOSX ships with a libtool which isn't the GNU one; weed this +# out by checking whether libtool supports the --version switch +if test -n "$libtool"; then + if ! "$libtool" --version >/dev/null 2>&1; then + libtool= + fi +fi + +########################################## +# glib support probe + +if test "$mingw32" = yes; then + # g_poll is required in order to integrate with the glib main loop. + glib_req_ver=2.20 +else + glib_req_ver=2.12 +fi +glib_modules=gthread-2.0 + +for i in $glib_modules; do + if $pkg_config --atleast-version=$glib_req_ver $i; then + glib_cflags=`$pkg_config --cflags $i` + glib_libs=`$pkg_config --libs $i` + CFLAGS="$glib_cflags $CFLAGS" + LIBS="$glib_libs $LIBS" + else + error_exit "glib-$glib_req_ver $i is required to compile QEMU" + fi +done + +# g_test_trap_subprocess added in 2.38. Used by some tests. +glib_subprocess=yes +if ! $pkg_config --atleast-version=2.38 glib-2.0; then + glib_subprocess=no +fi + +########################################## +# pthread probe +PTHREADLIBS_LIST="-pthread -lpthread -lpthreadGC2" + +pthread=no +cat > $TMPC << EOF +#include +static void *f(void *p) { return NULL; } +int main(void) { + pthread_t thread; + pthread_create(&thread, 0, f, 0); + return 0; +} +EOF +if compile_prog "" "" ; then + pthread=yes +else + for pthread_lib in $PTHREADLIBS_LIST; do + if compile_prog "" "$pthread_lib" ; then + pthread=yes + found=no + for lib_entry in $LIBS; do + if test "$lib_entry" = "$pthread_lib"; then + found=yes + break + fi + done + if test "$found" = "no"; then + LIBS="$pthread_lib $LIBS" + fi + break + fi + done +fi + +if test "$mingw32" != yes -a "$pthread" = no; then + error_exit "pthread check failed" \ + "Make sure to have the pthread libs and headers installed." +fi + +# check for pthread_setname_np +pthread_setname_np=no +cat > $TMPC << EOF +#include + +static void *f(void *p) { return NULL; } +int main(void) +{ + pthread_t thread; + pthread_create(&thread, 0, f, 0); + pthread_setname_np(thread, "QEMU"); + return 0; +} +EOF +if compile_prog "" "$pthread_lib" ; then + pthread_setname_np=yes +fi + +# check if pipe2 is there +pipe2=no +cat > $TMPC << EOF +#include +#include + +int main(void) +{ + int pipefd[2]; + return pipe2(pipefd, O_CLOEXEC); +} +EOF +if compile_prog "" "" ; then + pipe2=yes +fi + +########################################## +# signalfd probe +signalfd="no" +cat > $TMPC << EOF +#include +#include +#include +int main(void) { return syscall(SYS_signalfd, -1, NULL, _NSIG / 8); } +EOF + +if compile_prog "" "" ; then + signalfd=yes +fi + +# check if eventfd is supported +eventfd=no +cat > $TMPC << EOF +#include + +int main(void) +{ + return eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC); +} +EOF +if compile_prog "" "" ; then + eventfd=yes +fi + +# check for ppoll support +ppoll=no +cat > $TMPC << EOF +#include + +int main(void) +{ + struct pollfd pfd = { .fd = 0, .events = 0, .revents = 0 }; + ppoll(&pfd, 1, 0, 0); + return 0; +} +EOF +if compile_prog "" "" ; then + ppoll=yes +fi + +# check for prctl(PR_SET_TIMERSLACK , ... ) support +prctl_pr_set_timerslack=no +cat > $TMPC << EOF +#include + +int main(void) +{ + prctl(PR_SET_TIMERSLACK, 1, 0, 0, 0); + return 0; +} +EOF +if compile_prog "" "" ; then + prctl_pr_set_timerslack=yes +fi + +# Search for bswap_32 function +byteswap_h=no +cat > $TMPC << EOF +#include +int main(void) { return bswap_32(0); } +EOF +if compile_prog "" "" ; then + byteswap_h=yes +fi + +# Search for bswap32 function +bswap_h=no +cat > $TMPC << EOF +#include +#include +#include +int main(void) { return bswap32(0); } +EOF +if compile_prog "" "" ; then + bswap_h=yes +fi + +########################################## +# Do we need libm +cat > $TMPC << EOF +#include +int main(int argc, char **argv) { return isnan(sin((double)argc)); } +EOF +if compile_prog "" "" ; then + : +elif compile_prog "" "-lm" ; then + LIBS="-lm $LIBS" +else + error_exit "libm check failed" +fi + +########################################## +# Do we need librt +# uClibc provides 2 versions of clock_gettime(), one with realtime +# support and one without. This means that the clock_gettime() don't +# need -lrt. We still need it for timer_create() so we check for this +# function in addition. +cat > $TMPC < +#include +int main(void) { + timer_create(CLOCK_REALTIME, NULL, NULL); + return clock_gettime(CLOCK_REALTIME, NULL); +} +EOF + +if compile_prog "" "" ; then + : +# we need pthread for static linking. use previous pthread test result +elif compile_prog "" "$pthread_lib -lrt" ; then + LIBS="$LIBS -lrt" +fi + +if test "$darwin" != "yes" -a "$mingw32" != "yes" -a "$solaris" != yes -a \ + "$aix" != "yes" -a "$haiku" != "yes" ; then + libs_softmmu="-lutil $libs_softmmu" +fi + +######################################## +# check if we have linux/magic.h + +linux_magic_h=no +cat > $TMPC << EOF +#include +int main(void) { + return 0; +} +EOF +if compile_prog "" "" ; then + linux_magic_h=yes +fi + +######################################## +# check whether we can disable warning option with a pragma (this is needed +# to silence warnings in the headers of some versions of external libraries). +# This test has to be compiled with -Werror as otherwise an unknown pragma is +# only a warning. +# +# If we can't selectively disable warning in the code, disable -Werror so that +# the build doesn't fail anyway. + +pragma_disable_unused_but_set=no +cat > $TMPC << EOF +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-but-set-variable" +#pragma GCC diagnostic ignored "-Wstrict-prototypes" +#pragma GCC diagnostic pop + +int main(void) { + return 0; +} +EOF +if compile_prog "-Werror" "" ; then + pragma_diagnostic_available=yes +else + werror=no +fi + +######################################## +# check if we have valgrind/valgrind.h + +valgrind_h=no +cat > $TMPC << EOF +#include +int main(void) { + return 0; +} +EOF +if compile_prog "" "" ; then + valgrind_h=yes +fi + +######################################## +# check if environ is declared + +has_environ=no +cat > $TMPC << EOF +#include +int main(void) { + environ = 0; + return 0; +} +EOF +if compile_prog "" "" ; then + has_environ=yes +fi + +######################################## +# check if cpuid.h is usable. + +cpuid_h=no +cat > $TMPC << EOF +#include +int main(void) { + unsigned a, b, c, d; + int max = __get_cpuid_max(0, 0); + + if (max >= 1) { + __cpuid(1, a, b, c, d); + } + + if (max >= 7) { + __cpuid_count(7, 0, a, b, c, d); + } + + return 0; +} +EOF +if compile_prog "" "" ; then + cpuid_h=yes +fi + +######################################## +# check if __[u]int128_t is usable. + +int128=no +cat > $TMPC << EOF +#if defined(__clang_major__) && defined(__clang_minor__) +# if ((__clang_major__ < 3) || (__clang_major__ == 3) && (__clang_minor__ < 2)) +# error __int128_t does not work in CLANG before 3.2 +# endif +#endif +__int128_t a; +__uint128_t b; +int main (void) { + a = a + b; + b = a * b; + a = a * a; + return 0; +} +EOF +if compile_prog "" "" ; then + int128=yes +fi + +########################################## +# Disable zero malloc errors for official releases unless explicitly told to +# enable/disable +if test -z "$zero_malloc" ; then + if test "$z_version" = "50" ; then + zero_malloc="no" + else + zero_malloc="yes" + fi +fi + +# Now we've finished running tests it's OK to add -Werror to the compiler flags +if test "$werror" = "yes"; then + QEMU_CFLAGS="-Werror $QEMU_CFLAGS" +fi + +if test "$solaris" = "no" ; then + if $ld --version 2>/dev/null | grep "GNU ld" >/dev/null 2>/dev/null ; then + LDFLAGS="-Wl,--warn-common $LDFLAGS" + fi +fi + +# Use ASLR, no-SEH and DEP if available +if test "$mingw32" = "yes" ; then + for flag in --dynamicbase --no-seh --nxcompat; do + if $ld --help 2>/dev/null | grep ".$flag" >/dev/null 2>/dev/null ; then + LDFLAGS="-Wl,$flag $LDFLAGS" + fi + done +fi + +qemu_confdir=$sysconfdir$confsuffix +qemu_moddir=$libdir$confsuffix + +echo "Install prefix $prefix" +echo "binary directory `eval echo $bindir`" +echo "library directory `eval echo $libdir`" +echo "module directory `eval echo $qemu_moddir`" +echo "libexec directory `eval echo $libexecdir`" +echo "include directory `eval echo $includedir`" +echo "config directory `eval echo $sysconfdir`" +if test "$mingw32" = "no" ; then +echo "local state directory `eval echo $local_statedir`" +echo "Manual directory `eval echo $mandir`" +echo "ELF interp prefix $interp_prefix" +else +echo "local state directory queried at runtime" +echo "Windows SDK $win_sdk" +fi +echo "Source path $source_path" +echo "C compiler $cc" +echo "Host C compiler $host_cc" +echo "Objective-C compiler $objcc" +echo "ARFLAGS $ARFLAGS" +echo "CFLAGS $CFLAGS" +echo "QEMU_CFLAGS $QEMU_CFLAGS" +echo "LDFLAGS $LDFLAGS" +echo "make $make" +echo "install $install" +echo "python $python" +echo "host CPU $cpu" +echo "host big endian $bigendian" +echo "target list $target_list" +echo "tcg debug enabled $debug_tcg" +echo "strip binaries $strip_opt" +echo "static build $static" +echo "mingw32 support $mingw32" +if test -n "$sparc_cpu"; then + echo "Target Sparc Arch $sparc_cpu" +fi +echo "PIE $pie" + +config_host_mak="config-host.mak" + +echo "# Automatically generated by configure - do not modify" >config-all-disas.mak + +echo "# Automatically generated by configure - do not modify" > $config_host_mak +echo >> $config_host_mak + +echo all: >> $config_host_mak +echo "prefix=$prefix" >> $config_host_mak +echo "bindir=$bindir" >> $config_host_mak +echo "libdir=$libdir" >> $config_host_mak +echo "libexecdir=$libexecdir" >> $config_host_mak +echo "includedir=$includedir" >> $config_host_mak +echo "mandir=$mandir" >> $config_host_mak +echo "sysconfdir=$sysconfdir" >> $config_host_mak +echo "qemu_confdir=$qemu_confdir" >> $config_host_mak +echo "qemu_datadir=$qemu_datadir" >> $config_host_mak +echo "qemu_docdir=$qemu_docdir" >> $config_host_mak +echo "qemu_moddir=$qemu_moddir" >> $config_host_mak +if test "$mingw32" = "no" ; then + echo "qemu_localstatedir=$local_statedir" >> $config_host_mak +fi +echo "qemu_helperdir=$libexecdir" >> $config_host_mak +echo "extra_cflags=$EXTRA_CFLAGS" >> $config_host_mak +echo "extra_ldflags=$EXTRA_LDFLAGS" >> $config_host_mak +echo "libs_softmmu=$libs_softmmu" >> $config_host_mak + +echo "ARCH=$ARCH" >> $config_host_mak + +if test "$debug_tcg" = "yes" ; then + echo "CONFIG_DEBUG_TCG=y" >> $config_host_mak +fi +if test "$strip_opt" = "yes" ; then + echo "STRIP=${strip}" >> $config_host_mak +fi +if test "$bigendian" = "yes" ; then + echo "HOST_WORDS_BIGENDIAN=y" >> $config_host_mak +fi +if test "$mingw32" = "yes" ; then + echo "CONFIG_WIN32=y" >> $config_host_mak + rc_version=`cat $source_path/VERSION` + version_major=${rc_version%%.*} + rc_version=${rc_version#*.} + version_minor=${rc_version%%.*} + rc_version=${rc_version#*.} + version_subminor=${rc_version%%.*} + version_micro=0 + echo "CONFIG_FILEVERSION=$version_major,$version_minor,$version_subminor,$version_micro" >> $config_host_mak + echo "CONFIG_PRODUCTVERSION=$version_major,$version_minor,$version_subminor,$version_micro" >> $config_host_mak +else + echo "CONFIG_POSIX=y" >> $config_host_mak +fi + +if test "$linux" = "yes" ; then + echo "CONFIG_LINUX=y" >> $config_host_mak +fi + +if test "$darwin" = "yes" ; then + echo "CONFIG_DARWIN=y" >> $config_host_mak +fi + +if test "$aix" = "yes" ; then + echo "CONFIG_AIX=y" >> $config_host_mak +fi + +if test "$solaris" = "yes" ; then + echo "CONFIG_SOLARIS=y" >> $config_host_mak + echo "CONFIG_SOLARIS_VERSION=$solarisrev" >> $config_host_mak + if test "$needs_libsunmath" = "yes" ; then + echo "CONFIG_NEEDS_LIBSUNMATH=y" >> $config_host_mak + fi +fi +if test "$haiku" = "yes" ; then + echo "CONFIG_HAIKU=y" >> $config_host_mak +fi +if test "$static" = "yes" ; then + echo "CONFIG_STATIC=y" >> $config_host_mak +fi +qemu_version=`head $source_path/VERSION` +echo "VERSION=$qemu_version" >>$config_host_mak +echo "PKGVERSION=$pkgversion" >>$config_host_mak +echo "SRC_PATH=$source_path" >> $config_host_mak +echo "TARGET_DIRS=$target_list" >> $config_host_mak +if test "$pipe2" = "yes" ; then + echo "CONFIG_PIPE2=y" >> $config_host_mak +fi +if test "$eventfd" = "yes" ; then + echo "CONFIG_EVENTFD=y" >> $config_host_mak +fi +if test "$ppoll" = "yes" ; then + echo "CONFIG_PPOLL=y" >> $config_host_mak +fi +if test "$prctl_pr_set_timerslack" = "yes" ; then + echo "CONFIG_PRCTL_PR_SET_TIMERSLACK=y" >> $config_host_mak +fi +if test "$byteswap_h" = "yes" ; then + echo "CONFIG_BYTESWAP_H=y" >> $config_host_mak +fi +if test "$bswap_h" = "yes" ; then + echo "CONFIG_MACHINE_BSWAP_H=y" >> $config_host_mak +fi +if test "glib_subprocess" = "yes" ; then + echo "CONFIG_HAS_GLIB_SUBPROCESS_TESTS=y" >> $config_host_mak +fi +echo "GLIB_CFLAGS=$glib_cflags" >> $config_host_mak +if test "$signalfd" = "yes" ; then + echo "CONFIG_SIGNALFD=y" >> $config_host_mak +fi +if test "$tcg_interpreter" = "yes" ; then + echo "CONFIG_TCG_INTERPRETER=y" >> $config_host_mak +fi + +# XXX: suppress that +if [ "$bsd" = "yes" ] ; then + echo "CONFIG_BSD=y" >> $config_host_mak +fi + +if test "$zero_malloc" = "yes" ; then + echo "CONFIG_ZERO_MALLOC=y" >> $config_host_mak +fi + +if test "$linux_magic_h" = "yes" ; then + echo "CONFIG_LINUX_MAGIC_H=y" >> $config_host_mak +fi + +if test "$pragma_diagnostic_available" = "yes" ; then + echo "CONFIG_PRAGMA_DIAGNOSTIC_AVAILABLE=y" >> $config_host_mak +fi + +if test "$valgrind_h" = "yes" ; then + echo "CONFIG_VALGRIND_H=y" >> $config_host_mak +fi + +if test "$has_environ" = "yes" ; then + echo "CONFIG_HAS_ENVIRON=y" >> $config_host_mak +fi + +if test "$cpuid_h" = "yes" ; then + echo "CONFIG_CPUID_H=y" >> $config_host_mak +fi + +if test "$int128" = "yes" ; then + echo "CONFIG_INT128=y" >> $config_host_mak +fi + +# Hold two types of flag: +# CONFIG_THREAD_SETNAME_BYTHREAD - we've got a way of setting the name on +# a thread we have a handle to +# CONFIG_PTHREAD_SETNAME_NP - A way of doing it on a particular +# platform +if test "$pthread_setname_np" = "yes" ; then + echo "CONFIG_THREAD_SETNAME_BYTHREAD=y" >> $config_host_mak + echo "CONFIG_PTHREAD_SETNAME_NP=y" >> $config_host_mak +fi + +if test "$tcg_interpreter" = "yes"; then + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/tci $QEMU_INCLUDES" +elif test "$ARCH" = "sparc64" ; then + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/sparc $QEMU_INCLUDES" +elif test "$ARCH" = "s390x" ; then + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/s390 $QEMU_INCLUDES" +elif test "$ARCH" = "x86_64" -o "$ARCH" = "x32" ; then + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/i386 $QEMU_INCLUDES" +elif test "$ARCH" = "ppc64" ; then + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/ppc $QEMU_INCLUDES" +else + QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/\$(ARCH) $QEMU_INCLUDES" +fi +QEMU_INCLUDES="-I\$(SRC_PATH)/tcg $QEMU_INCLUDES" + +echo "MAKE=$make" >> $config_host_mak +echo "INSTALL=$install" >> $config_host_mak +echo "INSTALL_DIR=$install -d -m 0755" >> $config_host_mak +echo "INSTALL_DATA=$install -c -m 0644" >> $config_host_mak +if test -n "$libtool"; then + echo "INSTALL_PROG=\$(LIBTOOL) --mode=install $install -c -m 0755" >> $config_host_mak + echo "INSTALL_LIB=\$(LIBTOOL) --mode=install $install -c -m 0644" >> $config_host_mak +else + echo "INSTALL_PROG=$install -c -m 0755" >> $config_host_mak + echo "INSTALL_LIB=$install -c -m 0644" >> $config_host_mak +fi +echo "PYTHON=$python" >> $config_host_mak +echo "CC=$cc" >> $config_host_mak +echo "CC_I386=$cc_i386" >> $config_host_mak +echo "HOST_CC=$host_cc" >> $config_host_mak +echo "OBJCC=$objcc" >> $config_host_mak +echo "AR=$ar" >> $config_host_mak +echo "ARFLAGS=$ARFLAGS" >> $config_host_mak +echo "AS=$as" >> $config_host_mak +echo "CPP=$cpp" >> $config_host_mak +echo "OBJCOPY=$objcopy" >> $config_host_mak +echo "LD=$ld" >> $config_host_mak +echo "NM=$nm" >> $config_host_mak +echo "WINDRES=$windres" >> $config_host_mak +echo "LIBTOOL=$libtool" >> $config_host_mak +echo "CFLAGS=$CFLAGS" >> $config_host_mak +echo "CFLAGS_NOPIE=$CFLAGS_NOPIE" >> $config_host_mak +echo "QEMU_CFLAGS=$QEMU_CFLAGS" >> $config_host_mak +echo "QEMU_INCLUDES=$QEMU_INCLUDES" >> $config_host_mak +if test "$cross_prefix" != ""; then + echo "AUTOCONF_HOST := --host=${cross_prefix%-}" >> $config_host_mak +else + echo "AUTOCONF_HOST := " >> $config_host_mak +fi +echo "LDFLAGS=$LDFLAGS" >> $config_host_mak +echo "LDFLAGS_NOPIE=$LDFLAGS_NOPIE" >> $config_host_mak +echo "LIBTOOLFLAGS=$LIBTOOLFLAGS" >> $config_host_mak +echo "LIBS+=$LIBS" >> $config_host_mak +echo "EXESUF=$EXESUF" >> $config_host_mak +echo "DSOSUF=$DSOSUF" >> $config_host_mak +echo "LDFLAGS_SHARED=$LDFLAGS_SHARED" >> $config_host_mak +echo "TRANSLATE_OPT_CFLAGS=$TRANSLATE_OPT_CFLAGS" >> $config_host_mak + +for target in $target_list; do +target_dir="$target" +config_target_mak=$target_dir/config-target.mak +target_name=`echo $target | cut -d '-' -f 1` +target_bigendian="no" + +case "$target_name" in + armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb) + target_bigendian=yes + ;; +esac +target_softmmu="no" +target_user_only="no" +case "$target" in + ${target_name}-softmmu) + target_softmmu="yes" + ;; + *) + error_exit "Target '$target' not recognised" + exit 1 + ;; +esac + +mkdir -p $target_dir +echo "# Automatically generated by configure - do not modify" > $config_target_mak + +bflt="no" +interp_prefix1=`echo "$interp_prefix" | sed "s/%M/$target_name/g"` + +TARGET_ARCH="$target_name" +TARGET_BASE_ARCH="" +TARGET_ABI_DIR="" + +case "$target_name" in + i386) + ;; + x86_64) + TARGET_BASE_ARCH=i386 + ;; + alpha) + ;; + arm|armeb) + TARGET_ARCH=arm + bflt="yes" + ;; + aarch64) + TARGET_BASE_ARCH=arm + bflt="yes" + ;; + cris) + ;; + lm32) + ;; + m68k) + bflt="yes" + ;; + microblaze|microblazeel) + TARGET_ARCH=microblaze + bflt="yes" + ;; + mips|mipsel) + TARGET_ARCH=mips + echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak + ;; + mipsn32|mipsn32el) + TARGET_ARCH=mips64 + TARGET_BASE_ARCH=mips + echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak + echo "TARGET_ABI32=y" >> $config_target_mak + ;; + mips64|mips64el) + TARGET_ARCH=mips64 + TARGET_BASE_ARCH=mips + echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak + ;; + tricore) + ;; + moxie) + ;; + or32) + TARGET_ARCH=openrisc + TARGET_BASE_ARCH=openrisc + ;; + ppc) + ;; + ppcemb) + TARGET_BASE_ARCH=ppc + TARGET_ABI_DIR=ppc + ;; + ppc64) + TARGET_BASE_ARCH=ppc + TARGET_ABI_DIR=ppc + ;; + ppc64le) + TARGET_ARCH=ppc64 + TARGET_BASE_ARCH=ppc + TARGET_ABI_DIR=ppc + ;; + ppc64abi32) + TARGET_ARCH=ppc64 + TARGET_BASE_ARCH=ppc + TARGET_ABI_DIR=ppc + echo "TARGET_ABI32=y" >> $config_target_mak + ;; + sh4|sh4eb) + TARGET_ARCH=sh4 + bflt="yes" + ;; + sparc) + ;; + sparc64) + TARGET_BASE_ARCH=sparc + ;; + sparc32plus) + TARGET_ARCH=sparc64 + TARGET_BASE_ARCH=sparc + TARGET_ABI_DIR=sparc + echo "TARGET_ABI32=y" >> $config_target_mak + ;; + s390x) + ;; + unicore32) + ;; + xtensa|xtensaeb) + TARGET_ARCH=xtensa + ;; + *) + error_exit "Unsupported target CPU" + ;; +esac +# TARGET_BASE_ARCH needs to be defined after TARGET_ARCH +if [ "$TARGET_BASE_ARCH" = "" ]; then + TARGET_BASE_ARCH=$TARGET_ARCH +fi + +symlink "$source_path/Makefile.target" "$target_dir/Makefile" + +upper() { + echo "$@"| LC_ALL=C tr '[a-z]' '[A-Z]' +} + +target_arch_name="`upper $TARGET_ARCH`" +echo "TARGET_$target_arch_name=y" >> $config_target_mak +echo "TARGET_NAME=$target_name" >> $config_target_mak +echo "TARGET_BASE_ARCH=$TARGET_BASE_ARCH" >> $config_target_mak +if [ "$TARGET_ABI_DIR" = "" ]; then + TARGET_ABI_DIR=$TARGET_ARCH +fi +echo "TARGET_ABI_DIR=$TARGET_ABI_DIR" >> $config_target_mak +if [ "$HOST_VARIANT_DIR" != "" ]; then + echo "HOST_VARIANT_DIR=$HOST_VARIANT_DIR" >> $config_target_mak +fi +if test "$target_bigendian" = "yes" ; then + echo "TARGET_WORDS_BIGENDIAN=y" >> $config_target_mak +fi +if test "$target_softmmu" = "yes" ; then + echo "CONFIG_SOFTMMU=y" >> $config_target_mak +fi +if test "$target_user_only" = "yes" ; then + echo "CONFIG_USER_ONLY=y" >> $config_target_mak + echo "CONFIG_QEMU_INTERP_PREFIX=\"$interp_prefix1\"" >> $config_target_mak +fi +list="" +if test "$target_user_only" = "yes" -a "$bflt" = "yes"; then + echo "TARGET_HAS_BFLT=y" >> $config_target_mak +fi + +# generate QEMU_CFLAGS/LDFLAGS for targets + +cflags="" +ldflags="" + +if test "$tcg_interpreter" = "yes" ; then + echo "CONFIG_TCI_DIS=y" >> $config_target_mak + echo "CONFIG_TCI_DIS=y" >> config-all-disas.mak +fi + +case "$ARCH" in +alpha) + # Ensure there's only a single GP + cflags="-msmall-data $cflags" +;; +esac + +echo "LDFLAGS+=$ldflags" >> $config_target_mak +echo "QEMU_CFLAGS+=$cflags" >> $config_target_mak +echo "QEMU_CFLAGS+=-include ${target_name}.h" >> $config_target_mak + +done # for target in $targets + +# Save the configure command line for later reuse. +cat <config.status +#!/bin/sh +# Generated by configure. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. +EOD +printf "exec" >>config.status +printf " '%s'" "$0" "$@" >>config.status +echo >>config.status +chmod +x config.status + +rm -r "$TMPDIR1" diff --git a/qemu/cpu-exec.c b/qemu/cpu-exec.c new file mode 100644 index 00000000..7d23caac --- /dev/null +++ b/qemu/cpu-exec.c @@ -0,0 +1,416 @@ +/* + * emulator main execution loop + * + * Copyright (c) 2003-2005 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */ + +#include "tcg.h" +#include "sysemu/sysemu.h" + +#include "uc_priv.h" + +static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr); +static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc, + target_ulong cs_base, uint64_t flags); +static TranslationBlock *tb_find_fast(CPUArchState *env); +static void cpu_handle_debug_exception(CPUArchState *env); + +void cpu_loop_exit(CPUState *cpu) +{ + cpu->current_tb = NULL; + siglongjmp(cpu->jmp_env, 1); +} + +/* exit the current TB from a signal handler. The host registers are + restored in a state compatible with the CPU emulator + */ +#if defined(CONFIG_SOFTMMU) + +void cpu_resume_from_signal(CPUState *cpu, void *puc) +{ +#endif + /* XXX: restore cpu registers saved in host registers */ + + cpu->exception_index = -1; + siglongjmp(cpu->jmp_env, 1); +} + +/* main execution loop */ + +int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq +{ + CPUState *cpu = ENV_GET_CPU(env); + TCGContext *tcg_ctx = env->uc->tcg_ctx; + CPUClass *cc = CPU_GET_CLASS(uc, cpu); +#ifdef TARGET_I386 + X86CPU *x86_cpu = X86_CPU(uc, cpu); +#endif + int ret, interrupt_request; + TranslationBlock *tb; + uint8_t *tc_ptr; + uintptr_t next_tb; + + /* This must be volatile so it is not trashed by longjmp() */ + volatile bool have_tb_lock = false; + + if (cpu->halted) { + if (!cpu_has_work(cpu)) { + return EXCP_HALTED; + } + + cpu->halted = 0; + } + + uc->current_cpu = cpu; + + /* As long as current_cpu is null, up to the assignment just above, + * requests by other threads to exit the execution loop are expected to + * be issued using the exit_request global. We must make sure that our + * evaluation of the global value is performed past the current_cpu + * value transition point, which requires a memory barrier as well as + * an instruction scheduling constraint on modern architectures. */ + smp_mb(); + + if (unlikely(uc->exit_request)) { + cpu->exit_request = 1; + } + + cc->cpu_exec_enter(cpu); + cpu->exception_index = -1; + + /* prepare setjmp context for exception handling */ + for(;;) { + if (sigsetjmp(cpu->jmp_env, 0) == 0) { + if (uc->stop_request || uc->invalid_error) + break; + /* if an exception is pending, we execute it here */ + if (cpu->exception_index >= 0) { + //printf(">>> GOT INTERRUPT. exception idx = %x\n", cpu->exception_index); // qq + if (uc->stop_interrupt && uc->stop_interrupt(cpu->exception_index)) { + cpu->halted = 1; + uc->invalid_error = UC_ERR_INSN_INVALID; + ret = EXCP_HLT; + break; + } + + if ((uc->arch == UC_ARCH_X86 && cpu->exception_index == 0x99) || // X86's Int 0x99 + (uc->arch == UC_ARCH_ARM && cpu->exception_index == 2) || /* ARM's EXCP_SWI */ + (uc->arch == UC_ARCH_ARM64 && cpu->exception_index == 2) || /* ARM's EXCP_SWI */ + (uc->arch == UC_ARCH_MIPS && cpu->exception_index == 17) || /* Mips's EXCP_SYSCALL */ + (uc->arch == UC_ARCH_SPARC && cpu->exception_index == 0x80) || /* Sparc's TT_TRAP */ + (uc->arch == UC_ARCH_SPARC && cpu->exception_index == 0x100) || /* Sparc64's TT_TRAP */ + (uc->arch == UC_ARCH_M68K && cpu->exception_index == 0x2f) /* M68K's EXCP_TRAP15 */ + ) { + cpu->halted = 1; + //cpu->exception_index = EXCP_HLT; + //no_shutdown = 0; + //printf(">>> calling shutdown-request...\n"); + //printf(">>> ** current EIP = %x\n", X86_CPU(cpu)->env.eip); + //qemu_system_shutdown_request(); + //pause_all_vcpus(); + //cpu_loop_exit(cpu); + ret = EXCP_HLT; + break; + } + if (cpu->exception_index >= EXCP_INTERRUPT) { + /* exit request from the cpu execution loop */ + ret = cpu->exception_index; + if (ret == EXCP_DEBUG) { + cpu_handle_debug_exception(env); + } + break; + } else { +#if defined(CONFIG_USER_ONLY) + /* if user mode only, we simulate a fake exception + which will be handled outside the cpu execution + loop */ +#if defined(TARGET_I386) + cc->do_interrupt(cpu); +#endif + ret = cpu->exception_index; + break; +#else + // Unicorn: call interrupt callback if registered + if (uc->hook_intr_idx) + ((uc_cb_hookintr_t)uc->hook_callbacks[uc->hook_intr_idx].callback)( + (uch)uc, cpu->exception_index, + uc->hook_callbacks[uc->hook_intr_idx].user_data); + cpu->exception_index = -1; +#endif + } + } + + next_tb = 0; /* force lookup of first TB */ + for(;;) { + interrupt_request = cpu->interrupt_request; + + if (unlikely(interrupt_request)) { + if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { + /* Mask out external interrupts for this step. */ + interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; + } + if (interrupt_request & CPU_INTERRUPT_DEBUG) { + cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; + cpu->exception_index = EXCP_DEBUG; + cpu_loop_exit(cpu); + } + if (interrupt_request & CPU_INTERRUPT_HALT) { + cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; + cpu->halted = 1; + cpu->exception_index = EXCP_HLT; + cpu_loop_exit(cpu); + } +#if defined(TARGET_I386) + if (interrupt_request & CPU_INTERRUPT_INIT) { + cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0); + do_cpu_init(x86_cpu); + cpu->exception_index = EXCP_HALTED; + cpu_loop_exit(cpu); + } +#else + if (interrupt_request & CPU_INTERRUPT_RESET) { + cpu_reset(cpu); + } +#endif + /* The target hook has 3 exit conditions: + False when the interrupt isn't processed, + True when it is, and we should restart on a new TB, + and via longjmp via cpu_loop_exit. */ + if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { + next_tb = 0; + } + /* Don't use the cached interrupt_request value, + do_interrupt may have updated the EXITTB flag. */ + if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) { + cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; + /* ensure that no TB jump will be modified as + the program flow was changed */ + next_tb = 0; + } + } + if (unlikely(cpu->exit_request)) { + cpu->exit_request = 0; + cpu->exception_index = EXCP_INTERRUPT; + cpu_loop_exit(cpu); + } + spin_lock(&tcg_ctx->tb_ctx.tb_lock); + have_tb_lock = true; + tb = tb_find_fast(env); // qq + if (!tb) { // invalid TB due to invalid code? + break; + } + /* Note: we do it here to avoid a gcc bug on Mac OS X when + doing it in tb_find_slow */ + if (tcg_ctx->tb_ctx.tb_invalidated_flag) { + /* as some TB could have been invalidated because + of memory exceptions while generating the code, we + must recompute the hash index here */ + next_tb = 0; + tcg_ctx->tb_ctx.tb_invalidated_flag = 0; + } + /* see if we can patch the calling TB. When the TB + spans two pages, we cannot safely do a direct + jump. */ + if (next_tb != 0 && tb->page_addr[1] == -1) { + tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK), + next_tb & TB_EXIT_MASK, tb); + } + have_tb_lock = false; + spin_unlock(&tcg_ctx->tb_ctx.tb_lock); + + /* cpu_interrupt might be called while translating the + TB, but before it is linked into a potentially + infinite loop and becomes env->current_tb. Avoid + starting execution if there is a pending interrupt. */ + cpu->current_tb = tb; + barrier(); + if (likely(!cpu->exit_request)) { + tc_ptr = tb->tc_ptr; + /* execute the generated code */ + next_tb = cpu_tb_exec(cpu, tc_ptr); // qq + switch (next_tb & TB_EXIT_MASK) { + case TB_EXIT_REQUESTED: + /* Something asked us to stop executing + * chained TBs; just continue round the main + * loop. Whatever requested the exit will also + * have set something else (eg exit_request or + * interrupt_request) which we will handle + * next time around the loop. + */ + tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); + next_tb = 0; + break; + default: + break; + } + } + cpu->current_tb = NULL; + /* reset soft MMU for next block (it can currently + only be set by a memory fault) */ + } /* for(;;) */ + } else { + /* Reload env after longjmp - the compiler may have smashed all + * local variables as longjmp is marked 'noreturn'. */ + cpu = uc->current_cpu; + env = cpu->env_ptr; + cc = CPU_GET_CLASS(uc, cpu); +#ifdef TARGET_I386 + x86_cpu = X86_CPU(uc, cpu); +#endif + if (have_tb_lock) { + spin_unlock(&tcg_ctx->tb_ctx.tb_lock); + have_tb_lock = false; + } + } + } /* for(;;) */ + + cc->cpu_exec_exit(cpu); + + /* fail safe : never use current_cpu outside cpu_exec() */ + uc->current_cpu = NULL; + return ret; +} + +/* Execute a TB, and fix up the CPU state afterwards if necessary */ +static tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) +{ + CPUArchState *env = cpu->env_ptr; + TCGContext *tcg_ctx = env->uc->tcg_ctx; + uintptr_t next_tb; + + next_tb = tcg_qemu_tb_exec(env, tb_ptr); + + if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) { + /* We didn't start executing this TB (eg because the instruction + * counter hit zero); we must restore the guest PC to the address + * of the start of the TB. + */ + CPUClass *cc = CPU_GET_CLASS(env->uc, cpu); + TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); + if (cc->synchronize_from_tb) { + // avoid sync twice when helper_uc_tracecode() already did this. + if (env->uc->emu_counter <= env->uc->emu_count) + cc->synchronize_from_tb(cpu, tb); // qq + } else { + assert(cc->set_pc); + // avoid sync twice when helper_uc_tracecode() already did this. + if (env->uc->emu_counter <= env->uc->emu_count) + cc->set_pc(cpu, tb->pc); + } + } + if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) { + /* We were asked to stop executing TBs (probably a pending + * interrupt. We've now stopped, so clear the flag. + */ + cpu->tcg_exit_req = 0; + } + return next_tb; +} + +static TranslationBlock *tb_find_slow(CPUArchState *env, target_ulong pc, + target_ulong cs_base, uint64_t flags) // qq +{ + CPUState *cpu = ENV_GET_CPU(env); + TCGContext *tcg_ctx = env->uc->tcg_ctx; + TranslationBlock *tb, **ptb1; + unsigned int h; + tb_page_addr_t phys_pc, phys_page1; + target_ulong virt_page2; + + tcg_ctx->tb_ctx.tb_invalidated_flag = 0; + + /* find translated block using physical mappings */ + phys_pc = get_page_addr_code(env, pc); // qq + if (phys_pc == -1) { // invalid code? + return NULL; + } + phys_page1 = phys_pc & TARGET_PAGE_MASK; + h = tb_phys_hash_func(phys_pc); + ptb1 = &tcg_ctx->tb_ctx.tb_phys_hash[h]; + for(;;) { + tb = *ptb1; + if (!tb) + goto not_found; + if (tb->pc == pc && + tb->page_addr[0] == phys_page1 && + tb->cs_base == cs_base && + tb->flags == flags) { + /* check next page if needed */ + if (tb->page_addr[1] != -1) { + tb_page_addr_t phys_page2; + + virt_page2 = (pc & TARGET_PAGE_MASK) + + TARGET_PAGE_SIZE; + phys_page2 = get_page_addr_code(env, virt_page2); + if (tb->page_addr[1] == phys_page2) + goto found; + } else { + goto found; + } + } + ptb1 = &tb->phys_hash_next; + } +not_found: + /* if no translated code available, then translate it now */ + tb = tb_gen_code(cpu, pc, cs_base, flags, 0); // qq + +found: + /* Move the last found TB to the head of the list */ + if (likely(*ptb1)) { + *ptb1 = tb->phys_hash_next; + tb->phys_hash_next = tcg_ctx->tb_ctx.tb_phys_hash[h]; + tcg_ctx->tb_ctx.tb_phys_hash[h] = tb; + } + /* we add the TB in the virtual pc hash table */ + cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb; + return tb; +} + +static TranslationBlock *tb_find_fast(CPUArchState *env) // qq +{ + CPUState *cpu = ENV_GET_CPU(env); + TranslationBlock *tb; + target_ulong cs_base, pc; + int flags; + + /* we record a subset of the CPU state. It will + always be the same before a given translated block + is executed. */ + cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); + tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; + if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || + tb->flags != flags)) { + tb = tb_find_slow(env, pc, cs_base, flags); // qq + } + return tb; +} + +static void cpu_handle_debug_exception(CPUArchState *env) +{ + CPUState *cpu = ENV_GET_CPU(env); + CPUClass *cc = CPU_GET_CLASS(env->uc, cpu); + CPUWatchpoint *wp; + + if (!cpu->watchpoint_hit) { + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { + wp->flags &= ~BP_WATCHPOINT_HIT; + } + } + + cc->debug_excp_handler(cpu); +} diff --git a/qemu/cpus.c b/qemu/cpus.c new file mode 100644 index 00000000..ecc66e83 --- /dev/null +++ b/qemu/cpus.c @@ -0,0 +1,298 @@ +/* + * QEMU System Emulator + * + * Copyright (c) 2003-2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */ + +/* Needed early for CONFIG_BSD etc. */ +#include "config-host.h" +#include "sysemu/sysemu.h" +#include "sysemu/cpus.h" + +#include "exec/address-spaces.h" // debug, can be removed later + +#include "uc_priv.h" + +static bool cpu_can_run(CPUState *cpu); +static void cpu_handle_guest_debug(CPUState *cpu); +static int tcg_cpu_exec(struct uc_struct *uc, CPUArchState *env); +static bool tcg_exec_all(struct uc_struct* uc); +static void qemu_tcg_init_vcpu(CPUState *cpu); +static void *qemu_tcg_cpu_thread_fn(void *arg); + +void vm_start(struct uc_struct* uc) +{ + resume_all_vcpus(uc); + + //sleep(3); + // kick off TCG thread + qemu_mutex_unlock_iothread(uc); +} + +bool cpu_is_stopped(CPUState *cpu) +{ + return cpu->stopped; +} + +void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data) +{ + if (qemu_cpu_is_self(cpu)) { + func(data); + return; + } +} + +// send halt_cond/tcg_halt_cond to @cpu +bool qemu_cpu_is_self(CPUState *cpu) +{ + return qemu_thread_is_self(cpu->thread); +} + +void pause_all_vcpus(struct uc_struct *uc) +{ + CPUState *cpu; + + CPU_FOREACH(cpu) { + qemu_thread_join(cpu->thread); // qq: fix qemu_thread_join() to work for instance + } +} + + +void resume_all_vcpus(struct uc_struct *uc) +{ + CPUState *cpu; + + { + // Fix call multiple time (vu). + // We have to check whether this is the second time, then reset all CPU. + bool created = false; + CPU_FOREACH(cpu) { + created |= cpu->created; + } + if (!created) { + CPU_FOREACH(cpu) { + cpu->created = true; + cpu->halted = 0; + qemu_init_vcpu(cpu); + } + qemu_mutex_lock_iothread(uc); + } + } + + //qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true); + CPU_FOREACH(cpu) { + cpu_resume(cpu); + } +} + +void qemu_init_vcpu(CPUState *cpu) +{ + cpu->nr_cores = smp_cores; + cpu->nr_threads = smp_threads; + cpu->stopped = true; + cpu->uc->tcg_cpu_thread = NULL; + + if (tcg_enabled(cpu->uc)) { + qemu_tcg_init_vcpu(cpu); + } +} + + +static void *qemu_tcg_cpu_thread_fn(void *arg) +{ + CPUState *cpu = arg; + struct uc_struct *uc = cpu->uc; + + //qemu_tcg_init_cpu_signals(); + qemu_thread_get_self(cpu->thread); + + qemu_mutex_lock(&uc->qemu_global_mutex); + CPU_FOREACH(cpu) { + cpu->thread_id = qemu_get_thread_id(); + cpu->created = true; + } + qemu_cond_signal(&uc->qemu_cpu_cond); + + + /* wait for initial kick-off after machine start */ + while (QTAILQ_FIRST(&uc->cpus)->stopped) { + qemu_cond_wait(uc->tcg_halt_cond, &uc->qemu_global_mutex); + } + + while (1) { +#if 0 + int count = 0; + if (count < 10) { + count++; + unsigned int eip = X86_CPU(mycpu)->env.eip; + printf(">>> current EIP = %x\n", eip); + printf(">>> ECX = %x\n", (unsigned int)X86_CPU(mycpu)->env.regs[R_ECX]); + printf(">>> EDX = %x\n", (unsigned int)X86_CPU(mycpu)->env.regs[R_EDX]); + } +#endif + + if (tcg_exec_all(uc)) + break; + } + + CPU_FOREACH(cpu) { + cpu->thread_id = 0; + cpu->created = false; + } + + qemu_mutex_unlock(&uc->qemu_global_mutex); + + return NULL; +} + + + +/* For temporary buffers for forming a name */ +#define VCPU_THREAD_NAME_SIZE 16 + +static void qemu_tcg_init_vcpu(CPUState *cpu) +{ + struct uc_struct *uc = cpu->uc; + char thread_name[VCPU_THREAD_NAME_SIZE]; + + tcg_cpu_address_space_init(cpu, cpu->as); + + /* share a single thread for all cpus with TCG */ + if (!uc->tcg_cpu_thread) { + cpu->thread = g_malloc0(sizeof(QemuThread)); + cpu->halt_cond = g_malloc0(sizeof(QemuCond)); + qemu_cond_init(cpu->halt_cond); + uc->tcg_halt_cond = cpu->halt_cond; + snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/TCG", + cpu->cpu_index); + qemu_thread_create(cpu->thread, thread_name, qemu_tcg_cpu_thread_fn, + cpu, QEMU_THREAD_JOINABLE); +#ifdef _WIN32 + cpu->hThread = qemu_thread_get_handle(cpu->thread); +#endif + while (!cpu->created) { + qemu_cond_wait(&uc->qemu_cpu_cond, &uc->qemu_global_mutex); + } + uc->tcg_cpu_thread = cpu->thread; + } else { + cpu->thread = uc->tcg_cpu_thread; + cpu->halt_cond = uc->tcg_halt_cond; + } +} + +static int tcg_cpu_exec(struct uc_struct *uc, CPUArchState *env) +{ + return cpu_exec(uc, env); +} + +static bool tcg_exec_all(struct uc_struct* uc) +{ + int r; + bool finish = false; + CPUState *next_cpu = uc->next_cpu; + + if (next_cpu == NULL) { + next_cpu = first_cpu; + } + + for (; next_cpu != NULL && !uc->exit_request; next_cpu = CPU_NEXT(next_cpu)) { + CPUState *cpu = next_cpu; + CPUArchState *env = cpu->env_ptr; + + //qemu_clock_enable(QEMU_CLOCK_VIRTUAL, + // (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); + if (cpu_can_run(cpu)) { + r = tcg_cpu_exec(uc, env); + if (uc->stop_request) { + //printf(">>> got STOP request!!!\n"); + finish = true; + break; + } + + // save invalid memory access error & quit + if (env->invalid_error) { + // printf(">>> invalid memory accessed, STOP = %u!!!\n", env->invalid_error); + uc->invalid_addr = env->invalid_addr; + uc->invalid_error = env->invalid_error; + finish = true; + break; + } + + // printf(">>> stop with r = %x, HLT=%x\n", r, EXCP_HLT); + if (r == EXCP_DEBUG) { + cpu_handle_guest_debug(cpu); + break; + } + if (r == EXCP_HLT) { + //printf(">>> got HLT!!!\n"); + finish = true; + break; + } + } else if (cpu->stop || cpu->stopped) { + printf(">>> got stopped!!!\n"); + break; + } + } + uc->exit_request = 0; + + return finish; +} + +static bool cpu_can_run(CPUState *cpu) +{ + if (cpu->stop) { + return false; + } + if (cpu_is_stopped(cpu)) { + return false; + } + return true; +} + +static void cpu_handle_guest_debug(CPUState *cpu) +{ + cpu->stopped = true; +} + +#if 0 +#ifndef _WIN32 +static void qemu_tcg_init_cpu_signals(void) +{ + sigset_t set; + struct sigaction sigact; + + memset(&sigact, 0, sizeof(sigact)); + sigact.sa_handler = cpu_signal; + sigaction(SIG_IPI, &sigact, NULL); + + sigemptyset(&set); + sigaddset(&set, SIG_IPI); + pthread_sigmask(SIG_UNBLOCK, &set, NULL); +} +#else /* _WIN32 */ +static void qemu_tcg_init_cpu_signals(void) +{ +} +#endif /* _WIN32 */ +#endif + diff --git a/qemu/cputlb.c b/qemu/cputlb.c new file mode 100644 index 00000000..cde8e30e --- /dev/null +++ b/qemu/cputlb.c @@ -0,0 +1,414 @@ +/* + * Common CPU TLB handling + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +/* Modified for Unicorn Engine by Nguyen Anh Quynh, 2015 */ + +#include "config.h" +#include "cpu.h" +#include "exec/exec-all.h" +#include "exec/memory.h" +#include "exec/address-spaces.h" +#include "exec/cpu_ldst.h" + +#include "exec/cputlb.h" + +#include "exec/memory-internal.h" +#include "exec/ram_addr.h" +#include "tcg/tcg.h" + +#include "uc_priv.h" + +//#define DEBUG_TLB +//#define DEBUG_TLB_CHECK + +static void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr); +static bool tlb_is_dirty_ram(CPUTLBEntry *tlbe); +static ram_addr_t qemu_ram_addr_from_host_nofail(struct uc_struct *uc, void *ptr); +static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr, + target_ulong size); +static void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr); + +/* statistics */ +//int tlb_flush_count; + +/* NOTE: + * If flush_global is true (the usual case), flush all tlb entries. + * If flush_global is false, flush (at least) all tlb entries not + * marked global. + * + * Since QEMU doesn't currently implement a global/not-global flag + * for tlb entries, at the moment tlb_flush() will also flush all + * tlb entries in the flush_global == false case. This is OK because + * CPU architectures generally permit an implementation to drop + * entries from the TLB at any time, so flushing more entries than + * required is only an efficiency issue, not a correctness issue. + */ +void tlb_flush(CPUState *cpu, int flush_global) +{ + CPUArchState *env = cpu->env_ptr; + +#if defined(DEBUG_TLB) + printf("tlb_flush:\n"); +#endif + /* must reset current TB so that interrupts cannot modify the + links while we are modifying them */ + cpu->current_tb = NULL; + + memset(env->tlb_table, -1, sizeof(env->tlb_table)); + memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table)); + memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache)); + + env->vtlb_index = 0; + env->tlb_flush_addr = -1; + env->tlb_flush_mask = 0; + //tlb_flush_count++; +} + +void tlb_flush_page(CPUState *cpu, target_ulong addr) +{ + CPUArchState *env = cpu->env_ptr; + int i; + int mmu_idx; + +#if defined(DEBUG_TLB) + printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr); +#endif + /* Check if we need to flush due to large pages. */ + if ((addr & env->tlb_flush_mask) == env->tlb_flush_addr) { +#if defined(DEBUG_TLB) + printf("tlb_flush_page: forced full flush (" + TARGET_FMT_lx "/" TARGET_FMT_lx ")\n", + env->tlb_flush_addr, env->tlb_flush_mask); +#endif + tlb_flush(cpu, 1); + return; + } + /* must reset current TB so that interrupts cannot modify the + links while we are modifying them */ + cpu->current_tb = NULL; + + addr &= TARGET_PAGE_MASK; + i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + tlb_flush_entry(&env->tlb_table[mmu_idx][i], addr); + } + + /* check whether there are entries that need to be flushed in the vtlb */ + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + int k; + for (k = 0; k < CPU_VTLB_SIZE; k++) { + tlb_flush_entry(&env->tlb_v_table[mmu_idx][k], addr); + } + } + + tb_flush_jmp_cache(cpu, addr); +} + +/* update the TLBs so that writes to code in the virtual page 'addr' + can be detected */ +void tlb_protect_code(struct uc_struct *uc, ram_addr_t ram_addr) +{ + cpu_physical_memory_reset_dirty(uc, ram_addr, TARGET_PAGE_SIZE, + DIRTY_MEMORY_CODE); +} + +/* update the TLB so that writes in physical page 'phys_addr' are no longer + tested for self modifying code */ +void tlb_unprotect_code_phys(CPUState *cpu, ram_addr_t ram_addr, + target_ulong vaddr) +{ + cpu_physical_memory_set_dirty_flag(cpu->uc, ram_addr, DIRTY_MEMORY_CODE); +} + +void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start, + uintptr_t length) +{ + uintptr_t addr; + + if (tlb_is_dirty_ram(tlb_entry)) { + addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend; + if ((addr - start) < length) { + tlb_entry->addr_write |= TLB_NOTDIRTY; + } + } +} + +void cpu_tlb_reset_dirty_all(struct uc_struct *uc, + ram_addr_t start1, ram_addr_t length) +{ + CPUState *cpu; + CPUArchState *env; + + CPU_FOREACH(cpu) { + int mmu_idx; + + env = cpu->env_ptr; + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + unsigned int i; + + for (i = 0; i < CPU_TLB_SIZE; i++) { + tlb_reset_dirty_range(&env->tlb_table[mmu_idx][i], + start1, length); + } + + for (i = 0; i < CPU_VTLB_SIZE; i++) { + tlb_reset_dirty_range(&env->tlb_v_table[mmu_idx][i], + start1, length); + } + } + } +} + +/* update the TLB corresponding to virtual page vaddr + so that it is no longer dirty */ +void tlb_set_dirty(CPUArchState *env, target_ulong vaddr) +{ + int i; + int mmu_idx; + + vaddr &= TARGET_PAGE_MASK; + i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + tlb_set_dirty1(&env->tlb_table[mmu_idx][i], vaddr); + } + + for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) { + int k; + for (k = 0; k < CPU_VTLB_SIZE; k++) { + tlb_set_dirty1(&env->tlb_v_table[mmu_idx][k], vaddr); + } + } +} + + +/* Add a new TLB entry. At most one entry for a given virtual address + is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the + supplied size is only used by tlb_flush_page. */ +void tlb_set_page(CPUState *cpu, target_ulong vaddr, + hwaddr paddr, int prot, + int mmu_idx, target_ulong size) +{ + CPUArchState *env = cpu->env_ptr; + MemoryRegionSection *section; + unsigned int index; + target_ulong address; + target_ulong code_address; + uintptr_t addend; + CPUTLBEntry *te; + hwaddr iotlb, xlat, sz; + unsigned vidx = env->vtlb_index++ % CPU_VTLB_SIZE; + + assert(size >= TARGET_PAGE_SIZE); + if (size != TARGET_PAGE_SIZE) { + tlb_add_large_page(env, vaddr, size); + } + + sz = size; + section = address_space_translate_for_iotlb(cpu->as, paddr, + &xlat, &sz); + assert(sz >= TARGET_PAGE_SIZE); + +#if defined(DEBUG_TLB) + printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx + " prot=%x idx=%d\n", + vaddr, paddr, prot, mmu_idx); +#endif + + address = vaddr; + if (!memory_region_is_ram(section->mr) && !memory_region_is_romd(section->mr)) { + /* IO memory case */ + address |= TLB_MMIO; + addend = 0; + } else { + /* TLB_MMIO for rom/romd handled below */ + addend = (uintptr_t)memory_region_get_ram_ptr(section->mr) + xlat; + } + + code_address = address; + iotlb = memory_region_section_get_iotlb(cpu, section, vaddr, paddr, xlat, + prot, &address); + + index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + te = &env->tlb_table[mmu_idx][index]; + + /* do not discard the translation in te, evict it into a victim tlb */ + env->tlb_v_table[mmu_idx][vidx] = *te; + env->iotlb_v[mmu_idx][vidx] = env->iotlb[mmu_idx][index]; + + /* refill the tlb */ + env->iotlb[mmu_idx][index] = iotlb - vaddr; + te->addend = addend - vaddr; + if (prot & PAGE_READ) { + te->addr_read = address; + } else { + te->addr_read = -1; + } + + if (prot & PAGE_EXEC) { + te->addr_code = code_address; + } else { + te->addr_code = -1; + } + if (prot & PAGE_WRITE) { + if ((memory_region_is_ram(section->mr) && section->readonly) + || memory_region_is_romd(section->mr)) { + /* Write access calls the I/O callback. */ + te->addr_write = address | TLB_MMIO; + } else if (memory_region_is_ram(section->mr) + && cpu_physical_memory_is_clean(cpu->uc, section->mr->ram_addr + + xlat)) { + te->addr_write = address | TLB_NOTDIRTY; + } else { + te->addr_write = address; + } + } else { + te->addr_write = -1; + } +} + +/* NOTE: this function can trigger an exception */ +/* NOTE2: the returned address is not exactly the physical address: it + * is actually a ram_addr_t (in system mode; the user mode emulation + * version of this function returns a guest virtual address). + */ +tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) +{ + int mmu_idx, page_index, pd; + void *p; + MemoryRegion *mr; + CPUState *cpu = ENV_GET_CPU(env1); + + page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx = cpu_mmu_index(env1); + if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code != + (addr & TARGET_PAGE_MASK))) { + cpu_ldub_code(env1, addr); + } + pd = env1->iotlb[mmu_idx][page_index] & ~TARGET_PAGE_MASK; + mr = iotlb_to_region(cpu->as, pd); + if (memory_region_is_unassigned(cpu->uc, mr)) { + CPUClass *cc = CPU_GET_CLASS(env1->uc, cpu); + + if (cc->do_unassigned_access) { + cc->do_unassigned_access(cpu, addr, false, true, 0, 4); + } else { + //cpu_abort(cpu, "Trying to execute code outside RAM or ROM at 0x" + // TARGET_FMT_lx "\n", addr); // qq + env1->invalid_addr = addr; + env1->invalid_error = UC_ERR_CODE_INVALID; + return -1; // qq FIXME + } + } + p = (void *)((uintptr_t)addr + env1->tlb_table[mmu_idx][page_index].addend); + return qemu_ram_addr_from_host_nofail(cpu->uc, p); +} + +static ram_addr_t qemu_ram_addr_from_host_nofail(struct uc_struct *uc, void *ptr) +{ + ram_addr_t ram_addr; + + if (qemu_ram_addr_from_host(uc, ptr, &ram_addr) == NULL) { + fprintf(stderr, "Bad ram pointer %p\n", ptr); + abort(); + } + return ram_addr; +} + +static void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr) +{ + if (tlb_entry->addr_write == (vaddr | TLB_NOTDIRTY)) { + tlb_entry->addr_write = vaddr; + } +} + +/* Our TLB does not support large pages, so remember the area covered by + large pages and trigger a full TLB flush if these are invalidated. */ +static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr, + target_ulong size) +{ + target_ulong mask = ~(size - 1); + + if (env->tlb_flush_addr == (target_ulong)-1) { + env->tlb_flush_addr = vaddr & mask; + env->tlb_flush_mask = mask; + return; + } + /* Extend the existing region to include the new page. + This is a compromise between unnecessary flushes and the cost + of maintaining a full variable size TLB. */ + mask &= env->tlb_flush_mask; + while (((env->tlb_flush_addr ^ vaddr) & mask) != 0) { + mask <<= 1; + } + env->tlb_flush_addr &= mask; + env->tlb_flush_mask = mask; +} + +static bool tlb_is_dirty_ram(CPUTLBEntry *tlbe) +{ + return (tlbe->addr_write & (TLB_INVALID_MASK|TLB_MMIO|TLB_NOTDIRTY)) == 0; +} + + +static void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr) +{ + if (addr == (tlb_entry->addr_read & + (TARGET_PAGE_MASK | TLB_INVALID_MASK)) || + addr == (tlb_entry->addr_write & + (TARGET_PAGE_MASK | TLB_INVALID_MASK)) || + addr == (tlb_entry->addr_code & + (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { + memset(tlb_entry, -1, sizeof(*tlb_entry)); + } +} + + +#define MMUSUFFIX _mmu + +#define SHIFT 0 +#include "softmmu_template.h" + +#define SHIFT 1 +#include "softmmu_template.h" + +#define SHIFT 2 +#include "softmmu_template.h" + +#define SHIFT 3 +#include "softmmu_template.h" +#undef MMUSUFFIX + +#define MMUSUFFIX _cmmu +#undef GETPC_ADJ +#define GETPC_ADJ 0 +#undef GETRA +#define GETRA() ((uintptr_t)0) +#define SOFTMMU_CODE_ACCESS + +#define SHIFT 0 +#include "softmmu_template.h" + +#define SHIFT 1 +#include "softmmu_template.h" + +#define SHIFT 2 +#include "softmmu_template.h" + +#define SHIFT 3 +#include "softmmu_template.h" diff --git a/qemu/default-configs/aarch64-softmmu.mak b/qemu/default-configs/aarch64-softmmu.mak new file mode 100644 index 00000000..6d3b5c7a --- /dev/null +++ b/qemu/default-configs/aarch64-softmmu.mak @@ -0,0 +1,6 @@ +# Default configuration for aarch64-softmmu + +# We support all the 32 bit boards so need all their config +include arm-softmmu.mak + +# Currently no 64-bit specific config requirements diff --git a/qemu/default-configs/alpha-softmmu.mak b/qemu/default-configs/alpha-softmmu.mak new file mode 100644 index 00000000..bc07600f --- /dev/null +++ b/qemu/default-configs/alpha-softmmu.mak @@ -0,0 +1,17 @@ +# Default configuration for alpha-softmmu + +include pci.mak +include usb.mak +CONFIG_SERIAL=y +CONFIG_I8254=y +CONFIG_PCKBD=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_VGA_CIRRUS=y +CONFIG_IDE_CORE=y +CONFIG_IDE_QDEV=y +CONFIG_VMWARE_VGA=y +CONFIG_IDE_CMD646=y +CONFIG_I8259=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y diff --git a/qemu/default-configs/arm-softmmu.mak b/qemu/default-configs/arm-softmmu.mak new file mode 100644 index 00000000..f3513fa1 --- /dev/null +++ b/qemu/default-configs/arm-softmmu.mak @@ -0,0 +1,90 @@ +# Default configuration for arm-softmmu + +include pci.mak +include usb.mak +CONFIG_VGA=y +CONFIG_ISA_MMIO=y +CONFIG_NAND=y +CONFIG_ECC=y +CONFIG_SERIAL=y +CONFIG_PTIMER=y +CONFIG_SD=y +CONFIG_MAX7310=y +CONFIG_WM8750=y +CONFIG_TWL92230=y +CONFIG_TSC2005=y +CONFIG_LM832X=y +CONFIG_TMP105=y +CONFIG_STELLARIS=y +CONFIG_STELLARIS_INPUT=y +CONFIG_STELLARIS_ENET=y +CONFIG_SSD0303=y +CONFIG_SSD0323=y +CONFIG_ADS7846=y +CONFIG_MAX111X=y +CONFIG_SSI=y +CONFIG_SSI_SD=y +CONFIG_SSI_M25P80=y +CONFIG_LAN9118=y +CONFIG_SMC91C111=y +CONFIG_ALLWINNER_EMAC=y +CONFIG_DS1338=y +CONFIG_PFLASH_CFI01=y +CONFIG_PFLASH_CFI02=y +CONFIG_MICRODRIVE=y +CONFIG_USB_MUSB=y + +CONFIG_ARM11MPCORE=y +CONFIG_A9MPCORE=y +CONFIG_A15MPCORE=y + +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_KVM=$(CONFIG_KVM) +CONFIG_ARM_TIMER=y +CONFIG_ARM_MPTIMER=y +CONFIG_A9_GTIMER=y +CONFIG_PL011=y +CONFIG_PL022=y +CONFIG_PL031=y +CONFIG_PL041=y +CONFIG_PL050=y +CONFIG_PL061=y +CONFIG_PL080=y +CONFIG_PL110=y +CONFIG_PL181=y +CONFIG_PL190=y +CONFIG_PL310=y +CONFIG_PL330=y +CONFIG_CADENCE=y +CONFIG_XGMAC=y +CONFIG_EXYNOS4=y +CONFIG_PXA2XX=y +CONFIG_BITBANG_I2C=y +CONFIG_FRAMEBUFFER=y +CONFIG_XILINX_SPIPS=y + +CONFIG_ARM11SCU=y +CONFIG_A9SCU=y +CONFIG_DIGIC=y +CONFIG_MARVELL_88W8618=y +CONFIG_OMAP=y +CONFIG_TSC210X=y +CONFIG_BLIZZARD=y +CONFIG_ONENAND=y +CONFIG_TUSB6010=y +CONFIG_IMX=y +CONFIG_MAINSTONE=y +CONFIG_NSERIES=y +CONFIG_REALVIEW=y +CONFIG_ZAURUS=y +CONFIG_ZYNQ=y + +CONFIG_VERSATILE_PCI=y +CONFIG_VERSATILE_I2C=y + +CONFIG_SDHCI=y +CONFIG_INTEGRATOR_DEBUG=y + +CONFIG_ALLWINNER_A10_PIT=y +CONFIG_ALLWINNER_A10_PIC=y +CONFIG_ALLWINNER_A10=y diff --git a/qemu/default-configs/cris-softmmu.mak b/qemu/default-configs/cris-softmmu.mak new file mode 100644 index 00000000..d970d501 --- /dev/null +++ b/qemu/default-configs/cris-softmmu.mak @@ -0,0 +1,6 @@ +# Default configuration for cris-softmmu + +CONFIG_ETRAXFS=y +CONFIG_NAND=y +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI02=y diff --git a/qemu/default-configs/i386-softmmu.mak b/qemu/default-configs/i386-softmmu.mak new file mode 100644 index 00000000..8e088417 --- /dev/null +++ b/qemu/default-configs/i386-softmmu.mak @@ -0,0 +1,47 @@ +# Default configuration for i386-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_VGA=y +CONFIG_QXL=$(CONFIG_SPICE) +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_VMMOUSE=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_NE2000_ISA=y +CONFIG_PIIX_PCI=y +CONFIG_HPET=y +CONFIG_APPLESMC=y +CONFIG_I8259=y +CONFIG_PFLASH_CFI01=y +CONFIG_TPM_TIS=$(CONFIG_TPM) +CONFIG_PCI_HOTPLUG_OLD=y +CONFIG_MC146818RTC=y +CONFIG_PAM=y +CONFIG_PCI_PIIX=y +CONFIG_WDT_IB700=y +CONFIG_XEN_I386=$(CONFIG_XEN) +CONFIG_ISA_DEBUG=y +CONFIG_ISA_TESTDEV=y +CONFIG_VMPORT=y +CONFIG_SGA=y +CONFIG_LPC_ICH9=y +CONFIG_PCI_Q35=y +CONFIG_APIC=y +CONFIG_IOAPIC=y +CONFIG_ICC_BUS=y +CONFIG_PVPANIC=y +CONFIG_MEM_HOTPLUG=y diff --git a/qemu/default-configs/lm32-softmmu.mak b/qemu/default-configs/lm32-softmmu.mak new file mode 100644 index 00000000..7df58c88 --- /dev/null +++ b/qemu/default-configs/lm32-softmmu.mak @@ -0,0 +1,10 @@ +# Default configuration for lm32-softmmu + +CONFIG_LM32=y +CONFIG_MILKYMIST=y +CONFIG_MILKYMIST_TMU2=$(CONFIG_GLX) +CONFIG_FRAMEBUFFER=y +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI01=y +CONFIG_PFLASH_CFI02=y +CONFIG_SD=y diff --git a/qemu/default-configs/m68k-softmmu.mak b/qemu/default-configs/m68k-softmmu.mak new file mode 100644 index 00000000..d9552df0 --- /dev/null +++ b/qemu/default-configs/m68k-softmmu.mak @@ -0,0 +1,6 @@ +# Default configuration for m68k-softmmu + +include pci.mak +include usb.mak +CONFIG_COLDFIRE=y +CONFIG_PTIMER=y diff --git a/qemu/default-configs/microblaze-softmmu.mak b/qemu/default-configs/microblaze-softmmu.mak new file mode 100644 index 00000000..ce263081 --- /dev/null +++ b/qemu/default-configs/microblaze-softmmu.mak @@ -0,0 +1,11 @@ +# Default configuration for microblaze-softmmu + +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI01=y +CONFIG_SERIAL=y +CONFIG_XILINX=y +CONFIG_XILINX_AXI=y +CONFIG_XILINX_SPI=y +CONFIG_XILINX_ETHLITE=y +CONFIG_SSI=y +CONFIG_SSI_M25P80=y diff --git a/qemu/default-configs/microblazeel-softmmu.mak b/qemu/default-configs/microblazeel-softmmu.mak new file mode 100644 index 00000000..acf22c5b --- /dev/null +++ b/qemu/default-configs/microblazeel-softmmu.mak @@ -0,0 +1,11 @@ +# Default configuration for microblazeel-softmmu + +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI01=y +CONFIG_SERIAL=y +CONFIG_XILINX=y +CONFIG_XILINX_AXI=y +CONFIG_XILINX_SPI=y +CONFIG_XILINX_ETHLITE=y +CONFIG_SSI=y +CONFIG_SSI_M25P80=y diff --git a/qemu/default-configs/mips-softmmu.mak b/qemu/default-configs/mips-softmmu.mak new file mode 100644 index 00000000..2a80b04d --- /dev/null +++ b/qemu/default-configs/mips-softmmu.mak @@ -0,0 +1,36 @@ +# Default configuration for mips-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ESP=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_ISA_MM=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_PIIX4=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_NE2000_ISA=y +CONFIG_RC4030=y +CONFIG_DP8393X=y +CONFIG_DS1225Y=y +CONFIG_MIPSNET=y +CONFIG_PFLASH_CFI01=y +CONFIG_G364FB=y +CONFIG_I8259=y +CONFIG_JAZZ_LED=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y +CONFIG_EMPTY_SLOT=y diff --git a/qemu/default-configs/mips64-softmmu.mak b/qemu/default-configs/mips64-softmmu.mak new file mode 100644 index 00000000..f1f933bc --- /dev/null +++ b/qemu/default-configs/mips64-softmmu.mak @@ -0,0 +1,36 @@ +# Default configuration for mips64-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ESP=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_ISA_MM=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_PIIX4=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_NE2000_ISA=y +CONFIG_RC4030=y +CONFIG_DP8393X=y +CONFIG_DS1225Y=y +CONFIG_MIPSNET=y +CONFIG_PFLASH_CFI01=y +CONFIG_G364FB=y +CONFIG_I8259=y +CONFIG_JAZZ_LED=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y +CONFIG_EMPTY_SLOT=y diff --git a/qemu/default-configs/mips64el-softmmu.mak b/qemu/default-configs/mips64el-softmmu.mak new file mode 100644 index 00000000..317b1513 --- /dev/null +++ b/qemu/default-configs/mips64el-softmmu.mak @@ -0,0 +1,39 @@ +# Default configuration for mips64el-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ESP=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_ISA_MM=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_PIIX4=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_IDE_VIA=y +CONFIG_NE2000_ISA=y +CONFIG_RC4030=y +CONFIG_DP8393X=y +CONFIG_DS1225Y=y +CONFIG_MIPSNET=y +CONFIG_PFLASH_CFI01=y +CONFIG_FULONG=y +CONFIG_G364FB=y +CONFIG_I8259=y +CONFIG_JAZZ_LED=y +CONFIG_MC146818RTC=y +CONFIG_VT82C686=y +CONFIG_ISA_TESTDEV=y +CONFIG_EMPTY_SLOT=y diff --git a/qemu/default-configs/mipsel-softmmu.mak b/qemu/default-configs/mipsel-softmmu.mak new file mode 100644 index 00000000..7708185f --- /dev/null +++ b/qemu/default-configs/mipsel-softmmu.mak @@ -0,0 +1,36 @@ +# Default configuration for mipsel-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ESP=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_ISA_MM=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_PIIX4=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_NE2000_ISA=y +CONFIG_RC4030=y +CONFIG_DP8393X=y +CONFIG_DS1225Y=y +CONFIG_MIPSNET=y +CONFIG_PFLASH_CFI01=y +CONFIG_G364FB=y +CONFIG_I8259=y +CONFIG_JAZZ_LED=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y +CONFIG_EMPTY_SLOT=y diff --git a/qemu/default-configs/moxie-softmmu.mak b/qemu/default-configs/moxie-softmmu.mak new file mode 100644 index 00000000..1a954764 --- /dev/null +++ b/qemu/default-configs/moxie-softmmu.mak @@ -0,0 +1,5 @@ +# Default configuration for moxie-softmmu + +CONFIG_MC146818RTC=y +CONFIG_SERIAL=y +CONFIG_VGA=y diff --git a/qemu/default-configs/or32-softmmu.mak b/qemu/default-configs/or32-softmmu.mak new file mode 100644 index 00000000..cce47467 --- /dev/null +++ b/qemu/default-configs/or32-softmmu.mak @@ -0,0 +1,4 @@ +# Default configuration for or32-softmmu + +CONFIG_SERIAL=y +CONFIG_OPENCORES_ETH=y diff --git a/qemu/default-configs/pci.mak b/qemu/default-configs/pci.mak new file mode 100644 index 00000000..91b1e92d --- /dev/null +++ b/qemu/default-configs/pci.mak @@ -0,0 +1,32 @@ +CONFIG_PCI=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO=y +CONFIG_USB_UHCI=y +CONFIG_USB_OHCI=y +CONFIG_USB_EHCI=y +CONFIG_USB_XHCI=y +CONFIG_NE2000_PCI=y +CONFIG_EEPRO100_PCI=y +CONFIG_PCNET_PCI=y +CONFIG_PCNET_COMMON=y +CONFIG_AC97=y +CONFIG_HDA=y +CONFIG_ES1370=y +CONFIG_LSI_SCSI_PCI=y +CONFIG_VMW_PVSCSI_SCSI_PCI=y +CONFIG_MEGASAS_SCSI_PCI=y +CONFIG_RTL8139_PCI=y +CONFIG_E1000_PCI=y +CONFIG_VMXNET3_PCI=y +CONFIG_IDE_CORE=y +CONFIG_IDE_QDEV=y +CONFIG_IDE_PCI=y +CONFIG_AHCI=y +CONFIG_ESP=y +CONFIG_ESP_PCI=y +CONFIG_SERIAL=y +CONFIG_SERIAL_PCI=y +CONFIG_IPACK=y +CONFIG_WDT_IB6300ESB=y +CONFIG_PCI_TESTDEV=y +CONFIG_NVME_PCI=y diff --git a/qemu/default-configs/ppc-softmmu.mak b/qemu/default-configs/ppc-softmmu.mak new file mode 100644 index 00000000..d725b233 --- /dev/null +++ b/qemu/default-configs/ppc-softmmu.mak @@ -0,0 +1,52 @@ +# Default configuration for ppc-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ISA_MMIO=y +CONFIG_ESCC=y +CONFIG_M48T59=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_I8257=y +CONFIG_I82374=y +CONFIG_OPENPIC=y +CONFIG_PREP_PCI=y +CONFIG_I82378=y +CONFIG_PC87312=y +CONFIG_MACIO=y +CONFIG_PCSPK=y +CONFIG_CUDA=y +CONFIG_ADB=y +CONFIG_MAC_NVRAM=y +CONFIG_MAC_DBDMA=y +CONFIG_HEATHROW_PIC=y +CONFIG_GRACKLE_PCI=y +CONFIG_UNIN_PCI=y +CONFIG_DEC_PCI=y +CONFIG_PPCE500_PCI=y +CONFIG_IDE_ISA=y +CONFIG_IDE_CMD646=y +CONFIG_IDE_MACIO=y +CONFIG_NE2000_ISA=y +CONFIG_PFLASH_CFI01=y +CONFIG_PFLASH_CFI02=y +CONFIG_PTIMER=y +CONFIG_I8259=y +CONFIG_XILINX=y +CONFIG_XILINX_ETHLITE=y +CONFIG_OPENPIC=y +CONFIG_PREP=y +CONFIG_MAC=y +CONFIG_E500=y +CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM)) +CONFIG_ETSEC=y +CONFIG_LIBDECNUMBER=y +# For PReP +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y diff --git a/qemu/default-configs/ppc64-softmmu.mak b/qemu/default-configs/ppc64-softmmu.mak new file mode 100644 index 00000000..bd30d693 --- /dev/null +++ b/qemu/default-configs/ppc64-softmmu.mak @@ -0,0 +1,62 @@ +# Default configuration for ppc64-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_ISA_MMIO=y +CONFIG_ESCC=y +CONFIG_M48T59=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_I8257=y +CONFIG_I82374=y +CONFIG_OPENPIC=y +CONFIG_PREP_PCI=y +CONFIG_I82378=y +CONFIG_PC87312=y +CONFIG_MACIO=y +CONFIG_PCSPK=y +CONFIG_CUDA=y +CONFIG_ADB=y +CONFIG_MAC_NVRAM=y +CONFIG_MAC_DBDMA=y +CONFIG_HEATHROW_PIC=y +CONFIG_GRACKLE_PCI=y +CONFIG_UNIN_PCI=y +CONFIG_DEC_PCI=y +CONFIG_PPCE500_PCI=y +CONFIG_IDE_ISA=y +CONFIG_IDE_CMD646=y +CONFIG_IDE_MACIO=y +CONFIG_NE2000_ISA=y +CONFIG_PFLASH_CFI01=y +CONFIG_PFLASH_CFI02=y +CONFIG_PTIMER=y +CONFIG_I8259=y +CONFIG_XILINX=y +CONFIG_XILINX_ETHLITE=y +CONFIG_OPENPIC=y +CONFIG_PSERIES=y +CONFIG_PREP=y +CONFIG_MAC=y +CONFIG_E500=y +CONFIG_OPENPIC_KVM=$(and $(CONFIG_E500),$(CONFIG_KVM)) +CONFIG_ETSEC=y +CONFIG_LIBDECNUMBER=y +# For pSeries +CONFIG_XICS=$(CONFIG_PSERIES) +CONFIG_XICS_KVM=$(and $(CONFIG_PSERIES),$(CONFIG_KVM)) +# For PReP +CONFIG_I82378=y +CONFIG_I8259=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_I82374=y +CONFIG_I8257=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y diff --git a/qemu/default-configs/ppcemb-softmmu.mak b/qemu/default-configs/ppcemb-softmmu.mak new file mode 100644 index 00000000..e0327614 --- /dev/null +++ b/qemu/default-configs/ppcemb-softmmu.mak @@ -0,0 +1,19 @@ +# Default configuration for ppcemb-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_M48T59=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_SERIAL=y +CONFIG_I8257=y +CONFIG_OPENPIC=y +CONFIG_PFLASH_CFI01=y +CONFIG_PFLASH_CFI02=y +CONFIG_PTIMER=y +CONFIG_I8259=y +CONFIG_XILINX=y +CONFIG_XILINX_ETHLITE=y +CONFIG_OPENPIC=y +CONFIG_LIBDECNUMBER=y diff --git a/qemu/default-configs/s390x-softmmu.mak b/qemu/default-configs/s390x-softmmu.mak new file mode 100644 index 00000000..126d88dc --- /dev/null +++ b/qemu/default-configs/s390x-softmmu.mak @@ -0,0 +1,4 @@ +CONFIG_VIRTIO=y +CONFIG_SCLPCONSOLE=y +CONFIG_S390_FLIC=y +CONFIG_S390_FLIC_KVM=$(CONFIG_KVM) diff --git a/qemu/default-configs/sh4-softmmu.mak b/qemu/default-configs/sh4-softmmu.mak new file mode 100644 index 00000000..8e00390d --- /dev/null +++ b/qemu/default-configs/sh4-softmmu.mak @@ -0,0 +1,18 @@ +# Default configuration for sh4-softmmu + +include pci.mak +include usb.mak +CONFIG_SERIAL=y +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI02=y +CONFIG_SH4=y +CONFIG_IDE_MMIO=y +CONFIG_SM501=y +CONFIG_ISA_TESTDEV=y +CONFIG_I82378=y +CONFIG_I8259=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_I82374=y +CONFIG_I8257=y +CONFIG_MC146818RTC=y diff --git a/qemu/default-configs/sh4eb-softmmu.mak b/qemu/default-configs/sh4eb-softmmu.mak new file mode 100644 index 00000000..efdd0584 --- /dev/null +++ b/qemu/default-configs/sh4eb-softmmu.mak @@ -0,0 +1,18 @@ +# Default configuration for sh4eb-softmmu + +include pci.mak +include usb.mak +CONFIG_SERIAL=y +CONFIG_PTIMER=y +CONFIG_PFLASH_CFI02=y +CONFIG_SH4=y +CONFIG_IDE_MMIO=y +CONFIG_SM501=y +CONFIG_ISA_TESTDEV=y +CONFIG_I82378=y +CONFIG_I8259=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_I82374=y +CONFIG_I8257=y +CONFIG_MC146818RTC=y diff --git a/qemu/default-configs/sound.mak b/qemu/default-configs/sound.mak new file mode 100644 index 00000000..4f22c34b --- /dev/null +++ b/qemu/default-configs/sound.mak @@ -0,0 +1,4 @@ +CONFIG_SB16=y +CONFIG_ADLIB=y +CONFIG_GUS=y +CONFIG_CS4231A=y diff --git a/qemu/default-configs/sparc-softmmu.mak b/qemu/default-configs/sparc-softmmu.mak new file mode 100644 index 00000000..ab796b3d --- /dev/null +++ b/qemu/default-configs/sparc-softmmu.mak @@ -0,0 +1,19 @@ +# Default configuration for sparc-softmmu + +CONFIG_ECC=y +CONFIG_ESP=y +CONFIG_ESCC=y +CONFIG_M48T59=y +CONFIG_PTIMER=y +CONFIG_FDC=y +CONFIG_EMPTY_SLOT=y +CONFIG_PCNET_COMMON=y +CONFIG_LANCE=y +CONFIG_TCX=y +CONFIG_CG3=y +CONFIG_SLAVIO=y +CONFIG_CS4231=y +CONFIG_GRLIB=y +CONFIG_STP2000=y +CONFIG_ECCMEMCTL=y +CONFIG_SUN4M=y diff --git a/qemu/default-configs/sparc64-softmmu.mak b/qemu/default-configs/sparc64-softmmu.mak new file mode 100644 index 00000000..299c97b7 --- /dev/null +++ b/qemu/default-configs/sparc64-softmmu.mak @@ -0,0 +1,18 @@ +# Default configuration for sparc64-softmmu + +include pci.mak +include usb.mak +CONFIG_ISA_MMIO=y +CONFIG_M48T59=y +CONFIG_PTIMER=y +CONFIG_VGA=y +CONFIG_VGA_PCI=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_IDE_ISA=y +CONFIG_IDE_CMD646=y +CONFIG_PCI_APB=y +CONFIG_MC146818RTC=y +CONFIG_ISA_TESTDEV=y diff --git a/qemu/default-configs/tricore-softmmu.mak b/qemu/default-configs/tricore-softmmu.mak new file mode 100644 index 00000000..e69de29b diff --git a/qemu/default-configs/unicore32-softmmu.mak b/qemu/default-configs/unicore32-softmmu.mak new file mode 100644 index 00000000..de38577a --- /dev/null +++ b/qemu/default-configs/unicore32-softmmu.mak @@ -0,0 +1,4 @@ +# Default configuration for unicore32-softmmu +CONFIG_PUV3=y +CONFIG_PTIMER=y +CONFIG_PCKBD=y diff --git a/qemu/default-configs/usb.mak b/qemu/default-configs/usb.mak new file mode 100644 index 00000000..73d84895 --- /dev/null +++ b/qemu/default-configs/usb.mak @@ -0,0 +1,9 @@ +CONFIG_USB_TABLET_WACOM=y +CONFIG_USB_STORAGE_BOT=y +CONFIG_USB_STORAGE_UAS=y +CONFIG_USB_STORAGE_MTP=y +CONFIG_USB_SMARTCARD=y +CONFIG_USB_AUDIO=y +CONFIG_USB_SERIAL=y +CONFIG_USB_NETWORK=y +CONFIG_USB_BLUETOOTH=y diff --git a/qemu/default-configs/x86_64-softmmu.mak b/qemu/default-configs/x86_64-softmmu.mak new file mode 100644 index 00000000..66557ac5 --- /dev/null +++ b/qemu/default-configs/x86_64-softmmu.mak @@ -0,0 +1,47 @@ +# Default configuration for x86_64-softmmu + +include pci.mak +include sound.mak +include usb.mak +CONFIG_VGA=y +CONFIG_QXL=$(CONFIG_SPICE) +CONFIG_VGA_PCI=y +CONFIG_VGA_ISA=y +CONFIG_VGA_CIRRUS=y +CONFIG_VMWARE_VGA=y +CONFIG_VMMOUSE=y +CONFIG_SERIAL=y +CONFIG_PARALLEL=y +CONFIG_I8254=y +CONFIG_PCSPK=y +CONFIG_PCKBD=y +CONFIG_FDC=y +CONFIG_ACPI=y +CONFIG_APM=y +CONFIG_I8257=y +CONFIG_IDE_ISA=y +CONFIG_IDE_PIIX=y +CONFIG_NE2000_ISA=y +CONFIG_PIIX_PCI=y +CONFIG_HPET=y +CONFIG_APPLESMC=y +CONFIG_I8259=y +CONFIG_PFLASH_CFI01=y +CONFIG_TPM_TIS=$(CONFIG_TPM) +CONFIG_PCI_HOTPLUG_OLD=y +CONFIG_MC146818RTC=y +CONFIG_PAM=y +CONFIG_PCI_PIIX=y +CONFIG_WDT_IB700=y +CONFIG_XEN_I386=$(CONFIG_XEN) +CONFIG_ISA_DEBUG=y +CONFIG_ISA_TESTDEV=y +CONFIG_VMPORT=y +CONFIG_SGA=y +CONFIG_LPC_ICH9=y +CONFIG_PCI_Q35=y +CONFIG_APIC=y +CONFIG_IOAPIC=y +CONFIG_ICC_BUS=y +CONFIG_PVPANIC=y +CONFIG_MEM_HOTPLUG=y diff --git a/qemu/default-configs/xtensa-softmmu.mak b/qemu/default-configs/xtensa-softmmu.mak new file mode 100644 index 00000000..9d8899cd --- /dev/null +++ b/qemu/default-configs/xtensa-softmmu.mak @@ -0,0 +1,5 @@ +# Default configuration for Xtensa + +CONFIG_SERIAL=y +CONFIG_OPENCORES_ETH=y +CONFIG_PFLASH_CFI01=y diff --git a/qemu/default-configs/xtensaeb-softmmu.mak b/qemu/default-configs/xtensaeb-softmmu.mak new file mode 100644 index 00000000..9d8899cd --- /dev/null +++ b/qemu/default-configs/xtensaeb-softmmu.mak @@ -0,0 +1,5 @@ +# Default configuration for Xtensa + +CONFIG_SERIAL=y +CONFIG_OPENCORES_ETH=y +CONFIG_PFLASH_CFI01=y diff --git a/qemu/docs/aio_notify.promela b/qemu/docs/aio_notify.promela new file mode 100644 index 00000000..ad3f6f08 --- /dev/null +++ b/qemu/docs/aio_notify.promela @@ -0,0 +1,104 @@ +/* + * This model describes the interaction between aio_set_dispatching() + * and aio_notify(). + * + * Author: Paolo Bonzini + * + * This file is in the public domain. If you really want a license, + * the WTFPL will do. + * + * To simulate it: + * spin -p docs/aio_notify.promela + * + * To verify it: + * spin -a docs/aio_notify.promela + * gcc -O2 pan.c + * ./a.out -a + */ + +#define MAX 4 +#define LAST (1 << (MAX - 1)) +#define FINAL ((LAST << 1) - 1) + +bool dispatching; +bool event; + +int req, done; + +active proctype waiter() +{ + int fetch, blocking; + + do + :: done != FINAL -> { + // Computing "blocking" is separate from execution of the + // "bottom half" + blocking = (req == 0); + + // This is our "bottom half" + atomic { fetch = req; req = 0; } + done = done | fetch; + + // Wait for a nudge from the other side + do + :: event == 1 -> { event = 0; break; } + :: !blocking -> break; + od; + + dispatching = 1; + + // If you are simulating this model, you may want to add + // something like this here: + // + // int foo; foo++; foo++; foo++; + // + // This only wastes some time and makes it more likely + // that the notifier process hits the "fast path". + + dispatching = 0; + } + :: else -> break; + od +} + +active proctype notifier() +{ + int next = 1; + int sets = 0; + + do + :: next <= LAST -> { + // generate a request + req = req | next; + next = next << 1; + + // aio_notify + if + :: dispatching == 0 -> sets++; event = 1; + :: else -> skip; + fi; + + // Test both synchronous and asynchronous delivery + if + :: 1 -> do + :: req == 0 -> break; + od; + :: 1 -> skip; + fi; + } + :: else -> break; + od; + printf("Skipped %d event_notifier_set\n", MAX - sets); +} + +#define p (done == FINAL) + +never { + do + :: 1 // after an arbitrarily long prefix + :: p -> break // p becomes true + od; + do + :: !p -> accept: break // it then must remains true forever after + od +} diff --git a/qemu/docs/atomics.txt b/qemu/docs/atomics.txt new file mode 100644 index 00000000..6f2997bc --- /dev/null +++ b/qemu/docs/atomics.txt @@ -0,0 +1,352 @@ +CPUs perform independent memory operations effectively in random order. +but this can be a problem for CPU-CPU interaction (including interactions +between QEMU and the guest). Multi-threaded programs use various tools +to instruct the compiler and the CPU to restrict the order to something +that is consistent with the expectations of the programmer. + +The most basic tool is locking. Mutexes, condition variables and +semaphores are used in QEMU, and should be the default approach to +synchronization. Anything else is considerably harder, but it's +also justified more often than one would like. The two tools that +are provided by qemu/atomic.h are memory barriers and atomic operations. + +Macros defined by qemu/atomic.h fall in three camps: + +- compiler barriers: barrier(); + +- weak atomic access and manual memory barriers: atomic_read(), + atomic_set(), smp_rmb(), smp_wmb(), smp_mb(), smp_read_barrier_depends(); + +- sequentially consistent atomic access: everything else. + + +COMPILER MEMORY BARRIER +======================= + +barrier() prevents the compiler from moving the memory accesses either +side of it to the other side. The compiler barrier has no direct effect +on the CPU, which may then reorder things however it wishes. + +barrier() is mostly used within qemu/atomic.h itself. On some +architectures, CPU guarantees are strong enough that blocking compiler +optimizations already ensures the correct order of execution. In this +case, qemu/atomic.h will reduce stronger memory barriers to simple +compiler barriers. + +Still, barrier() can be useful when writing code that can be interrupted +by signal handlers. + + +SEQUENTIALLY CONSISTENT ATOMIC ACCESS +===================================== + +Most of the operations in the qemu/atomic.h header ensure *sequential +consistency*, where "the result of any execution is the same as if the +operations of all the processors were executed in some sequential order, +and the operations of each individual processor appear in this sequence +in the order specified by its program". + +qemu/atomic.h provides the following set of atomic read-modify-write +operations: + + void atomic_inc(ptr) + void atomic_dec(ptr) + void atomic_add(ptr, val) + void atomic_sub(ptr, val) + void atomic_and(ptr, val) + void atomic_or(ptr, val) + + typeof(*ptr) atomic_fetch_inc(ptr) + typeof(*ptr) atomic_fetch_dec(ptr) + typeof(*ptr) atomic_fetch_add(ptr, val) + typeof(*ptr) atomic_fetch_sub(ptr, val) + typeof(*ptr) atomic_fetch_and(ptr, val) + typeof(*ptr) atomic_fetch_or(ptr, val) + typeof(*ptr) atomic_xchg(ptr, val + typeof(*ptr) atomic_cmpxchg(ptr, old, new) + +all of which return the old value of *ptr. These operations are +polymorphic; they operate on any type that is as wide as an int. + +Sequentially consistent loads and stores can be done using: + + atomic_fetch_add(ptr, 0) for loads + atomic_xchg(ptr, val) for stores + +However, they are quite expensive on some platforms, notably POWER and +ARM. Therefore, qemu/atomic.h provides two primitives with slightly +weaker constraints: + + typeof(*ptr) atomic_mb_read(ptr) + void atomic_mb_set(ptr, val) + +The semantics of these primitives map to Java volatile variables, +and are strongly related to memory barriers as used in the Linux +kernel (see below). + +As long as you use atomic_mb_read and atomic_mb_set, accesses cannot +be reordered with each other, and it is also not possible to reorder +"normal" accesses around them. + +However, and this is the important difference between +atomic_mb_read/atomic_mb_set and sequential consistency, it is important +for both threads to access the same volatile variable. It is not the +case that everything visible to thread A when it writes volatile field f +becomes visible to thread B after it reads volatile field g. The store +and load have to "match" (i.e., be performed on the same volatile +field) to achieve the right semantics. + + +These operations operate on any type that is as wide as an int or smaller. + + +WEAK ATOMIC ACCESS AND MANUAL MEMORY BARRIERS +============================================= + +Compared to sequentially consistent atomic access, programming with +weaker consistency models can be considerably more complicated. +In general, if the algorithm you are writing includes both writes +and reads on the same side, it is generally simpler to use sequentially +consistent primitives. + +When using this model, variables are accessed with atomic_read() and +atomic_set(), and restrictions to the ordering of accesses is enforced +using the smp_rmb(), smp_wmb(), smp_mb() and smp_read_barrier_depends() +memory barriers. + +atomic_read() and atomic_set() prevents the compiler from using +optimizations that might otherwise optimize accesses out of existence +on the one hand, or that might create unsolicited accesses on the other. +In general this should not have any effect, because the same compiler +barriers are already implied by memory barriers. However, it is useful +to do so, because it tells readers which variables are shared with +other threads, and which are local to the current thread or protected +by other, more mundane means. + +Memory barriers control the order of references to shared memory. +They come in four kinds: + +- smp_rmb() guarantees that all the LOAD operations specified before + the barrier will appear to happen before all the LOAD operations + specified after the barrier with respect to the other components of + the system. + + In other words, smp_rmb() puts a partial ordering on loads, but is not + required to have any effect on stores. + +- smp_wmb() guarantees that all the STORE operations specified before + the barrier will appear to happen before all the STORE operations + specified after the barrier with respect to the other components of + the system. + + In other words, smp_wmb() puts a partial ordering on stores, but is not + required to have any effect on loads. + +- smp_mb() guarantees that all the LOAD and STORE operations specified + before the barrier will appear to happen before all the LOAD and + STORE operations specified after the barrier with respect to the other + components of the system. + + smp_mb() puts a partial ordering on both loads and stores. It is + stronger than both a read and a write memory barrier; it implies both + smp_rmb() and smp_wmb(), but it also prevents STOREs coming before the + barrier from overtaking LOADs coming after the barrier and vice versa. + +- smp_read_barrier_depends() is a weaker kind of read barrier. On + most processors, whenever two loads are performed such that the + second depends on the result of the first (e.g., the first load + retrieves the address to which the second load will be directed), + the processor will guarantee that the first LOAD will appear to happen + before the second with respect to the other components of the system. + However, this is not always true---for example, it was not true on + Alpha processors. Whenever this kind of access happens to shared + memory (that is not protected by a lock), a read barrier is needed, + and smp_read_barrier_depends() can be used instead of smp_rmb(). + + Note that the first load really has to have a _data_ dependency and not + a control dependency. If the address for the second load is dependent + on the first load, but the dependency is through a conditional rather + than actually loading the address itself, then it's a _control_ + dependency and a full read barrier or better is required. + + +This is the set of barriers that is required *between* two atomic_read() +and atomic_set() operations to achieve sequential consistency: + + | 2nd operation | + |-----------------------------------------| + 1st operation | (after last) | atomic_read | atomic_set | + ---------------+--------------+-------------+------------| + (before first) | | none | smp_wmb() | + ---------------+--------------+-------------+------------| + atomic_read | smp_rmb() | smp_rmb()* | ** | + ---------------+--------------+-------------+------------| + atomic_set | none | smp_mb()*** | smp_wmb() | + ---------------+--------------+-------------+------------| + + * Or smp_read_barrier_depends(). + + ** This requires a load-store barrier. How to achieve this varies + depending on the machine, but in practice smp_rmb()+smp_wmb() + should have the desired effect. For example, on PowerPC the + lwsync instruction is a combined load-load, load-store and + store-store barrier. + + *** This requires a store-load barrier. On most machines, the only + way to achieve this is a full barrier. + + +You can see that the two possible definitions of atomic_mb_read() +and atomic_mb_set() are the following: + + 1) atomic_mb_read(p) = atomic_read(p); smp_rmb() + atomic_mb_set(p, v) = smp_wmb(); atomic_set(p, v); smp_mb() + + 2) atomic_mb_read(p) = smp_mb() atomic_read(p); smp_rmb() + atomic_mb_set(p, v) = smp_wmb(); atomic_set(p, v); + +Usually the former is used, because smp_mb() is expensive and a program +normally has more reads than writes. Therefore it makes more sense to +make atomic_mb_set() the more expensive operation. + +There are two common cases in which atomic_mb_read and atomic_mb_set +generate too many memory barriers, and thus it can be useful to manually +place barriers instead: + +- when a data structure has one thread that is always a writer + and one thread that is always a reader, manual placement of + memory barriers makes the write side faster. Furthermore, + correctness is easy to check for in this case using the "pairing" + trick that is explained below: + + thread 1 thread 1 + ------------------------- ------------------------ + (other writes) + smp_wmb() + atomic_mb_set(&a, x) atomic_set(&a, x) + smp_wmb() + atomic_mb_set(&b, y) atomic_set(&b, y) + + => + thread 2 thread 2 + ------------------------- ------------------------ + y = atomic_mb_read(&b) y = atomic_read(&b) + smp_rmb() + x = atomic_mb_read(&a) x = atomic_read(&a) + smp_rmb() + +- sometimes, a thread is accessing many variables that are otherwise + unrelated to each other (for example because, apart from the current + thread, exactly one other thread will read or write each of these + variables). In this case, it is possible to "hoist" the implicit + barriers provided by atomic_mb_read() and atomic_mb_set() outside + a loop. For example, the above definition atomic_mb_read() gives + the following transformation: + + n = 0; n = 0; + for (i = 0; i < 10; i++) => for (i = 0; i < 10; i++) + n += atomic_mb_read(&a[i]); n += atomic_read(&a[i]); + smp_rmb(); + + Similarly, atomic_mb_set() can be transformed as follows: + smp_mb(): + + smp_wmb(); + for (i = 0; i < 10; i++) => for (i = 0; i < 10; i++) + atomic_mb_set(&a[i], false); atomic_set(&a[i], false); + smp_mb(); + + +The two tricks can be combined. In this case, splitting a loop in +two lets you hoist the barriers out of the loops _and_ eliminate the +expensive smp_mb(): + + smp_wmb(); + for (i = 0; i < 10; i++) { => for (i = 0; i < 10; i++) + atomic_mb_set(&a[i], false); atomic_set(&a[i], false); + atomic_mb_set(&b[i], false); smb_wmb(); + } for (i = 0; i < 10; i++) + atomic_set(&a[i], false); + smp_mb(); + + The other thread can still use atomic_mb_read()/atomic_mb_set() + + +Memory barrier pairing +---------------------- + +A useful rule of thumb is that memory barriers should always, or almost +always, be paired with another barrier. In the case of QEMU, however, +note that the other barrier may actually be in a driver that runs in +the guest! + +For the purposes of pairing, smp_read_barrier_depends() and smp_rmb() +both count as read barriers. A read barriers shall pair with a write +barrier or a full barrier; a write barrier shall pair with a read +barrier or a full barrier. A full barrier can pair with anything. +For example: + + thread 1 thread 2 + =============== =============== + a = 1; + smp_wmb(); + b = 2; x = b; + smp_rmb(); + y = a; + +Note that the "writing" thread are accessing the variables in the +opposite order as the "reading" thread. This is expected: stores +before the write barrier will normally match the loads after the +read barrier, and vice versa. The same is true for more than 2 +access and for data dependency barriers: + + thread 1 thread 2 + =============== =============== + b[2] = 1; + smp_wmb(); + x->i = 2; + smp_wmb(); + a = x; x = a; + smp_read_barrier_depends(); + y = x->i; + smp_read_barrier_depends(); + z = b[y]; + +smp_wmb() also pairs with atomic_mb_read(), and smp_rmb() also pairs +with atomic_mb_set(). + + +COMPARISON WITH LINUX KERNEL MEMORY BARRIERS +============================================ + +Here is a list of differences between Linux kernel atomic operations +and memory barriers, and the equivalents in QEMU: + +- atomic operations in Linux are always on a 32-bit int type and + use a boxed atomic_t type; atomic operations in QEMU are polymorphic + and use normal C types. + +- atomic_read and atomic_set in Linux give no guarantee at all; + atomic_read and atomic_set in QEMU include a compiler barrier + (similar to the ACCESS_ONCE macro in Linux). + +- most atomic read-modify-write operations in Linux return void; + in QEMU, all of them return the old value of the variable. + +- different atomic read-modify-write operations in Linux imply + a different set of memory barriers; in QEMU, all of them enforce + sequential consistency, which means they imply full memory barriers + before and after the operation. + +- Linux does not have an equivalent of atomic_mb_read() and + atomic_mb_set(). In particular, note that set_mb() is a little + weaker than atomic_mb_set(). + + +SOURCES +======= + +* Documentation/memory-barriers.txt from the Linux kernel + +* "The JSR-133 Cookbook for Compiler Writers", available at + http://g.oswego.edu/dl/jmm/cookbook.html diff --git a/qemu/docs/blkdebug.txt b/qemu/docs/blkdebug.txt new file mode 100644 index 00000000..b67a36d5 --- /dev/null +++ b/qemu/docs/blkdebug.txt @@ -0,0 +1,161 @@ +Block I/O error injection using blkdebug +---------------------------------------- +Copyright (C) 2014 Red Hat Inc + +This work is licensed under the terms of the GNU GPL, version 2 or later. See +the COPYING file in the top-level directory. + +The blkdebug block driver is a rule-based error injection engine. It can be +used to exercise error code paths in block drivers including ENOSPC (out of +space) and EIO. + +This document gives an overview of the features available in blkdebug. + +Background +---------- +Block drivers have many error code paths that handle I/O errors. Image formats +are especially complex since metadata I/O errors during cluster allocation or +while updating tables happen halfway through request processing and require +discipline to keep image files consistent. + +Error injection allows test cases to trigger I/O errors at specific points. +This way, all error paths can be tested to make sure they are correct. + +Rules +----- +The blkdebug block driver takes a list of "rules" that tell the error injection +engine when to fail an I/O request. + +Each I/O request is evaluated against the rules. If a rule matches the request +then its "action" is executed. + +Rules can be placed in a configuration file; the configuration file +follows the same .ini-like format used by QEMU's -readconfig option, and +each section of the file represents a rule. + +The following configuration file defines a single rule: + + $ cat blkdebug.conf + [inject-error] + event = "read_aio" + errno = "28" + +This rule fails all aio read requests with ENOSPC (28). Note that the errno +value depends on the host. On Linux, see +/usr/include/asm-generic/errno-base.h for errno values. + +Invoke QEMU as follows: + + $ qemu-system-x86_64 + -drive if=none,cache=none,file=blkdebug:blkdebug.conf:test.img,id=drive0 \ + -device virtio-blk-pci,drive=drive0,id=virtio-blk-pci0 + +Rules support the following attributes: + + event - which type of operation to match (e.g. read_aio, write_aio, + flush_to_os, flush_to_disk). See the "Events" section for + information on events. + + state - (optional) the engine must be in this state number in order for this + rule to match. See the "State transitions" section for information + on states. + + errno - the numeric errno value to return when a request matches this rule. + The errno values depend on the host since the numeric values are not + standarized in the POSIX specification. + + sector - (optional) a sector number that the request must overlap in order to + match this rule + + once - (optional, default "off") only execute this action on the first + matching request + + immediately - (optional, default "off") return a NULL BlockAIOCB + pointer and fail without an errno instead. This + exercises the code path where BlockAIOCB fails and the + caller's BlockCompletionFunc is not invoked. + +Events +------ +Block drivers provide information about the type of I/O request they are about +to make so rules can match specific types of requests. For example, the qcow2 +block driver tells blkdebug when it accesses the L1 table so rules can match +only L1 table accesses and not other metadata or guest data requests. + +The core events are: + + read_aio - guest data read + + write_aio - guest data write + + flush_to_os - write out unwritten block driver state (e.g. cached metadata) + + flush_to_disk - flush the host block device's disk cache + +See block/blkdebug.c:event_names[] for the full list of events. You may need +to grep block driver source code to understand the meaning of specific events. + +State transitions +----------------- +There are cases where more power is needed to match a particular I/O request in +a longer sequence of requests. For example: + + write_aio + flush_to_disk + write_aio + +How do we match the 2nd write_aio but not the first? This is where state +transitions come in. + +The error injection engine has an integer called the "state" that always starts +initialized to 1. The state integer is internal to blkdebug and cannot be +observed from outside but rules can interact with it for powerful matching +behavior. + +Rules can be conditional on the current state and they can transition to a new +state. + +When a rule's "state" attribute is non-zero then the current state must equal +the attribute in order for the rule to match. + +For example, to match the 2nd write_aio: + + [set-state] + event = "write_aio" + state = "1" + new_state = "2" + + [inject-error] + event = "write_aio" + state = "2" + errno = "5" + +The first write_aio request matches the set-state rule and transitions from +state 1 to state 2. Once state 2 has been entered, the set-state rule no +longer matches since it requires state 1. But the inject-error rule now +matches the next write_aio request and injects EIO (5). + +State transition rules support the following attributes: + + event - which type of operation to match (e.g. read_aio, write_aio, + flush_to_os, flush_to_disk). See the "Events" section for + information on events. + + state - (optional) the engine must be in this state number in order for this + rule to match + + new_state - transition to this state number + +Suspend and resume +------------------ +Exercising code paths in block drivers may require specific ordering amongst +concurrent requests. The "breakpoint" feature allows requests to be halted on +a blkdebug event and resumed later. This makes it possible to achieve +deterministic ordering when multiple requests are in flight. + +Breakpoints on blkdebug events are associated with a user-defined "tag" string. +This tag serves as an identifier by which the request can be resumed at a later +point. + +See the qemu-io(1) break, resume, remove_break, and wait_break commands for +details. diff --git a/qemu/docs/blkverify.txt b/qemu/docs/blkverify.txt new file mode 100644 index 00000000..d556dc4e --- /dev/null +++ b/qemu/docs/blkverify.txt @@ -0,0 +1,69 @@ += Block driver correctness testing with blkverify = + +== Introduction == + +This document describes how to use the blkverify protocol to test that a block +driver is operating correctly. + +It is difficult to test and debug block drivers against real guests. Often +processes inside the guest will crash because corrupt sectors were read as part +of the executable. Other times obscure errors are raised by a program inside +the guest. These issues are extremely hard to trace back to bugs in the block +driver. + +Blkverify solves this problem by catching data corruption inside QEMU the first +time bad data is read and reporting the disk sector that is corrupted. + +== How it works == + +The blkverify protocol has two child block devices, the "test" device and the +"raw" device. Read/write operations are mirrored to both devices so their +state should always be in sync. + +The "raw" device is a raw image, a flat file, that has identical starting +contents to the "test" image. The idea is that the "raw" device will handle +read/write operations correctly and not corrupt data. It can be used as a +reference for comparison against the "test" device. + +After a mirrored read operation completes, blkverify will compare the data and +raise an error if it is not identical. This makes it possible to catch the +first instance where corrupt data is read. + +== Example == + +Imagine raw.img has 0xcd repeated throughout its first sector: + + $ ./qemu-io -c 'read -v 0 512' raw.img + 00000000: cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd ................ + 00000010: cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd ................ + [...] + 000001e0: cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd ................ + 000001f0: cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd cd ................ + read 512/512 bytes at offset 0 + 512.000000 bytes, 1 ops; 0.0000 sec (97.656 MiB/sec and 200000.0000 ops/sec) + +And test.img is corrupt, its first sector is zeroed when it shouldn't be: + + $ ./qemu-io -c 'read -v 0 512' test.img + 00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + [...] + 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ + read 512/512 bytes at offset 0 + 512.000000 bytes, 1 ops; 0.0000 sec (81.380 MiB/sec and 166666.6667 ops/sec) + +This error is caught by blkverify: + + $ ./qemu-io -c 'read 0 512' blkverify:a.img:b.img + blkverify: read sector_num=0 nb_sectors=4 contents mismatch in sector 0 + +A more realistic scenario is verifying the installation of a guest OS: + + $ ./qemu-img create raw.img 16G + $ ./qemu-img create -f qcow2 test.qcow2 16G + $ x86_64-softmmu/qemu-system-x86_64 -cdrom debian.iso \ + -drive file=blkverify:raw.img:test.qcow2 + +If the installation is aborted when blkverify detects corruption, use qemu-io +to explore the contents of the disk image at the sector in question. diff --git a/qemu/docs/bootindex.txt b/qemu/docs/bootindex.txt new file mode 100644 index 00000000..f84fac72 --- /dev/null +++ b/qemu/docs/bootindex.txt @@ -0,0 +1,43 @@ += Bootindex property = + +Block and net devices have bootindex property. This property is used to +determine the order in which firmware will consider devices for booting +the guest OS. If the bootindex property is not set for a device, it gets +lowest boot priority. There is no particular order in which devices with +unset bootindex property will be considered for booting, but they will +still be bootable. + +== Example == + +Let's assume we have a QEMU machine with two NICs (virtio, e1000) and two +disks (IDE, virtio): + +qemu -drive file=disk1.img,if=none,id=disk1 + -device ide-drive,drive=disk1,bootindex=4 + -drive file=disk2.img,if=none,id=disk2 + -device virtio-blk-pci,drive=disk2,bootindex=3 + -netdev type=user,id=net0 -device virtio-net-pci,netdev=net0,bootindex=2 + -netdev type=user,id=net1 -device e1000,netdev=net1,bootindex=1 + +Given the command above, firmware should try to boot from the e1000 NIC +first. If this fails, it should try the virtio NIC next; if this fails +too, it should try the virtio disk, and then the IDE disk. + +== Limitations == + +1. Some firmware has limitations on which devices can be considered for +booting. For instance, the PC BIOS boot specification allows only one +disk to be bootable. If boot from disk fails for some reason, the BIOS +won't retry booting from other disk. It can still try to boot from +floppy or net, though. + +2. Sometimes, firmware cannot map the device path QEMU wants firmware to +boot from to a boot method. It doesn't happen for devices the firmware +can natively boot from, but if firmware relies on an option ROM for +booting, and the same option ROM is used for booting from more then one +device, the firmware may not be able to ask the option ROM to boot from +a particular device reliably. For instance with the PC BIOS, if a SCSI HBA +has three bootable devices target1, target3, target5 connected to it, +the option ROM will have a boot method for each of them, but it is not +possible to map from boot method back to a specific target. This is a +shortcoming of the PC BIOS boot specification. diff --git a/qemu/docs/ccid.txt b/qemu/docs/ccid.txt new file mode 100644 index 00000000..c7fda6d0 --- /dev/null +++ b/qemu/docs/ccid.txt @@ -0,0 +1,181 @@ +QEMU CCID Device Documentation. + +Contents +1. USB CCID device +2. Building +3. Using ccid-card-emulated with hardware +4. Using ccid-card-emulated with certificates +5. Using ccid-card-passthru with client side hardware +6. Using ccid-card-passthru with client side certificates +7. Passthrough protocol scenario +8. libcacard + +1. USB CCID device + +The USB CCID device is a USB device implementing the CCID specification, which +lets one connect smart card readers that implement the same spec. For more +information see the specification: + + Universal Serial Bus + Device Class: Smart Card + CCID + Specification for + Integrated Circuit(s) Cards Interface Devices + Revision 1.1 + April 22rd, 2005 + +Smartcards are used for authentication, single sign on, decryption in +public/private schemes and digital signatures. A smartcard reader on the client +cannot be used on a guest with simple usb passthrough since it will then not be +available on the client, possibly locking the computer when it is "removed". On +the other hand this device can let you use the smartcard on both the client and +the guest machine. It is also possible to have a completely virtual smart card +reader and smart card (i.e. not backed by a physical device) using this device. + +2. Building + +The cryptographic functions and access to the physical card is done via NSS. + +Installing NSS: + +In redhat/fedora: + yum install nss-devel +In ubuntu/debian: + apt-get install libnss3-dev + (not tested on ubuntu) + +Configuring and building: + ./configure --enable-smartcard && make + + +3. Using ccid-card-emulated with hardware + +Assuming you have a working smartcard on the host with the current +user, using NSS, qemu acts as another NSS client using ccid-card-emulated: + + qemu -usb -device usb-ccid -device ccid-card-emulated + + +4. Using ccid-card-emulated with certificates stored in files + +You must create the CA and card certificates. This is a one time process. +We use NSS certificates: + + mkdir fake-smartcard + cd fake-smartcard + certutil -N -d sql:$PWD + certutil -S -d sql:$PWD -s "CN=Fake Smart Card CA" -x -t TC,TC,TC -n fake-smartcard-ca + certutil -S -d sql:$PWD -t ,, -s "CN=John Doe" -n id-cert -c fake-smartcard-ca + certutil -S -d sql:$PWD -t ,, -s "CN=John Doe (signing)" --nsCertType smime -n signing-cert -c fake-smartcard-ca + certutil -S -d sql:$PWD -t ,, -s "CN=John Doe (encryption)" --nsCertType sslClient -n encryption-cert -c fake-smartcard-ca + +Note: you must have exactly three certificates. + +You can use the emulated card type with the certificates backend: + + qemu -usb -device usb-ccid -device ccid-card-emulated,backend=certificates,db=sql:$PWD,cert1=id-cert,cert2=signing-cert,cert3=encryption-cert + +To use the certificates in the guest, export the CA certificate: + + certutil -L -r -d sql:$PWD -o fake-smartcard-ca.cer -n fake-smartcard-ca + +and import it in the guest: + + certutil -A -d /etc/pki/nssdb -i fake-smartcard-ca.cer -t TC,TC,TC -n fake-smartcard-ca + +In a Linux guest you can then use the CoolKey PKCS #11 module to access +the card: + + certutil -d /etc/pki/nssdb -L -h all + +It will prompt you for the PIN (which is the password you assigned to the +certificate database early on), and then show you all three certificates +together with the manually imported CA cert: + + Certificate Nickname Trust Attributes + fake-smartcard-ca CT,C,C + John Doe:CAC ID Certificate u,u,u + John Doe:CAC Email Signature Certificate u,u,u + John Doe:CAC Email Encryption Certificate u,u,u + +If this does not happen, CoolKey is not installed or not registered with +NSS. Registration can be done from Firefox or the command line: + + modutil -dbdir /etc/pki/nssdb -add "CAC Module" -libfile /usr/lib64/pkcs11/libcoolkeypk11.so + modutil -dbdir /etc/pki/nssdb -list + + +5. Using ccid-card-passthru with client side hardware + +on the host specify the ccid-card-passthru device with a suitable chardev: + + qemu -chardev socket,server,host=0.0.0.0,port=2001,id=ccid,nowait -usb -device usb-ccid -device ccid-card-passthru,chardev=ccid + +on the client run vscclient, built when you built QEMU: + + vscclient 2001 + + +6. Using ccid-card-passthru with client side certificates + +This case is not particularly useful, but you can use it to debug +your setup if #4 works but #5 does not. + +Follow instructions as per #4, except run QEMU and vscclient as follows: +Run qemu as per #5, and run vscclient from the "fake-smartcard" +directory as follows: + + qemu -chardev socket,server,host=0.0.0.0,port=2001,id=ccid,nowait -usb -device usb-ccid -device ccid-card-passthru,chardev=ccid + vscclient -e "db=\"sql:$PWD\" use_hw=no soft=(,Test,CAC,,id-cert,signing-cert,encryption-cert)" 2001 + + +7. Passthrough protocol scenario + +This is a typical interchange of messages when using the passthru card device. +usb-ccid is a usb device. It defaults to an unattached usb device on startup. +usb-ccid expects a chardev and expects the protocol defined in +cac_card/vscard_common.h to be passed over that. +The usb-ccid device can be in one of three modes: + * detached + * attached with no card + * attached with card + +A typical interchange is: (the arrow shows who started each exchange, it can be client +originated or guest originated) + +client event | vscclient | passthru | usb-ccid | guest event +---------------------------------------------------------------------------------------------- + | VSC_Init | | | + | VSC_ReaderAdd | | attach | + | | | | sees new usb device. +card inserted -> | | | | + | VSC_ATR | insert | insert | see new card + | | | | + | VSC_APDU | VSC_APDU | | <- guest sends APDU +client<->physical | | | | +card APDU exchange| | | | +client response ->| VSC_APDU | VSC_APDU | | receive APDU response + ... + [APDU<->APDU repeats several times] + ... +card removed -> | | | | + | VSC_CardRemove | remove | remove | card removed + ... + [(card insert, apdu's, card remove) repeat] + ... +kill/quit | | | | + vscclient | | | | + | VSC_ReaderRemove | | detach | + | | | | usb device removed. + + +8. libcacard + +Both ccid-card-emulated and vscclient use libcacard as the card emulator. +libcacard implements a completely virtual CAC (DoD standard for smart +cards) compliant card and uses NSS to retrieve certificates and do +any encryption. The backend can then be a real reader and card, or +certificates stored in files. + +For documentation of the library see docs/libcacard.txt. + diff --git a/qemu/docs/ich9-ehci-uhci.cfg b/qemu/docs/ich9-ehci-uhci.cfg new file mode 100644 index 00000000..a0e9b96f --- /dev/null +++ b/qemu/docs/ich9-ehci-uhci.cfg @@ -0,0 +1,37 @@ +########################################################################### +# +# You can pass this file directly to qemu using the -readconfig +# command line switch. +# +# This config file creates a EHCI adapter with companion UHCI +# controllers as multifunction device in PCI slot "1d". +# +# Specify "bus=ehci.0" when creating usb devices to hook them up +# there. +# + +[device "ehci"] + driver = "ich9-usb-ehci1" + addr = "1d.7" + multifunction = "on" + +[device "uhci-1"] + driver = "ich9-usb-uhci1" + addr = "1d.0" + multifunction = "on" + masterbus = "ehci.0" + firstport = "0" + +[device "uhci-2"] + driver = "ich9-usb-uhci2" + addr = "1d.1" + multifunction = "on" + masterbus = "ehci.0" + firstport = "2" + +[device "uhci-3"] + driver = "ich9-usb-uhci3" + addr = "1d.2" + multifunction = "on" + masterbus = "ehci.0" + firstport = "4" diff --git a/qemu/docs/image-fuzzer.txt b/qemu/docs/image-fuzzer.txt new file mode 100644 index 00000000..3e23ebec --- /dev/null +++ b/qemu/docs/image-fuzzer.txt @@ -0,0 +1,239 @@ +# Specification for the fuzz testing tool +# +# Copyright (C) 2014 Maria Kustova +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + + +Image fuzzer +============ + +Description +----------- + +The goal of the image fuzzer is to catch crashes of qemu-io/qemu-img +by providing to them randomly corrupted images. +Test images are generated from scratch and have valid inner structure with some +elements, e.g. L1/L2 tables, having random invalid values. + + +Test runner +----------- + +The test runner generates test images, executes tests utilizing generated +images, indicates their results and collects all test related artifacts (logs, +core dumps, test images, backing files). +The test means execution of all available commands under test with the same +generated test image. +By default, the test runner generates new tests and executes them until +keyboard interruption. But if a test seed is specified via the '--seed' runner +parameter, then only one test with this seed will be executed, after its finish +the runner will exit. + +The runner uses an external image fuzzer to generate test images. An image +generator should be specified as a mandatory parameter of the test runner. +Details about interactions between the runner and fuzzers see "Module +interfaces". + +The runner activates generation of core dumps during test executions, but it +assumes that core dumps will be generated in the current working directory. +For comprehensive test results, please, set up your test environment +properly. + +Paths to binaries under test (SUTs) qemu-img and qemu-io are retrieved from +environment variables. If the environment check fails the runner will +use SUTs installed in system paths. +qemu-img is required for creation of backing files, so it's mandatory to set +the related environment variable if it's not installed in the system path. +For details about environment variables see qemu-iotests/check. + +The runner accepts a JSON array of fields expected to be fuzzed via the +'--config' argument, e.g. + + '[["feature_name_table"], ["header", "l1_table_offset"]]' + +Each sublist can have one or two strings defining image structure elements. +In the latter case a parent element should be placed on the first position, +and a field name on the second one. + +The runner accepts a list of commands under test as a JSON array via +the '--command' argument. Each command is a list containing a SUT and all its +arguments, e.g. + + runner.py -c '[["qemu-io", "$test_img", "-c", "write $off $len"]]' + /tmp/test ../qcow2 + +For variable arguments next aliases can be used: + - $test_img for a fuzzed img + - $off for an offset in the fuzzed image + - $len for a data size + +Values for last two aliases will be generated based on a size of a virtual +disk of the generated image. +In case when no commands are specified the runner will execute commands from +the default list: + - qemu-img check + - qemu-img info + - qemu-img convert + - qemu-io -c read + - qemu-io -c write + - qemu-io -c aio_read + - qemu-io -c aio_write + - qemu-io -c flush + - qemu-io -c discard + - qemu-io -c truncate + + +Qcow2 image generator +--------------------- + +The 'qcow2' generator is a Python package providing 'create_image' method as +a single public API. See details in 'Test runner/image fuzzer' chapter of +'Module interfaces'. + +Qcow2 contains two submodules: fuzz.py and layout.py. + +'fuzz.py' contains all fuzzing functions, one per image field. It's assumed +that after code analysis every field will have own constraints for its value. +For now only universal potentially dangerous values are used, e.g. type limits +for integers or unsafe symbols as '%s' for strings. For bitmasks random amount +of bits are set to ones. All fuzzed values are checked on non-equality to the +current valid value of the field. In case of equality the value will be +regenerated. + +'layout.py' creates a random valid image, fuzzes a random subset of the image +fields by 'fuzz.py' module and writes a fuzzed image to the file specified. +If a fuzzer configuration is specified, then it has the next interpretation: + + 1. If a list contains a parent image element only, then some random portion + of fields of this element will be fuzzed every test. + The same behavior is applied for the entire image if no configuration is + used. This case is useful for the test specialization. + + 2. If a list contains a parent element and a field name, then a field + will be always fuzzed for every test. This case is useful for regression + testing. + +The generator can create header fields, header extensions, L1/L2 tables and +refcount table and blocks. + +Module interfaces +----------------- + +* Test runner/image fuzzer + +The runner calls an image generator specifying the path to a test image file, +path to a backing file and its format and a fuzzer configuration. +An image generator is expected to provide a + + 'create_image(test_img_path, backing_file_path=None, + backing_file_format=None, fuzz_config=None)' + +method that creates a test image, writes it to the specified file and returns +the size of the virtual disk. +The file should be created if it doesn't exist or overwritten otherwise. +fuzz_config has a form of a list of lists. Every sublist can have one +or two elements: first element is a name of a parent image element, second one +if exists is a name of a field in this element. +Example, + [['header', 'l1_table_offset'], + ['header', 'nb_snapshots'], + ['feature_name_table']] + +Random seed is set by the runner at every test execution for the regression +purpose, so an image generator is not recommended to modify it internally. + + +Overall fuzzer requirements +=========================== + +Input data: +---------- + + - image template (generator) + - work directory + - action vector (optional) + - seed (optional) + - SUT and its arguments (optional) + + +Fuzzer requirements: +------------------- + +1. Should be able to inject random data +2. Should be able to select a random value from the manually pregenerated + vector (boundary values, e.g. max/min cluster size) +3. Image template should describe a general structure invariant for all + test images (image format description) +4. Image template should be autonomous and other fuzzer parts should not + rely on it +5. Image template should contain reference rules (not only block+size + description) +6. Should generate the test image with the correct structure based on an image + template +7. Should accept a seed as an argument (for regression purpose) +8. Should generate a seed if it is not specified as an input parameter. +9. The same seed should generate the same image for the same action vector, + specified or generated. +10. Should accept a vector of actions as an argument (for test reproducing and + for test case specification, e.g. group of tests for header structure, + group of test for snapshots, etc) +11. Action vector should be randomly generated from the pool of available + actions, if it is not specified as an input parameter +12. Pool of actions should be defined automatically based on an image template +13. Should accept a SUT and its call parameters as an argument or select them + randomly otherwise. As far as it's expected to be rarely changed, the list + of all possible test commands can be available in the test runner + internally. +14. Should support an external cancellation of a test run +15. Seed should be logged (for regression purpose) +16. All files related to a test result should be collected: a test image, + SUT logs, fuzzer logs and crash dumps +17. Should be compatible with python version 2.4-2.7 +18. Usage of external libraries should be limited as much as possible. + + +Image formats: +------------- + +Main target image format is qcow2, but support of image templates should +provide an ability to add any other image format. + + +Effectiveness: +------------- + +The fuzzer can be controlled via template, seed and action vector; +it makes the fuzzer itself invariant to an image format and test logic. +It should be able to perform rather complex and precise tests, that can be +specified via an action vector. Otherwise, knowledge about an image structure +allows the fuzzer to generate the pool of all available areas can be fuzzed +and randomly select some of them and so compose its own action vector. +Also complexity of a template defines complexity of the fuzzer, so its +functionality can be varied from simple model-independent fuzzing to smart +model-based one. + + +Glossary: +-------- + +Action vector is a sequence of structure elements retrieved from an image +format, each of them will be fuzzed for the test image. It's a subset of +elements of the action pool. Example: header, refcount table, etc. +Action pool is all available elements of an image structure that generated +automatically from an image template. +Image template is a formal description of an image structure and relations +between image blocks. +Test image is an output image of the fuzzer defined by the current seed and +action vector. diff --git a/qemu/docs/libcacard.txt b/qemu/docs/libcacard.txt new file mode 100644 index 00000000..8db421d3 --- /dev/null +++ b/qemu/docs/libcacard.txt @@ -0,0 +1,483 @@ +This file documents the CAC (Common Access Card) library in the libcacard +subdirectory. + +Virtual Smart Card Emulator + +This emulator is designed to provide emulation of actual smart cards to a +virtual card reader running in a guest virtual machine. The emulated smart +cards can be representations of real smart cards, where the necessary functions +such as signing, card removal/insertion, etc. are mapped to real, physical +cards which are shared with the client machine the emulator is running on, or +the cards could be pure software constructs. + +The emulator is structured to allow multiple replaceable or additional pieces, +so it can be easily modified for future requirements. The primary envisioned +modifications are: + +1) The socket connection to the virtual card reader (presumably a CCID reader, +but other ISO-7816 compatible readers could be used). The code that handles +this is in vscclient.c. + +2) The virtual card low level emulation. This is currently supplied by using +NSS. This emulation could be replaced by implementations based on other +security libraries, including but not limitted to openssl+pkcs#11 library, +raw pkcs#11, Microsoft CAPI, direct opensc calls, etc. The code that handles +this is in vcard_emul_nss.c. + +3) Emulation for new types of cards. The current implementation emulates the +original DoD CAC standard with separate pki containers. This emulator lives in +cac.c. More than one card type emulator could be included. Other cards could +be emulated as well, including PIV, newer versions of CAC, PKCS #15, etc. + +-------------------- +Replacing the Socket Based Virtual Reader Interface. + +The current implementation contains a replaceable module vscclient.c. The +current vscclient.c implements a sockets interface to the virtual ccid reader +on the guest. CCID commands that are pertinent to emulation are passed +across the socket, and their responses are passed back along that same socket. +The protocol that vscclient uses is defined in vscard_common.h and connects +to a qemu ccid usb device. Since this socket runs as a client, vscclient.c +implements a program with a main entry. It also handles argument parsing for +the emulator. + +An application that wants to use the virtual reader can replace vscclient.c +with its own implementation that connects to its own CCID reader. The calls +that the CCID reader can call are: + + VReaderList * vreader_get_reader_list(); + + This function returns a list of virtual readers. These readers may map to + physical devices, or simulated devices depending on vcard the back end. Each + reader in the list should represent a reader to the virtual machine. Virtual + USB address mapping is left to the CCID reader front end. This call can be + made any time to get an updated list. The returned list is a copy of the + internal list that can be referenced by the caller without locking. This copy + must be freed by the caller with vreader_list_delete when it is no longer + needed. + + VReaderListEntry *vreader_list_get_first(VReaderList *); + + This function gets the first entry on the reader list. Along with + vreader_list_get_next(), vreader_list_get_first() can be used to walk the + reader list returned from vreader_get_reader_list(). VReaderListEntries are + part of the list themselves and do not need to be freed separately from the + list. If there are no entries on the list, it will return NULL. + + VReaderListEntry *vreader_list_get_next(VReaderListEntry *); + + This function gets the next entry in the list. If there are no more entries + it will return NULL. + + VReader * vreader_list_get_reader(VReaderListEntry *) + + This function returns the reader stored in the reader List entry. Caller gets + a new reference to a reader. The caller must free its reference when it is + finished with vreader_free(). + + void vreader_free(VReader *reader); + + This function frees a reference to a reader. Readers are reference counted + and are automatically deleted when the last reference is freed. + + void vreader_list_delete(VReaderList *list); + + This function frees the list, all the elements on the list, and all the + reader references held by the list. + + VReaderStatus vreader_power_on(VReader *reader, char *atr, int *len); + + This function simulates a card power on. A virtual card does not care about + the actual voltage and other physical parameters, but it does care that the + card is actually on or off. Cycling the card causes the card to reset. If + the caller provides enough space, vreader_power_on will return the ATR of + the virtual card. The amount of space provided in atr should be indicated + in *len. The function modifies *len to be the actual length of of the + returned ATR. + + VReaderStatus vreader_power_off(VReader *reader); + + This function simulates a power off of a virtual card. + + VReaderStatus vreader_xfer_bytes(VReader *reader, unsigne char *send_buf, + int send_buf_len, + unsigned char *receive_buf, + int receive_buf_len); + + This function sends a raw apdu to a card and returns the card's response. + The CCID front end should return the response back. Most of the emulation + is driven from these APDUs. + + VReaderStatus vreader_card_is_present(VReader *reader); + + This function returns whether or not the reader has a card inserted. The + vreader_power_on, vreader_power_off, and vreader_xfer_bytes will return + VREADER_NO_CARD. + + const char *vreader_get_name(VReader *reader); + + This function returns the name of the reader. The name comes from the card + emulator level and is usually related to the name of the physical reader. + + VReaderID vreader_get_id(VReader *reader); + + This function returns the id of a reader. All readers start out with an id + of -1. The application can set the id with vreader_set_id. + + VReaderStatus vreader_get_id(VReader *reader, VReaderID id); + + This function sets the reader id. The application is responsible for making + sure that the id is unique for all readers it is actively using. + + VReader *vreader_find_reader_by_id(VReaderID id); + + This function returns the reader which matches the id. If two readers match, + only one is returned. The function returns NULL if the id is -1. + + Event *vevent_wait_next_vevent(); + + This function blocks waiting for reader and card insertion events. There + will be one event for each card insertion, each card removal, each reader + insertion and each reader removal. At start up, events are created for all + the initial readers found, as well as all the cards that are inserted. + + Event *vevent_get_next_vevent(); + + This function returns a pending event if it exists, otherwise it returns + NULL. It does not block. + +---------------- +Card Type Emulator: Adding a New Virtual Card Type + +The ISO 7816 card spec describes 2 types of cards: + 1) File system cards, where the smartcard is managed by reading and writing +data to files in a file system. There is currently only boiler plate +implemented for file system cards. + 2) VM cards, where the card has loadable applets which perform the card +functions. The current implementation supports VM cards. + +In the case of VM cards, the difference between various types of cards is +really what applets have been installed in that card. This structure is +mirrored in card type emulators. The 7816 emulator already handles the basic +ISO 7186 commands. Card type emulators simply need to add the virtual applets +which emulate the real card applets. Card type emulators have exactly one +public entry point: + + VCARDStatus xxx_card_init(VCard *card, const char *flags, + const unsigned char *cert[], + int cert_len[], + VCardKey *key[], + int cert_count); + + The parameters for this are: + card - the virtual card structure which will represent this card. + flags - option flags that may be specific to this card type. + cert - array of binary certificates. + cert_len - array of lengths of each of the certificates specified in cert. + key - array of opaque key structures representing the private keys on + the card. + cert_count - number of entries in cert, cert_len, and key arrays. + + Any cert, cert_len, or key with the same index are matching sets. That is + cert[0] is cert_len[0] long and has the corresponding private key of key[0]. + +The card type emulator is expected to own the VCardKeys, but it should copy +any raw cert data it wants to save. It can create new applets and add them to +the card using the following functions: + + VCardApplet *vcard_new_applet(VCardProcessAPDU apdu_func, + VCardResetApplet reset_func, + const unsigned char *aid, + int aid_len); + + This function creates a new applet. Applet structures store the following + information: + 1) the AID of the applet (set by aid and aid_len). + 2) a function to handle APDUs for this applet. (set by apdu_func, more on + this below). + 3) a function to reset the applet state when the applet is selected. + (set by reset_func, more on this below). + 3) applet private data, a data pointer used by the card type emulator to + store any data or state it needs to complete requests. (set by a + separate call). + 4) applet private data free, a function used to free the applet private + data when the applet itself is destroyed. + The created applet can be added to the card with vcard_add_applet below. + + void vcard_set_applet_private(VCardApplet *applet, + VCardAppletPrivate *private, + VCardAppletPrivateFree private_free); + This function sets the private data and the corresponding free function. + VCardAppletPrivate is an opaque data structure to the rest of the emulator. + The card type emulator can define it any way it wants by defining + struct VCardAppletPrivateStruct {};. If there is already a private data + structure on the applet, the old one is freed before the new one is set up. + passing two NULL clear any existing private data. + + VCardStatus vcard_add_applet(VCard *card, VCardApplet *applet); + + Add an applet onto the list of applets attached to the card. Once an applet + has been added, it can be selected by its AID, and then commands will be + routed to it VCardProcessAPDU function. This function adopts the applet that + is passed into it. Note: 2 applets with the same AID should not be added to + the same card. It is permissible to add more than one applet. Multiple applets + may have the same VCardPRocessAPDU entry point. + +The certs and keys should be attached to private data associated with one or +more appropriate applets for that card. Control will come to the card type +emulators once one of its applets are selected through the VCardProcessAPDU +function it specified when it created the applet. + +The signature of VCardResetApplet is: + VCardStatus (*VCardResetApplet) (VCard *card, int channel); + This function will reset the any internal applet state that needs to be + cleared after a select applet call. It should return VCARD_DONE; + +The signature of VCardProcessAPDU is: + VCardStatus (*VCardProcessAPDU)(VCard *card, VCardAPDU *apdu, + VCardResponse **response); + This function examines the APDU and determines whether it should process + the apdu directly, reject the apdu as invalid, or pass the apdu on to + the basic 7816 emulator for processing. + If the 7816 emulator should process the apdu, then the VCardProcessAPDU + should return VCARD_NEXT. + If there is an error, then VCardProcessAPDU should return an error + response using vcard_make_response and the appropriate 7816 error code + (see card_7816t.h) or vcard_make_response with a card type specific error + code. It should then return VCARD_DONE. + If the apdu can be processed correctly, VCardProcessAPDU should do so, + set the response value appropriately for that APDU, and return VCARD_DONE. + VCardProcessAPDU should always set the response if it returns VCARD_DONE. + It should always either return VCARD_DONE or VCARD_NEXT. + +Parsing the APDU -- + +Prior to processing calling the card type emulator's VCardProcessAPDU function, the emulator has already decoded the APDU header and set several fields: + + apdu->a_data - The raw apdu data bytes. + apdu->a_len - The len of the raw apdu data. + apdu->a_body - The start of any post header parameter data. + apdu->a_Lc - The parameter length value. + apdu->a_Le - The expected length of any returned data. + apdu->a_cla - The raw apdu class. + apdu->a_channel - The channel (decoded from the class). + apdu->a_secure_messaging_type - The decoded secure messaging type + (from class). + apdu->a_type - The decode class type. + apdu->a_gen_type - the generic class type (7816, PROPRIETARY, RFU, PTS). + apdu->a_ins - The instruction byte. + apdu->a_p1 - Parameter 1. + apdu->a_p2 - Parameter 2. + +Creating a Response -- + +The expected result of any APDU call is a response. The card type emulator must +set *response with an appropriate VCardResponse value if it returns VCARD_DONE. +Responses could be as simple as returning a 2 byte status word response, to as +complex as returning a block of data along with a 2 byte response. Which is +returned will depend on the semantics of the APDU. The following functions will +create card responses. + + VCardResponse *vcard_make_response(VCard7816Status status); + + This is the most basic function to get a response. This function will + return a response the consists solely one 2 byte status code. If that status + code is defined in card_7816t.h, then this function is guaranteed to + return a response with that status. If a cart type specific status code + is passed and vcard_make_response fails to allocate the appropriate memory + for that response, then vcard_make_response will return a VCardResponse + of VCARD7816_STATUS_EXC_ERROR_MEMORY. In any case, this function is + guaranteed to return a valid VCardResponse. + + VCardResponse *vcard_response_new(unsigned char *buf, int len, + VCard7816Status status); + + This function is similar to vcard_make_response except it includes some + returned data with the response. It could also fail to allocate enough + memory, in which case it will return NULL. + + VCardResponse *vcard_response_new_status_bytes(unsigned char sw1, + unsigned char sw2); + + Sometimes in 7816 the response bytes are treated as two separate bytes with + split meanings. This function allows you to create a response based on + two separate bytes. This function could fail, in which case it will return + NULL. + + VCardResponse *vcard_response_new_bytes(unsigned char *buf, int len, + unsigned char sw1, + unsigned char sw2); + + This function is the same as vcard_response_new except you may specify + the status as two separate bytes like vcard_response_new_status_bytes. + + +Implementing functionality --- + +The following helper functions access information about the current card +and applet. + + VCARDAppletPrivate *vcard_get_current_applet_private(VCard *card, + int channel); + + This function returns any private data set by the card type emulator on + the currently selected applet. The card type emulator keeps track of the + current applet state in this data structure. Any certs and keys associated + with a particular applet is also stored here. + + int vcard_emul_get_login_count(VCard *card); + + This function returns the the number of remaining login attempts for this + card. If the card emulator does not know, or the card does not have a + way of giving this information, this function returns -1. + + + VCard7816Status vcard_emul_login(VCard *card, unsigned char *pin, + int pin_len); + + This function logs into the card and returns the standard 7816 status + word depending on the success or failure of the call. + + void vcard_emul_delete_key(VCardKey *key); + + This function frees the VCardKey passed in to xxxx_card_init. The card + type emulator is responsible for freeing this key when it no longer needs + it. + + VCard7816Status vcard_emul_rsa_op(VCard *card, VCardKey *key, + unsigned char *buffer, + int buffer_size); + + This function does a raw rsa op on the buffer with the given key. + +The sample card type emulator is found in cac.c. It implements the cac specific +applets. Only those applets needed by the coolkey pkcs#11 driver on the guest +have been implemented. To support the full range CAC middleware, a complete CAC +card according to the CAC specs should be implemented here. + +------------------------------ +Virtual Card Emulator + +This code accesses both real smart cards and simulated smart cards through +services provided on the client. The current implementation uses NSS, which +already knows how to talk to various PKCS #11 modules on the client, and is +portable to most operating systems. A particular emulator can have only one +virtual card implementation at a time. + +The virtual card emulator consists of a series of virtual card services. In +addition to the services describe above (services starting with +vcard_emul_xxxx), the virtual card emulator also provides the following +functions: + + VCardEmulError vcard_emul_init(cont VCardEmulOptions *options); + + The options structure is built by another function in the virtual card + interface where a string of virtual card emulator specific strings are + mapped to the options. The actual structure is defined by the virtual card + emulator and is used to determine the configuration of soft cards, or to + determine which physical cards to present to the guest. + + The vcard_emul_init function will build up sets of readers, create any + threads that are needed to watch for changes in the reader state. If readers + have cards present in them, they are also initialized. + + Readers are created with the function. + + VReader *vreader_new(VReaderEmul *reader_emul, + VReaderEmulFree reader_emul_free); + + The freeFunc is used to free the VReaderEmul * when the reader is + destroyed. The VReaderEmul structure is an opaque structure to the + rest of the code, but defined by the virtual card emulator, which can + use it to store any reader specific state. + + Once the reader has been created, it can be added to the front end with the + call: + + VReaderStatus vreader_add_reader(VReader *reader); + + This function will automatically generate the appropriate new reader + events and add the reader to the list. + + To create a new card, the virtual card emulator will call a similar + function. + + VCard *vcard_new(VCardEmul *card_emul, + VCardEmulFree card_emul_free); + + Like vreader_new, this function takes a virtual card emulator specific + structure which it uses to keep track of the card state. + + Once the card is created, it is attached to a card type emulator with the + following function: + + VCardStatus vcard_init(VCard *vcard, VCardEmulType type, + const char *flags, + unsigned char *const *certs, + int *cert_len, + VCardKey *key[], + int cert_count); + + The vcard is the value returned from vcard_new. The type is the + card type emulator that this card should presented to the guest as. + The flags are card type emulator specific options. The certs, + cert_len, and keys are all arrays of length cert_count. These are the + the same of the parameters xxxx_card_init() accepts. + + Finally the card is associated with its reader by the call: + + VReaderStatus vreader_insert_card(VReader *vreader, VCard *vcard); + + This function, like vreader_add_reader, will take care of any event + notification for the card insert. + + + VCardEmulError vcard_emul_force_card_remove(VReader *vreader); + + Force a card that is present to appear to be removed to the guest, even if + that card is a physical card and is present. + + + VCardEmulError vcard_emul_force_card_insert(VReader *reader); + + Force a card that has been removed by vcard_emul_force_card_remove to be + reinserted from the point of view of the guest. This will only work if the + card is physically present (which is always true fro a soft card). + + void vcard_emul_get_atr(Vcard *card, unsigned char *atr, int *atr_len); + + Return the virtual ATR for the card. By convention this should be the value + VCARD_ATR_PREFIX(size) followed by several ascii bytes related to this + particular emulator. For instance the NSS emulator returns + {VCARD_ATR_PREFIX(3), 'N', 'S', 'S' }. Do ot return more data then *atr_len; + + void vcard_emul_reset(VCard *card, VCardPower power) + + Set the state of 'card' to the current power level and reset its internal + state (logout, etc). + +------------------------------------------------------- +List of files and their function: +README - This file +card_7816.c - emulate basic 7816 functionality. Parse APDUs. +card_7816.h - apdu and response services definitions. +card_7816t.h - 7816 specific structures, types and definitions. +event.c - event handling code. +event.h - event handling services definitions. +eventt.h - event handling structures and types +vcard.c - handle common virtual card services like creation, destruction, and + applet management. +vcard.h - common virtual card services function definitions. +vcardt.h - comon virtual card types +vreader.c - common virtual reader services. +vreader.h - common virtual reader services definitions. +vreadert.h - comon virtual reader types. +vcard_emul_type.c - manage the card type emulators. +vcard_emul_type.h - definitions for card type emulators. +cac.c - card type emulator for CAC cards +vcard_emul.h - virtual card emulator service definitions. +vcard_emul_nss.c - virtual card emulator implementation for nss. +vscclient.c - socket connection to guest qemu usb driver. +vscard_common.h - common header with the guest qemu usb driver. +mutex.h - header file for machine independent mutexes. +link_test.c - static test to make sure all the symbols are properly defined. diff --git a/qemu/docs/live-block-ops.txt b/qemu/docs/live-block-ops.txt new file mode 100644 index 00000000..a2570874 --- /dev/null +++ b/qemu/docs/live-block-ops.txt @@ -0,0 +1,58 @@ +LIVE BLOCK OPERATIONS +===================== + +High level description of live block operations. Note these are not +supported for use with the raw format at the moment. + +Snapshot live merge +=================== + +Given a snapshot chain, described in this document in the following +format: + +[A] -> [B] -> [C] -> [D] + +Where the rightmost object ([D] in the example) described is the current +image which the guest OS has write access to. To the left of it is its base +image, and so on accordingly until the leftmost image, which has no +base. + +The snapshot live merge operation transforms such a chain into a +smaller one with fewer elements, such as this transformation relative +to the first example: + +[A] -> [D] + +Currently only forward merge with target being the active image is +supported, that is, data copy is performed in the right direction with +destination being the rightmost image. + +The operation is implemented in QEMU through image streaming facilities. + +The basic idea is to execute 'block_stream virtio0' while the guest is +running. Progress can be monitored using 'info block-jobs'. When the +streaming operation completes it raises a QMP event. 'block_stream' +copies data from the backing file(s) into the active image. When finished, +it adjusts the backing file pointer. + +The 'base' parameter specifies an image which data need not be streamed from. +This image will be used as the backing file for the active image when the +operation is finished. + +In the example above, the command would be: + +(qemu) block_stream virtio0 A + + +Live block copy +=============== + +To copy an in use image to another destination in the filesystem, one +should create a live snapshot in the desired destination, then stream +into that image. Example: + +(qemu) snapshot_blkdev ide0-hd0 /new-path/disk.img qcow2 + +(qemu) block_stream ide0-hd0 + + diff --git a/qemu/docs/memory.txt b/qemu/docs/memory.txt new file mode 100644 index 00000000..b12f1f04 --- /dev/null +++ b/qemu/docs/memory.txt @@ -0,0 +1,244 @@ +The memory API +============== + +The memory API models the memory and I/O buses and controllers of a QEMU +machine. It attempts to allow modelling of: + + - ordinary RAM + - memory-mapped I/O (MMIO) + - memory controllers that can dynamically reroute physical memory regions + to different destinations + +The memory model provides support for + + - tracking RAM changes by the guest + - setting up coalesced memory for kvm + - setting up ioeventfd regions for kvm + +Memory is modelled as an acyclic graph of MemoryRegion objects. Sinks +(leaves) are RAM and MMIO regions, while other nodes represent +buses, memory controllers, and memory regions that have been rerouted. + +In addition to MemoryRegion objects, the memory API provides AddressSpace +objects for every root and possibly for intermediate MemoryRegions too. +These represent memory as seen from the CPU or a device's viewpoint. + +Types of regions +---------------- + +There are four types of memory regions (all represented by a single C type +MemoryRegion): + +- RAM: a RAM region is simply a range of host memory that can be made available + to the guest. + +- MMIO: a range of guest memory that is implemented by host callbacks; + each read or write causes a callback to be called on the host. + +- container: a container simply includes other memory regions, each at + a different offset. Containers are useful for grouping several regions + into one unit. For example, a PCI BAR may be composed of a RAM region + and an MMIO region. + + A container's subregions are usually non-overlapping. In some cases it is + useful to have overlapping regions; for example a memory controller that + can overlay a subregion of RAM with MMIO or ROM, or a PCI controller + that does not prevent card from claiming overlapping BARs. + +- alias: a subsection of another region. Aliases allow a region to be + split apart into discontiguous regions. Examples of uses are memory banks + used when the guest address space is smaller than the amount of RAM + addressed, or a memory controller that splits main memory to expose a "PCI + hole". Aliases may point to any type of region, including other aliases, + but an alias may not point back to itself, directly or indirectly. + +It is valid to add subregions to a region which is not a pure container +(that is, to an MMIO, RAM or ROM region). This means that the region +will act like a container, except that any addresses within the container's +region which are not claimed by any subregion are handled by the +container itself (ie by its MMIO callbacks or RAM backing). However +it is generally possible to achieve the same effect with a pure container +one of whose subregions is a low priority "background" region covering +the whole address range; this is often clearer and is preferred. +Subregions cannot be added to an alias region. + +Region names +------------ + +Regions are assigned names by the constructor. For most regions these are +only used for debugging purposes, but RAM regions also use the name to identify +live migration sections. This means that RAM region names need to have ABI +stability. + +Region lifecycle +---------------- + +A region is created by one of the constructor functions (memory_region_init*()) +and attached to an object. It is then destroyed by object_unparent() or simply +when the parent object dies. + +In between, a region can be added to an address space +by using memory_region_add_subregion() and removed using +memory_region_del_subregion(). Destroying the region implicitly +removes the region from the address space. + +Region attributes may be changed at any point; they take effect once +the region becomes exposed to the guest. + +Overlapping regions and priority +-------------------------------- +Usually, regions may not overlap each other; a memory address decodes into +exactly one target. In some cases it is useful to allow regions to overlap, +and sometimes to control which of an overlapping regions is visible to the +guest. This is done with memory_region_add_subregion_overlap(), which +allows the region to overlap any other region in the same container, and +specifies a priority that allows the core to decide which of two regions at +the same address are visible (highest wins). +Priority values are signed, and the default value is zero. This means that +you can use memory_region_add_subregion_overlap() both to specify a region +that must sit 'above' any others (with a positive priority) and also a +background region that sits 'below' others (with a negative priority). + +If the higher priority region in an overlap is a container or alias, then +the lower priority region will appear in any "holes" that the higher priority +region has left by not mapping subregions to that area of its address range. +(This applies recursively -- if the subregions are themselves containers or +aliases that leave holes then the lower priority region will appear in these +holes too.) + +For example, suppose we have a container A of size 0x8000 with two subregions +B and C. B is a container mapped at 0x2000, size 0x4000, priority 1; C is +an MMIO region mapped at 0x0, size 0x6000, priority 2. B currently has two +of its own subregions: D of size 0x1000 at offset 0 and E of size 0x1000 at +offset 0x2000. As a diagram: + + 0 1000 2000 3000 4000 5000 6000 7000 8000 + |------|------|------|------|------|------|------|-------| + A: [ ] + C: [CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC] + B: [ ] + D: [DDDDD] + E: [EEEEE] + +The regions that will be seen within this address range then are: + [CCCCCCCCCCCC][DDDDD][CCCCC][EEEEE][CCCCC] + +Since B has higher priority than C, its subregions appear in the flat map +even where they overlap with C. In ranges where B has not mapped anything +C's region appears. + +If B had provided its own MMIO operations (ie it was not a pure container) +then these would be used for any addresses in its range not handled by +D or E, and the result would be: + [CCCCCCCCCCCC][DDDDD][BBBBB][EEEEE][BBBBB] + +Priority values are local to a container, because the priorities of two +regions are only compared when they are both children of the same container. +This means that the device in charge of the container (typically modelling +a bus or a memory controller) can use them to manage the interaction of +its child regions without any side effects on other parts of the system. +In the example above, the priorities of D and E are unimportant because +they do not overlap each other. It is the relative priority of B and C +that causes D and E to appear on top of C: D and E's priorities are never +compared against the priority of C. + +Visibility +---------- +The memory core uses the following rules to select a memory region when the +guest accesses an address: + +- all direct subregions of the root region are matched against the address, in + descending priority order + - if the address lies outside the region offset/size, the subregion is + discarded + - if the subregion is a leaf (RAM or MMIO), the search terminates, returning + this leaf region + - if the subregion is a container, the same algorithm is used within the + subregion (after the address is adjusted by the subregion offset) + - if the subregion is an alias, the search is continued at the alias target + (after the address is adjusted by the subregion offset and alias offset) + - if a recursive search within a container or alias subregion does not + find a match (because of a "hole" in the container's coverage of its + address range), then if this is a container with its own MMIO or RAM + backing the search terminates, returning the container itself. Otherwise + we continue with the next subregion in priority order +- if none of the subregions match the address then the search terminates + with no match found + +Example memory map +------------------ + +system_memory: container@0-2^48-1 + | + +---- lomem: alias@0-0xdfffffff ---> #ram (0-0xdfffffff) + | + +---- himem: alias@0x100000000-0x11fffffff ---> #ram (0xe0000000-0xffffffff) + | + +---- vga-window: alias@0xa0000-0xbfffff ---> #pci (0xa0000-0xbffff) + | (prio 1) + | + +---- pci-hole: alias@0xe0000000-0xffffffff ---> #pci (0xe0000000-0xffffffff) + +pci (0-2^32-1) + | + +--- vga-area: container@0xa0000-0xbffff + | | + | +--- alias@0x00000-0x7fff ---> #vram (0x010000-0x017fff) + | | + | +--- alias@0x08000-0xffff ---> #vram (0x020000-0x027fff) + | + +---- vram: ram@0xe1000000-0xe1ffffff + | + +---- vga-mmio: mmio@0xe2000000-0xe200ffff + +ram: ram@0x00000000-0xffffffff + +This is a (simplified) PC memory map. The 4GB RAM block is mapped into the +system address space via two aliases: "lomem" is a 1:1 mapping of the first +3.5GB; "himem" maps the last 0.5GB at address 4GB. This leaves 0.5GB for the +so-called PCI hole, that allows a 32-bit PCI bus to exist in a system with +4GB of memory. + +The memory controller diverts addresses in the range 640K-768K to the PCI +address space. This is modelled using the "vga-window" alias, mapped at a +higher priority so it obscures the RAM at the same addresses. The vga window +can be removed by programming the memory controller; this is modelled by +removing the alias and exposing the RAM underneath. + +The pci address space is not a direct child of the system address space, since +we only want parts of it to be visible (we accomplish this using aliases). +It has two subregions: vga-area models the legacy vga window and is occupied +by two 32K memory banks pointing at two sections of the framebuffer. +In addition the vram is mapped as a BAR at address e1000000, and an additional +BAR containing MMIO registers is mapped after it. + +Note that if the guest maps a BAR outside the PCI hole, it would not be +visible as the pci-hole alias clips it to a 0.5GB range. + +Attributes +---------- + +Various region attributes (read-only, dirty logging, coalesced mmio, ioeventfd) +can be changed during the region lifecycle. They take effect once the region +is made visible (which can be immediately, later, or never). + +MMIO Operations +--------------- + +MMIO regions are provided with ->read() and ->write() callbacks; in addition +various constraints can be supplied to control how these callbacks are called: + + - .valid.min_access_size, .valid.max_access_size define the access sizes + (in bytes) which the device accepts; accesses outside this range will + have device and bus specific behaviour (ignored, or machine check) + - .valid.aligned specifies that the device only accepts naturally aligned + accesses. Unaligned accesses invoke device and bus specific behaviour. + - .impl.min_access_size, .impl.max_access_size define the access sizes + (in bytes) supported by the *implementation*; other access sizes will be + emulated using the ones available. For example a 4-byte write will be + emulated using four 1-byte writes, if .impl.max_access_size = 1. + - .impl.unaligned specifies that the *implementation* supports unaligned + accesses; if false, unaligned accesses will be emulated by two aligned + accesses. + - .old_mmio can be used to ease porting from code using + cpu_register_io_memory(). It should not be used in new code. diff --git a/qemu/docs/migration.txt b/qemu/docs/migration.txt new file mode 100644 index 00000000..0492a454 --- /dev/null +++ b/qemu/docs/migration.txt @@ -0,0 +1,296 @@ += Migration = + +QEMU has code to load/save the state of the guest that it is running. +These are two complementary operations. Saving the state just does +that, saves the state for each device that the guest is running. +Restoring a guest is just the opposite operation: we need to load the +state of each device. + +For this to work, QEMU has to be launched with the same arguments the +two times. I.e. it can only restore the state in one guest that has +the same devices that the one it was saved (this last requirement can +be relaxed a bit, but for now we can consider that configuration has +to be exactly the same). + +Once that we are able to save/restore a guest, a new functionality is +requested: migration. This means that QEMU is able to start in one +machine and being "migrated" to another machine. I.e. being moved to +another machine. + +Next was the "live migration" functionality. This is important +because some guests run with a lot of state (specially RAM), and it +can take a while to move all state from one machine to another. Live +migration allows the guest to continue running while the state is +transferred. Only while the last part of the state is transferred has +the guest to be stopped. Typically the time that the guest is +unresponsive during live migration is the low hundred of milliseconds +(notice that this depends on a lot of things). + +=== Types of migration === + +Now that we have talked about live migration, there are several ways +to do migration: + +- tcp migration: do the migration using tcp sockets +- unix migration: do the migration using unix sockets +- exec migration: do the migration using the stdin/stdout through a process. +- fd migration: do the migration using an file descriptor that is + passed to QEMU. QEMU doesn't care how this file descriptor is opened. + +All these four migration protocols use the same infrastructure to +save/restore state devices. This infrastructure is shared with the +savevm/loadvm functionality. + +=== State Live Migration === + +This is used for RAM and block devices. It is not yet ported to vmstate. + + +=== What is the common infrastructure === + +QEMU uses a QEMUFile abstraction to be able to do migration. Any type +of migration that wants to use QEMU infrastructure has to create a +QEMUFile with: + +QEMUFile *qemu_fopen_ops(void *opaque, + QEMUFilePutBufferFunc *put_buffer, + QEMUFileGetBufferFunc *get_buffer, + QEMUFileCloseFunc *close); + +The functions have the following functionality: + +This function writes a chunk of data to a file at the given position. +The pos argument can be ignored if the file is only used for +streaming. The handler should try to write all of the data it can. + +typedef int (QEMUFilePutBufferFunc)(void *opaque, const uint8_t *buf, + int64_t pos, int size); + +Read a chunk of data from a file at the given position. The pos argument +can be ignored if the file is only be used for streaming. The number of +bytes actually read should be returned. + +typedef int (QEMUFileGetBufferFunc)(void *opaque, uint8_t *buf, + int64_t pos, int size); + +Close a file and return an error code. + +typedef int (QEMUFileCloseFunc)(void *opaque); + +You can use any internal state that you need using the opaque void * +pointer that is passed to all functions. + +The important functions for us are put_buffer()/get_buffer() that +allow to write/read a buffer into the QEMUFile. + +=== How to save the state of one device === + +The state of a device is saved using intermediate buffers. There are +some helper functions to assist this saving. + +There is a new concept that we have to explain here: device state +version. When we migrate a device, we save/load the state as a series +of fields. Some times, due to bugs or new functionality, we need to +change the state to store more/different information. We use the +version to identify each time that we do a change. Each version is +associated with a series of fields saved. The save_state always saves +the state as the newer version. But load_state sometimes is able to +load state from an older version. + +=== Legacy way === + +This way is going to disappear as soon as all current users are ported to VMSTATE. + +Each device has to register two functions, one to save the state and +another to load the state back. + +int register_savevm(DeviceState *dev, + const char *idstr, + int instance_id, + int version_id, + SaveStateHandler *save_state, + LoadStateHandler *load_state, + void *opaque); + +typedef void SaveStateHandler(QEMUFile *f, void *opaque); +typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); + +The important functions for the device state format are the save_state +and load_state. Notice that load_state receives a version_id +parameter to know what state format is receiving. save_state doesn't +have a version_id parameter because it always uses the latest version. + +=== VMState === + +The legacy way of saving/loading state of the device had the problem +that we have to maintain two functions in sync. If we did one change +in one of them and not in the other, we would get a failed migration. + +VMState changed the way that state is saved/loaded. Instead of using +a function to save the state and another to load it, it was changed to +a declarative way of what the state consisted of. Now VMState is able +to interpret that definition to be able to load/save the state. As +the state is declared only once, it can't go out of sync in the +save/load functions. + +An example (from hw/input/pckbd.c) + +static const VMStateDescription vmstate_kbd = { + .name = "pckbd", + .version_id = 3, + .minimum_version_id = 3, + .fields = (VMStateField[]) { + VMSTATE_UINT8(write_cmd, KBDState), + VMSTATE_UINT8(status, KBDState), + VMSTATE_UINT8(mode, KBDState), + VMSTATE_UINT8(pending, KBDState), + VMSTATE_END_OF_LIST() + } +}; + +We are declaring the state with name "pckbd". +The version_id is 3, and the fields are 4 uint8_t in a KBDState structure. +We registered this with: + + vmstate_register(NULL, 0, &vmstate_kbd, s); + +Note: talk about how vmstate <-> qdev interact, and what the instance ids mean. + +You can search for VMSTATE_* macros for lots of types used in QEMU in +include/hw/hw.h. + +=== More about versions === + +You can see that there are several version fields: + +- version_id: the maximum version_id supported by VMState for that device. +- minimum_version_id: the minimum version_id that VMState is able to understand + for that device. +- minimum_version_id_old: For devices that were not able to port to vmstate, we can + assign a function that knows how to read this old state. This field is + ignored if there is no load_state_old handler. + +So, VMState is able to read versions from minimum_version_id to +version_id. And the function load_state_old() (if present) is able to +load state from minimum_version_id_old to minimum_version_id. This +function is deprecated and will be removed when no more users are left. + +=== Massaging functions === + +Sometimes, it is not enough to be able to save the state directly +from one structure, we need to fill the correct values there. One +example is when we are using kvm. Before saving the cpu state, we +need to ask kvm to copy to QEMU the state that it is using. And the +opposite when we are loading the state, we need a way to tell kvm to +load the state for the cpu that we have just loaded from the QEMUFile. + +The functions to do that are inside a vmstate definition, and are called: + +- int (*pre_load)(void *opaque); + + This function is called before we load the state of one device. + +- int (*post_load)(void *opaque, int version_id); + + This function is called after we load the state of one device. + +- void (*pre_save)(void *opaque); + + This function is called before we save the state of one device. + +Example: You can look at hpet.c, that uses the three function to + massage the state that is transferred. + +If you use memory API functions that update memory layout outside +initialization (i.e., in response to a guest action), this is a strong +indication that you need to call these functions in a post_load callback. +Examples of such memory API functions are: + + - memory_region_add_subregion() + - memory_region_del_subregion() + - memory_region_set_readonly() + - memory_region_set_enabled() + - memory_region_set_address() + - memory_region_set_alias_offset() + +=== Subsections === + +The use of version_id allows to be able to migrate from older versions +to newer versions of a device. But not the other way around. This +makes very complicated to fix bugs in stable branches. If we need to +add anything to the state to fix a bug, we have to disable migration +to older versions that don't have that bug-fix (i.e. a new field). + +But sometimes, that bug-fix is only needed sometimes, not always. For +instance, if the device is in the middle of a DMA operation, it is +using a specific functionality, .... + +It is impossible to create a way to make migration from any version to +any other version to work. But we can do better than only allowing +migration from older versions to newer ones. For that fields that are +only needed sometimes, we add the idea of subsections. A subsection +is "like" a device vmstate, but with a particularity, it has a Boolean +function that tells if that values are needed to be sent or not. If +this functions returns false, the subsection is not sent. + +On the receiving side, if we found a subsection for a device that we +don't understand, we just fail the migration. If we understand all +the subsections, then we load the state with success. + +One important note is that the post_load() function is called "after" +loading all subsections, because a newer subsection could change same +value that it uses. + +Example: + +static bool ide_drive_pio_state_needed(void *opaque) +{ + IDEState *s = opaque; + + return ((s->status & DRQ_STAT) != 0) + || (s->bus->error_status & BM_STATUS_PIO_RETRY); +} + +const VMStateDescription vmstate_ide_drive_pio_state = { + .name = "ide_drive/pio_state", + .version_id = 1, + .minimum_version_id = 1, + .pre_save = ide_drive_pio_pre_save, + .post_load = ide_drive_pio_post_load, + .fields = (VMStateField[]) { + VMSTATE_INT32(req_nb_sectors, IDEState), + VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1, + vmstate_info_uint8, uint8_t), + VMSTATE_INT32(cur_io_buffer_offset, IDEState), + VMSTATE_INT32(cur_io_buffer_len, IDEState), + VMSTATE_UINT8(end_transfer_fn_idx, IDEState), + VMSTATE_INT32(elementary_transfer_size, IDEState), + VMSTATE_INT32(packet_transfer_size, IDEState), + VMSTATE_END_OF_LIST() + } +}; + +const VMStateDescription vmstate_ide_drive = { + .name = "ide_drive", + .version_id = 3, + .minimum_version_id = 0, + .post_load = ide_drive_post_load, + .fields = (VMStateField[]) { + .... several fields .... + VMSTATE_END_OF_LIST() + }, + .subsections = (VMStateSubsection []) { + { + .vmsd = &vmstate_ide_drive_pio_state, + .needed = ide_drive_pio_state_needed, + }, { + /* empty */ + } + } +}; + +Here we have a subsection for the pio state. We only need to +save/send this state when we are in the middle of a pio operation +(that is what ide_drive_pio_state_needed() checks). If DRQ_STAT is +not enabled, the values on that fields are garbage and don't need to +be sent. diff --git a/qemu/docs/multiple-iothreads.txt b/qemu/docs/multiple-iothreads.txt new file mode 100644 index 00000000..40b84199 --- /dev/null +++ b/qemu/docs/multiple-iothreads.txt @@ -0,0 +1,134 @@ +Copyright (c) 2014 Red Hat Inc. + +This work is licensed under the terms of the GNU GPL, version 2 or later. See +the COPYING file in the top-level directory. + + +This document explains the IOThread feature and how to write code that runs +outside the QEMU global mutex. + +The main loop and IOThreads +--------------------------- +QEMU is an event-driven program that can do several things at once using an +event loop. The VNC server and the QMP monitor are both processed from the +same event loop, which monitors their file descriptors until they become +readable and then invokes a callback. + +The default event loop is called the main loop (see main-loop.c). It is +possible to create additional event loop threads using -object +iothread,id=my-iothread. + +Side note: The main loop and IOThread are both event loops but their code is +not shared completely. Sometimes it is useful to remember that although they +are conceptually similar they are currently not interchangeable. + +Why IOThreads are useful +------------------------ +IOThreads allow the user to control the placement of work. The main loop is a +scalability bottleneck on hosts with many CPUs. Work can be spread across +several IOThreads instead of just one main loop. When set up correctly this +can improve I/O latency and reduce jitter seen by the guest. + +The main loop is also deeply associated with the QEMU global mutex, which is a +scalability bottleneck in itself. vCPU threads and the main loop use the QEMU +global mutex to serialize execution of QEMU code. This mutex is necessary +because a lot of QEMU's code historically was not thread-safe. + +The fact that all I/O processing is done in a single main loop and that the +QEMU global mutex is contended by all vCPU threads and the main loop explain +why it is desirable to place work into IOThreads. + +The experimental virtio-blk data-plane implementation has been benchmarked and +shows these effects: +ftp://public.dhe.ibm.com/linux/pdfs/KVM_Virtualized_IO_Performance_Paper.pdf + +How to program for IOThreads +---------------------------- +The main difference between legacy code and new code that can run in an +IOThread is dealing explicitly with the event loop object, AioContext +(see include/block/aio.h). Code that only works in the main loop +implicitly uses the main loop's AioContext. Code that supports running +in IOThreads must be aware of its AioContext. + +AioContext supports the following services: + * File descriptor monitoring (read/write/error on POSIX hosts) + * Event notifiers (inter-thread signalling) + * Timers + * Bottom Halves (BH) deferred callbacks + +There are several old APIs that use the main loop AioContext: + * LEGACY qemu_aio_set_fd_handler() - monitor a file descriptor + * LEGACY qemu_aio_set_event_notifier() - monitor an event notifier + * LEGACY timer_new_ms() - create a timer + * LEGACY qemu_bh_new() - create a BH + * LEGACY qemu_aio_wait() - run an event loop iteration + +Since they implicitly work on the main loop they cannot be used in code that +runs in an IOThread. They might cause a crash or deadlock if called from an +IOThread since the QEMU global mutex is not held. + +Instead, use the AioContext functions directly (see include/block/aio.h): + * aio_set_fd_handler() - monitor a file descriptor + * aio_set_event_notifier() - monitor an event notifier + * aio_timer_new() - create a timer + * aio_bh_new() - create a BH + * aio_poll() - run an event loop iteration + +The AioContext can be obtained from the IOThread using +iothread_get_aio_context() or for the main loop using qemu_get_aio_context(). +Code that takes an AioContext argument works both in IOThreads or the main +loop, depending on which AioContext instance the caller passes in. + +How to synchronize with an IOThread +----------------------------------- +AioContext is not thread-safe so some rules must be followed when using file +descriptors, event notifiers, timers, or BHs across threads: + +1. AioContext functions can be called safely from file descriptor, event +notifier, timer, or BH callbacks invoked by the AioContext. No locking is +necessary. + +2. Other threads wishing to access the AioContext must use +aio_context_acquire()/aio_context_release() for mutual exclusion. Once the +context is acquired no other thread can access it or run event loop iterations +in this AioContext. + +aio_context_acquire()/aio_context_release() calls may be nested. This +means you can call them if you're not sure whether #1 applies. + +There is currently no lock ordering rule if a thread needs to acquire multiple +AioContexts simultaneously. Therefore, it is only safe for code holding the +QEMU global mutex to acquire other AioContexts. + +Side note: the best way to schedule a function call across threads is to create +a BH in the target AioContext beforehand and then call qemu_bh_schedule(). No +acquire/release or locking is needed for the qemu_bh_schedule() call. But be +sure to acquire the AioContext for aio_bh_new() if necessary. + +The relationship between AioContext and the block layer +------------------------------------------------------- +The AioContext originates from the QEMU block layer because it provides a +scoped way of running event loop iterations until all work is done. This +feature is used to complete all in-flight block I/O requests (see +bdrv_drain_all()). Nowadays AioContext is a generic event loop that can be +used by any QEMU subsystem. + +The block layer has support for AioContext integrated. Each BlockDriverState +is associated with an AioContext using bdrv_set_aio_context() and +bdrv_get_aio_context(). This allows block layer code to process I/O inside the +right AioContext. Other subsystems may wish to follow a similar approach. + +Block layer code must therefore expect to run in an IOThread and avoid using +old APIs that implicitly use the main loop. See the "How to program for +IOThreads" above for information on how to do that. + +If main loop code such as a QMP function wishes to access a BlockDriverState it +must first call aio_context_acquire(bdrv_get_aio_context(bs)) to ensure the +IOThread does not run in parallel. + +Long-running jobs (usually in the form of coroutines) are best scheduled in the +BlockDriverState's AioContext to avoid the need to acquire/release around each +bdrv_*() call. Be aware that there is currently no mechanism to get notified +when bdrv_set_aio_context() moves this BlockDriverState to a different +AioContext (see bdrv_detach_aio_context()/bdrv_attach_aio_context()), so you +may need to add this if you want to support long-running jobs. diff --git a/qemu/docs/multiseat.txt b/qemu/docs/multiseat.txt new file mode 100644 index 00000000..67151e08 --- /dev/null +++ b/qemu/docs/multiseat.txt @@ -0,0 +1,102 @@ + +multiseat howto (with some multihead coverage) +============================================== + +host side +--------- + +First you must compile qemu with a user interface supporting +multihead/multiseat and input event routing. Right now this +list includes sdl2 and gtk (both 2+3): + + ./configure --enable-sdl --with-sdlabi=2.0 + +or + + ./configure --enable-gtk + + +Next put together the qemu command line: + +qemu -enable-kvm -usb $memory $disk $whatever \ + -display [ sdl | gtk ] \ + -vga std \ + -device usb-tablet + +That is it for the first head, which will use the standard vga, the +standard ps/2 keyboard (implicitly there) and the usb-tablet. Now the +additional switches for the second head: + + -device pci-bridge,addr=12.0,chassis_nr=2,id=head.2 \ + -device secondary-vga,bus=head.2,addr=02.0,id=video.2 \ + -device nec-usb-xhci,bus=head.2,addr=0f.0,id=usb.2 \ + -device usb-kbd,bus=usb.2.0,port=1,display=video.2 \ + -device usb-tablet,bus=usb.2.0,port=2,display=video.2 + +This places a pci bridge in slot 12, connects a display adapter and +xhci (usb) controller to the bridge. Then it adds a usb keyboard and +usb mouse, both connected to the xhci and linked to the display. + +The "display=video2" sets up the input routing. Any input coming from +the window which belongs to the video.2 display adapter will be routed +to these input devices. + +The sdl2 ui will start up with two windows, one for each display +device. The gtk ui will start with a single window and each display +in a separate tab. You can either simply switch tabs to switch heads, +or use the "View / Detach tab" menu item to move one of the displays +to its own window so you can see both display devices side-by-side. + +Note on spice: Spice handles multihead just fine. But it can't do +multiseat. For tablet events the event source is sent to the spice +agent. But qemu can't figure it, so it can't do input routing. +Fixing this needs a new or extended input interface between +libspice-server and qemu. For keyboard events it is even worse: The +event source isn't included in the spice protocol, so the wire +protocol must be extended to support this. + + +guest side +---------- + +You need a pretty recent linux guest. systemd with loginctl. kernel +3.14+ with CONFIG_DRM_BOCHS enabled. Fedora 20 will do. Must be +fully updated for the new kernel though, i.e. the live iso doesn't cut +it. + +Now we'll have to configure the guest. Boot and login. "lspci -vt" +should list the pci bridge with the display adapter and usb controller: + + [root@fedora ~]# lspci -vt + -[0000:00]-+-00.0 Intel Corporation 440FX - 82441FX PMC [Natoma] + [ ... ] + \-12.0-[01]--+-02.0 Device 1234:1111 + \-0f.0 NEC Corporation USB 3.0 Host Controller + +Good. Now lets tell the system that the pci bridge and all devices +below it belong to a separate seat by dropping a file into +/etc/udev/rules.d: + + [root@fedora ~]# cat /etc/udev/rules.d/70-qemu-autoseat.rules + SUBSYSTEMS=="pci", DEVPATH=="*/0000:00:12.0", TAG+="seat", ENV{ID_AUTOSEAT}="1" + +Reboot. System should come up with two seats. With loginctl you can +check the configuration: + + [root@fedora ~]# loginctl list-seats + SEAT + seat0 + seat-pci-pci-0000_00_12_0 + + 2 seats listed. + +You can use "loginctl seat-status seat-pci-pci-0000_00_12_0" to list +the devices attached to the seat. + +Background info is here: + http://www.freedesktop.org/wiki/Software/systemd/multiseat/ + +Enjoy! + +-- +Gerd Hoffmann diff --git a/qemu/docs/q35-chipset.cfg b/qemu/docs/q35-chipset.cfg new file mode 100644 index 00000000..e4ddb7d9 --- /dev/null +++ b/qemu/docs/q35-chipset.cfg @@ -0,0 +1,152 @@ +################################################################ +# +# qemu -M q35 creates a bare machine with just the very essential +# chipset devices being present: +# +# 00.0 - Host bridge +# 1f.0 - ISA bridge / LPC +# 1f.2 - SATA (AHCI) controller +# 1f.3 - SMBus controller +# +# This config file documents the other devices and how they are +# created. You can simply use "-readconfig $thisfile" to create +# them all. Here is a overview: +# +# 19.0 - Ethernet controller (not created, our e1000 emulation +# doesn't emulate the ich9 device). +# 1a.* - USB Controller #2 (ehci + uhci companions) +# 1b.0 - HD Audio Controller +# 1c.* - PCI Express Ports +# 1d.* - USB Controller #1 (ehci + uhci companions, +# "qemu -M q35 -usb" creates these too) +# 1e.0 - PCI Bridge +# + +[device "ich9-ehci-2"] + driver = "ich9-usb-ehci2" + multifunction = "on" + bus = "pcie.0" + addr = "1a.7" + +[device "ich9-uhci-4"] + driver = "ich9-usb-uhci4" + multifunction = "on" + bus = "pcie.0" + addr = "1a.0" + masterbus = "ich9-ehci-2.0" + firstport = "0" + +[device "ich9-uhci-5"] + driver = "ich9-usb-uhci5" + multifunction = "on" + bus = "pcie.0" + addr = "1a.1" + masterbus = "ich9-ehci-2.0" + firstport = "2" + +[device "ich9-uhci-6"] + driver = "ich9-usb-uhci6" + multifunction = "on" + bus = "pcie.0" + addr = "1a.2" + masterbus = "ich9-ehci-2.0" + firstport = "4" + + +[device "ich9-hda-audio"] + driver = "ich9-intel-hda" + bus = "pcie.0" + addr = "1b.0" + + +[device "ich9-pcie-port-1"] + driver = "ioh3420" + multifunction = "on" + bus = "pcie.0" + addr = "1c.0" + port = "1" + chassis = "1" + +[device "ich9-pcie-port-2"] + driver = "ioh3420" + multifunction = "on" + bus = "pcie.0" + addr = "1c.1" + port = "2" + chassis = "2" + +[device "ich9-pcie-port-3"] + driver = "ioh3420" + multifunction = "on" + bus = "pcie.0" + addr = "1c.2" + port = "3" + chassis = "3" + +[device "ich9-pcie-port-4"] + driver = "ioh3420" + multifunction = "on" + bus = "pcie.0" + addr = "1c.3" + port = "4" + chassis = "4" + +## +# Example PCIe switch with two downstream ports +# +#[device "pcie-switch-upstream-port-1"] +# driver = "x3130-upstream" +# bus = "ich9-pcie-port-4" +# addr = "00.0" +# +#[device "pcie-switch-downstream-port-1-1"] +# driver = "xio3130-downstream" +# multifunction = "on" +# bus = "pcie-switch-upstream-port-1" +# addr = "00.0" +# port = "1" +# chassis = "5" +# +#[device "pcie-switch-downstream-port-1-2"] +# driver = "xio3130-downstream" +# multifunction = "on" +# bus = "pcie-switch-upstream-port-1" +# addr = "00.1" +# port = "1" +# chassis = "6" + +[device "ich9-ehci-1"] + driver = "ich9-usb-ehci1" + multifunction = "on" + bus = "pcie.0" + addr = "1d.7" + +[device "ich9-uhci-1"] + driver = "ich9-usb-uhci1" + multifunction = "on" + bus = "pcie.0" + addr = "1d.0" + masterbus = "ich9-ehci-1.0" + firstport = "0" + +[device "ich9-uhci-2"] + driver = "ich9-usb-uhci2" + multifunction = "on" + bus = "pcie.0" + addr = "1d.1" + masterbus = "ich9-ehci-1.0" + firstport = "2" + +[device "ich9-uhci-3"] + driver = "ich9-usb-uhci3" + multifunction = "on" + bus = "pcie.0" + addr = "1d.2" + masterbus = "ich9-ehci-1.0" + firstport = "4" + + +[device "ich9-pci-bridge"] + driver = "i82801b11-bridge" + bus = "pcie.0" + addr = "1e.0" diff --git a/qemu/docs/qapi-code-gen.txt b/qemu/docs/qapi-code-gen.txt new file mode 100644 index 00000000..8313ba6a --- /dev/null +++ b/qemu/docs/qapi-code-gen.txt @@ -0,0 +1,590 @@ += How to use the QAPI code generator = + +QAPI is a native C API within QEMU which provides management-level +functionality to internal/external users. For external +users/processes, this interface is made available by a JSON-based +QEMU Monitor protocol that is provided by the QMP server. + +To map QMP-defined interfaces to the native C QAPI implementations, +a JSON-based schema is used to define types and function +signatures, and a set of scripts is used to generate types/signatures, +and marshaling/dispatch code. The QEMU Guest Agent also uses these +scripts, paired with a separate schema, to generate +marshaling/dispatch code for the guest agent server running in the +guest. + +This document will describe how the schemas, scripts, and resulting +code are used. + + +== QMP/Guest agent schema == + +This file defines the types, commands, and events used by QMP. It should +fully describe the interface used by QMP. + +This file is designed to be loosely based on JSON although it's technically +executable Python. While dictionaries are used, they are parsed as +OrderedDicts so that ordering is preserved. + +There are two basic syntaxes used, type definitions and command definitions. + +The first syntax defines a type and is represented by a dictionary. There are +three kinds of user-defined types that are supported: complex types, +enumeration types and union types. + +Generally speaking, types definitions should always use CamelCase for the type +names. Command names should be all lower case with words separated by a hyphen. + + +=== Includes === + +The QAPI schema definitions can be modularized using the 'include' directive: + + { 'include': 'path/to/file.json'} + +The directive is evaluated recursively, and include paths are relative to the +file using the directive. Multiple includes of the same file are safe. + + +=== Complex types === + +A complex type is a dictionary containing a single key whose value is a +dictionary. This corresponds to a struct in C or an Object in JSON. An +example of a complex type is: + + { 'type': 'MyType', + 'data': { 'member1': 'str', 'member2': 'int', '*member3': 'str' } } + +The use of '*' as a prefix to the name means the member is optional. + +The default initialization value of an optional argument should not be changed +between versions of QEMU unless the new default maintains backward +compatibility to the user-visible behavior of the old default. + +With proper documentation, this policy still allows some flexibility; for +example, documenting that a default of 0 picks an optimal buffer size allows +one release to declare the optimal size at 512 while another release declares +the optimal size at 4096 - the user-visible behavior is not the bytes used by +the buffer, but the fact that the buffer was optimal size. + +On input structures (only mentioned in the 'data' side of a command), changing +from mandatory to optional is safe (older clients will supply the option, and +newer clients can benefit from the default); changing from optional to +mandatory is backwards incompatible (older clients may be omitting the option, +and must continue to work). + +On output structures (only mentioned in the 'returns' side of a command), +changing from mandatory to optional is in general unsafe (older clients may be +expecting the field, and could crash if it is missing), although it can be done +if the only way that the optional argument will be omitted is when it is +triggered by the presence of a new input flag to the command that older clients +don't know to send. Changing from optional to mandatory is safe. + +A structure that is used in both input and output of various commands +must consider the backwards compatibility constraints of both directions +of use. + +A complex type definition can specify another complex type as its base. +In this case, the fields of the base type are included as top-level fields +of the new complex type's dictionary in the QMP wire format. An example +definition is: + + { 'type': 'BlockdevOptionsGenericFormat', 'data': { 'file': 'str' } } + { 'type': 'BlockdevOptionsGenericCOWFormat', + 'base': 'BlockdevOptionsGenericFormat', + 'data': { '*backing': 'str' } } + +An example BlockdevOptionsGenericCOWFormat object on the wire could use +both fields like this: + + { "file": "/some/place/my-image", + "backing": "/some/place/my-backing-file" } + +=== Enumeration types === + +An enumeration type is a dictionary containing a single key whose value is a +list of strings. An example enumeration is: + + { 'enum': 'MyEnum', 'data': [ 'value1', 'value2', 'value3' ] } + +=== Union types === + +Union types are used to let the user choose between several different data +types. A union type is defined using a dictionary as explained in the +following paragraphs. + + +A simple union type defines a mapping from discriminator values to data types +like in this example: + + { 'type': 'FileOptions', 'data': { 'filename': 'str' } } + { 'type': 'Qcow2Options', + 'data': { 'backing-file': 'str', 'lazy-refcounts': 'bool' } } + + { 'union': 'BlockdevOptions', + 'data': { 'file': 'FileOptions', + 'qcow2': 'Qcow2Options' } } + +In the QMP wire format, a simple union is represented by a dictionary that +contains the 'type' field as a discriminator, and a 'data' field that is of the +specified data type corresponding to the discriminator value: + + { "type": "qcow2", "data" : { "backing-file": "/some/place/my-image", + "lazy-refcounts": true } } + + +A union definition can specify a complex type as its base. In this case, the +fields of the complex type are included as top-level fields of the union +dictionary in the QMP wire format. An example definition is: + + { 'type': 'BlockdevCommonOptions', 'data': { 'readonly': 'bool' } } + { 'union': 'BlockdevOptions', + 'base': 'BlockdevCommonOptions', + 'data': { 'raw': 'RawOptions', + 'qcow2': 'Qcow2Options' } } + +And it looks like this on the wire: + + { "type": "qcow2", + "readonly": false, + "data" : { "backing-file": "/some/place/my-image", + "lazy-refcounts": true } } + + +Flat union types avoid the nesting on the wire. They are used whenever a +specific field of the base type is declared as the discriminator ('type' is +then no longer generated). The discriminator must be of enumeration type. +The above example can then be modified as follows: + + { 'enum': 'BlockdevDriver', 'data': [ 'raw', 'qcow2' ] } + { 'type': 'BlockdevCommonOptions', + 'data': { 'driver': 'BlockdevDriver', 'readonly': 'bool' } } + { 'union': 'BlockdevOptions', + 'base': 'BlockdevCommonOptions', + 'discriminator': 'driver', + 'data': { 'raw': 'RawOptions', + 'qcow2': 'Qcow2Options' } } + +Resulting in this JSON object: + + { "driver": "qcow2", + "readonly": false, + "backing-file": "/some/place/my-image", + "lazy-refcounts": true } + + +A special type of unions are anonymous unions. They don't form a dictionary in +the wire format but allow the direct use of different types in their place. As +they aren't structured, they don't have any explicit discriminator but use +the (QObject) data type of their value as an implicit discriminator. This means +that they are restricted to using only one discriminator value per QObject +type. For example, you cannot have two different complex types in an anonymous +union, or two different integer types. + +Anonymous unions are declared using an empty dictionary as their discriminator. +The discriminator values never appear on the wire, they are only used in the +generated C code. Anonymous unions cannot have a base type. + + { 'union': 'BlockRef', + 'discriminator': {}, + 'data': { 'definition': 'BlockdevOptions', + 'reference': 'str' } } + +This example allows using both of the following example objects: + + { "file": "my_existing_block_device_id" } + { "file": { "driver": "file", + "readonly": false, + "filename": "/tmp/mydisk.qcow2" } } + + +=== Commands === + +Commands are defined by using a list containing three members. The first +member is the command name, the second member is a dictionary containing +arguments, and the third member is the return type. + +An example command is: + + { 'command': 'my-command', + 'data': { 'arg1': 'str', '*arg2': 'str' }, + 'returns': 'str' } + +=== Events === + +Events are defined with the keyword 'event'. When 'data' is also specified, +additional info will be included in the event. Finally there will be C API +generated in qapi-event.h; when called by QEMU code, a message with timestamp +will be emitted on the wire. If timestamp is -1, it means failure to retrieve +host time. + +An example event is: + +{ 'event': 'EVENT_C', + 'data': { '*a': 'int', 'b': 'str' } } + +Resulting in this JSON object: + +{ "event": "EVENT_C", + "data": { "b": "test string" }, + "timestamp": { "seconds": 1267020223, "microseconds": 435656 } } + + +== Code generation == + +Schemas are fed into 3 scripts to generate all the code/files that, paired +with the core QAPI libraries, comprise everything required to take JSON +commands read in by a QMP/guest agent server, unmarshal the arguments into +the underlying C types, call into the corresponding C function, and map the +response back to a QMP/guest agent response to be returned to the user. + +As an example, we'll use the following schema, which describes a single +complex user-defined type (which will produce a C struct, along with a list +node structure that can be used to chain together a list of such types in +case we want to accept/return a list of this type with a command), and a +command which takes that type as a parameter and returns the same type: + + $ cat example-schema.json + { 'type': 'UserDefOne', + 'data': { 'integer': 'int', 'string': 'str' } } + + { 'command': 'my-command', + 'data': {'arg1': 'UserDefOne'}, + 'returns': 'UserDefOne' } + + { 'event': 'MY_EVENT' } + +=== scripts/qapi-types.py === + +Used to generate the C types defined by a schema. The following files are +created: + +$(prefix)qapi-types.h - C types corresponding to types defined in + the schema you pass in +$(prefix)qapi-types.c - Cleanup functions for the above C types + +The $(prefix) is an optional parameter used as a namespace to keep the +generated code from one schema/code-generation separated from others so code +can be generated/used from multiple schemas without clobbering previously +created code. + +Example: + + $ python scripts/qapi-types.py --output-dir="qapi-generated" \ + --prefix="example-" --input-file=example-schema.json + $ cat qapi-generated/example-qapi-types.c +[Uninteresting stuff omitted...] + + void qapi_free_UserDefOneList(UserDefOneList *obj) + { + QapiDeallocVisitor *md; + Visitor *v; + + if (!obj) { + return; + } + + md = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(md); + visit_type_UserDefOneList(v, &obj, NULL, NULL); + qapi_dealloc_visitor_cleanup(md); + } + + void qapi_free_UserDefOne(UserDefOne *obj) + { + QapiDeallocVisitor *md; + Visitor *v; + + if (!obj) { + return; + } + + md = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(md); + visit_type_UserDefOne(v, &obj, NULL, NULL); + qapi_dealloc_visitor_cleanup(md); + } + + $ cat qapi-generated/example-qapi-types.h +[Uninteresting stuff omitted...] + + #ifndef EXAMPLE_QAPI_TYPES_H + #define EXAMPLE_QAPI_TYPES_H + +[Builtin types omitted...] + + typedef struct UserDefOne UserDefOne; + + typedef struct UserDefOneList + { + union { + UserDefOne *value; + uint64_t padding; + }; + struct UserDefOneList *next; + } UserDefOneList; + +[Functions on builtin types omitted...] + + struct UserDefOne + { + int64_t integer; + char *string; + }; + + void qapi_free_UserDefOneList(UserDefOneList *obj); + void qapi_free_UserDefOne(UserDefOne *obj); + + #endif + +=== scripts/qapi-visit.py === + +Used to generate the visitor functions used to walk through and convert +a QObject (as provided by QMP) to a native C data structure and +vice-versa, as well as the visitor function used to dealloc a complex +schema-defined C type. + +The following files are generated: + +$(prefix)qapi-visit.c: visitor function for a particular C type, used + to automagically convert QObjects into the + corresponding C type and vice-versa, as well + as for deallocating memory for an existing C + type + +$(prefix)qapi-visit.h: declarations for previously mentioned visitor + functions + +Example: + + $ python scripts/qapi-visit.py --output-dir="qapi-generated" + --prefix="example-" --input-file=example-schema.json + $ cat qapi-generated/example-qapi-visit.c +[Uninteresting stuff omitted...] + + static void visit_type_UserDefOne_fields(Visitor *m, UserDefOne **obj, Error **errp) + { + Error *err = NULL; + visit_type_int(m, &(*obj)->integer, "integer", &err); + if (err) { + goto out; + } + visit_type_str(m, &(*obj)->string, "string", &err); + if (err) { + goto out; + } + + out: + error_propagate(errp, err); + } + + void visit_type_UserDefOne(Visitor *m, UserDefOne **obj, const char *name, Error **errp) + { + Error *err = NULL; + + visit_start_struct(m, (void **)obj, "UserDefOne", name, sizeof(UserDefOne), &err); + if (!err) { + if (*obj) { + visit_type_UserDefOne_fields(m, obj, errp); + } + visit_end_struct(m, &err); + } + error_propagate(errp, err); + } + + void visit_type_UserDefOneList(Visitor *m, UserDefOneList **obj, const char *name, Error **errp) + { + Error *err = NULL; + GenericList *i, **prev; + + visit_start_list(m, name, &err); + if (err) { + goto out; + } + + for (prev = (GenericList **)obj; + !err && (i = visit_next_list(m, prev, &err)) != NULL; + prev = &i) { + UserDefOneList *native_i = (UserDefOneList *)i; + visit_type_UserDefOne(m, &native_i->value, NULL, &err); + } + + error_propagate(errp, err); + err = NULL; + visit_end_list(m, &err); + out: + error_propagate(errp, err); + } + $ python scripts/qapi-commands.py --output-dir="qapi-generated" \ + --prefix="example-" --input-file=example-schema.json + $ cat qapi-generated/example-qapi-visit.h +[Uninteresting stuff omitted...] + + #ifndef EXAMPLE_QAPI_VISIT_H + #define EXAMPLE_QAPI_VISIT_H + +[Visitors for builtin types omitted...] + + void visit_type_UserDefOne(Visitor *m, UserDefOne **obj, const char *name, Error **errp); + void visit_type_UserDefOneList(Visitor *m, UserDefOneList **obj, const char *name, Error **errp); + + #endif + +=== scripts/qapi-commands.py === + +Used to generate the marshaling/dispatch functions for the commands defined +in the schema. The following files are generated: + +$(prefix)qmp-marshal.c: command marshal/dispatch functions for each + QMP command defined in the schema. Functions + generated by qapi-visit.py are used to + convert QObjects received from the wire into + function parameters, and uses the same + visitor functions to convert native C return + values to QObjects from transmission back + over the wire. + +$(prefix)qmp-commands.h: Function prototypes for the QMP commands + specified in the schema. + +Example: + + $ python scripts/qapi-commands.py --output-dir="qapi-generated" + --prefix="example-" --input-file=example-schema.json + $ cat qapi-generated/example-qmp-marshal.c +[Uninteresting stuff omitted...] + + static void qmp_marshal_output_my_command(UserDefOne *ret_in, QObject **ret_out, Error **errp) + { + Error *local_err = NULL; + QmpOutputVisitor *mo = qmp_output_visitor_new(); + QapiDeallocVisitor *md; + Visitor *v; + + v = qmp_output_get_visitor(mo); + visit_type_UserDefOne(v, &ret_in, "unused", &local_err); + if (local_err) { + goto out; + } + *ret_out = qmp_output_get_qobject(mo); + + out: + error_propagate(errp, local_err); + qmp_output_visitor_cleanup(mo); + md = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(md); + visit_type_UserDefOne(v, &ret_in, "unused", NULL); + qapi_dealloc_visitor_cleanup(md); + } + + static void qmp_marshal_input_my_command(QDict *args, QObject **ret, Error **errp) + { + Error *local_err = NULL; + UserDefOne *retval = NULL; + QmpInputVisitor *mi = qmp_input_visitor_new_strict(QOBJECT(args)); + QapiDeallocVisitor *md; + Visitor *v; + UserDefOne *arg1 = NULL; + + v = qmp_input_get_visitor(mi); + visit_type_UserDefOne(v, &arg1, "arg1", &local_err); + if (local_err) { + goto out; + } + + retval = qmp_my_command(arg1, &local_err); + if (local_err) { + goto out; + } + + qmp_marshal_output_my_command(retval, ret, &local_err); + + out: + error_propagate(errp, local_err); + qmp_input_visitor_cleanup(mi); + md = qapi_dealloc_visitor_new(); + v = qapi_dealloc_get_visitor(md); + visit_type_UserDefOne(v, &arg1, "arg1", NULL); + qapi_dealloc_visitor_cleanup(md); + return; + } + + static void qmp_init_marshal(void) + { + qmp_register_command("my-command", qmp_marshal_input_my_command, QCO_NO_OPTIONS); + } + + qapi_init(qmp_init_marshal); + $ cat qapi-generated/example-qmp-commands.h +[Uninteresting stuff omitted...] + + #ifndef EXAMPLE_QMP_COMMANDS_H + #define EXAMPLE_QMP_COMMANDS_H + + #include "example-qapi-types.h" + #include "qapi/qmp/qdict.h" + #include "qapi/error.h" + + UserDefOne *qmp_my_command(UserDefOne *arg1, Error **errp); + + #endif + +=== scripts/qapi-event.py === + +Used to generate the event-related C code defined by a schema. The +following files are created: + +$(prefix)qapi-event.h - Function prototypes for each event type, plus an + enumeration of all event names +$(prefix)qapi-event.c - Implementation of functions to send an event + +Example: + + $ python scripts/qapi-event.py --output-dir="qapi-generated" + --prefix="example-" --input-file=example-schema.json + $ cat qapi-generated/example-qapi-event.c +[Uninteresting stuff omitted...] + + void qapi_event_send_my_event(Error **errp) + { + QDict *qmp; + Error *local_err = NULL; + QMPEventFuncEmit emit; + emit = qmp_event_get_func_emit(); + if (!emit) { + return; + } + + qmp = qmp_event_build_dict("MY_EVENT"); + + emit(EXAMPLE_QAPI_EVENT_MY_EVENT, qmp, &local_err); + + error_propagate(errp, local_err); + QDECREF(qmp); + } + + const char *EXAMPLE_QAPIEvent_lookup[] = { + "MY_EVENT", + NULL, + }; + $ cat qapi-generated/example-qapi-event.h +[Uninteresting stuff omitted...] + + #ifndef EXAMPLE_QAPI_EVENT_H + #define EXAMPLE_QAPI_EVENT_H + + #include "qapi/error.h" + #include "qapi/qmp/qdict.h" + #include "example-qapi-types.h" + + + void qapi_event_send_my_event(Error **errp); + + extern const char *EXAMPLE_QAPIEvent_lookup[]; + typedef enum EXAMPLE_QAPIEvent + { + EXAMPLE_QAPI_EVENT_MY_EVENT = 0, + EXAMPLE_QAPI_EVENT_MAX = 1, + } EXAMPLE_QAPIEvent; + + #endif diff --git a/qemu/docs/qdev-device-use.txt b/qemu/docs/qdev-device-use.txt new file mode 100644 index 00000000..136d2711 --- /dev/null +++ b/qemu/docs/qdev-device-use.txt @@ -0,0 +1,416 @@ += How to convert to -device & friends = + +=== Specifying Bus and Address on Bus === + +In qdev, each device has a parent bus. Some devices provide one or +more buses for children. You can specify a device's parent bus with +-device parameter bus. + +A device typically has a device address on its parent bus. For buses +where this address can be configured, devices provide a bus-specific +property. Examples: + + bus property name value format + PCI addr %x.%x (dev.fn, .fn optional) + I2C address %u + SCSI scsi-id %u + IDE unit %u + HDA cad %u + virtio-serial-bus nr %u + ccid-bus slot %u + USB port %d(.%d)* (port.port...) + +Example: device i440FX-pcihost is on the root bus, and provides a PCI +bus named pci.0. To put a FOO device into its slot 4, use -device +FOO,bus=/i440FX-pcihost/pci.0,addr=4. The abbreviated form bus=pci.0 +also works as long as the bus name is unique. + +=== Block Devices === + +A QEMU block device (drive) has a host and a guest part. + +In the general case, the guest device is connected to a controller +device. For instance, the IDE controller provides two IDE buses, each +of which can have up to two ide-drive devices, and each ide-drive +device is a guest part, and is connected to a host part. + +Except we sometimes lump controller, bus(es) and drive device(s) all +together into a single device. For instance, the ISA floppy +controller is connected to up to two host drives. + +The old ways to define block devices define host and guest part +together. Sometimes, they can even define a controller device in +addition to the block device. + +The new way keeps the parts separate: you create the host part with +-drive, and guest device(s) with -device. + +The various old ways to define drives all boil down to the common form + + -drive if=TYPE,bus=BUS,unit=UNIT,OPTS... + +TYPE, BUS and UNIT identify the controller device, which of its buses +to use, and the drive's address on that bus. Details depend on TYPE. + +Instead of bus=BUS,unit=UNIT, you can also say index=IDX. + +In the new way, this becomes something like + + -drive if=none,id=DRIVE-ID,HOST-OPTS... + -device DEVNAME,drive=DRIVE-ID,DEV-OPTS... + +The old OPTS get split into HOST-OPTS and DEV-OPTS as follows: + +* file, format, snapshot, cache, aio, readonly, rerror, werror go into + HOST-OPTS. + +* cyls, head, secs and trans go into HOST-OPTS. Future work: they + should go into DEV-OPTS instead. + +* serial goes into DEV-OPTS, for devices supporting serial numbers. + For other devices, it goes nowhere. + +* media is special. In the old way, it selects disk vs. CD-ROM with + if=ide, if=scsi and if=xen. The new way uses DEVNAME for that. + Additionally, readonly=on goes into HOST-OPTS. + +* addr is special, see if=virtio below. + +The -device argument differs in detail for each type of drive: + +* if=ide + + -device DEVNAME,drive=DRIVE-ID,bus=IDE-BUS,unit=UNIT + + where DEVNAME is either ide-hd or ide-cd, IDE-BUS identifies an IDE + bus, normally either ide.0 or ide.1, and UNIT is either 0 or 1. + +* if=scsi + + The old way implicitly creates SCSI controllers as needed. The new + way makes that explicit: + + -device lsi53c895a,id=ID + + As for all PCI devices, you can add bus=PCI-BUS,addr=DEVFN to + control the PCI device address. + + This SCSI controller provides a single SCSI bus, named ID.0. Put a + disk on it: + + -device DEVNAME,drive=DRIVE-ID,bus=ID.0,scsi-id=UNIT + + where DEVNAME is either scsi-hd, scsi-cd or scsi-generic. + +* if=floppy + + -global isa-fdc.driveA=DRIVE-ID + -global isa-fdc.driveB=DRIVE-ID + + This is -global instead of -device, because the floppy controller is + created automatically, and we want to configure that one, not create + a second one (which isn't possible anyway). + + Without any -global isa-fdc,... you get an empty driveA and no + driveB. You can use -nodefaults to suppress the default driveA, see + "Default Devices". + +* if=virtio + + -device virtio-blk-pci,drive=DRIVE-ID,class=C,vectors=V,ioeventfd=IOEVENTFD + + This lets you control PCI device class and MSI-X vectors. + + IOEVENTFD controls whether or not ioeventfd is used for virtqueue + notify. It can be set to on (default) or off. + + As for all PCI devices, you can add bus=PCI-BUS,addr=DEVFN to + control the PCI device address. This replaces option addr available + with -drive if=virtio. + +* if=pflash, if=mtd, if=sd, if=xen are not yet available with -device + +For USB devices, the old way is actually different: + + -usbdevice disk:format=FMT:FILENAME + +Provides much less control than -drive's OPTS... The new way fixes +that: + + -device usb-storage,drive=DRIVE-ID,removable=RMB + +The removable parameter gives control over the SCSI INQUIRY removable +(RMB) bit. USB thumbdrives usually set removable=on, while USB hard +disks set removable=off. + +Bug: usb-storage pretends to be a block device, but it's really a SCSI +controller that can serve only a single device, which it creates +automatically. The automatic creation guesses what kind of guest part +to create from the host part, like -drive if=scsi. Host and guest +part are not cleanly separated. + +=== Character Devices === + +A QEMU character device has a host and a guest part. + +The old ways to define character devices define host and guest part +together. + +The new way keeps the parts separate: you create the host part with +-chardev, and the guest device with -device. + +The various old ways to define a character device are all of the +general form + + -FOO FOO-OPTS...,LEGACY-CHARDEV + +where FOO-OPTS... is specific to -FOO, and the host part +LEGACY-CHARDEV is the same everywhere. + +In the new way, this becomes + + -chardev HOST-OPTS...,id=CHR-ID + -device DEVNAME,chardev=CHR-ID,DEV-OPTS... + +The appropriate DEVNAME depends on the machine type. For type "pc": + +* -serial becomes -device isa-serial,iobase=IOADDR,irq=IRQ,index=IDX + + This lets you control I/O ports and IRQs. + +* -parallel becomes -device isa-parallel,iobase=IOADDR,irq=IRQ,index=IDX + + This lets you control I/O ports and IRQs. + +* -usbdevice serial:vendorid=VID,productid=PRID becomes + -device usb-serial,vendorid=VID,productid=PRID + +* -usbdevice braille doesn't support LEGACY-CHARDEV syntax. It always + uses "braille". With -device, this useful default is gone, so you + have to use something like + + -device usb-braille,chardev=braille,vendorid=VID,productid=PRID + -chardev braille,id=braille + +* -virtioconsole becomes + -device virtio-serial-pci,class=C,vectors=V,ioeventfd=IOEVENTFD,max_ports=N + -device virtconsole,is_console=NUM,nr=NR,name=NAME + +LEGACY-CHARDEV translates to -chardev HOST-OPTS... as follows: + +* null becomes -chardev null + +* pty, msmouse, braille, stdio likewise + +* vc:WIDTHxHEIGHT becomes -chardev vc,width=WIDTH,height=HEIGHT + +* vc:CxC becomes -chardev vc,cols=,rows= + +* con: becomes -chardev console + +* COM becomes -chardev serial,path=COM + +* file:FNAME becomes -chardev file,path=FNAME + +* pipe:FNAME becomes -chardev pipe,path=FNAME + +* tcp:HOST:PORT,OPTS... becomes -chardev socket,host=HOST,port=PORT,OPTS... + +* telnet:HOST:PORT,OPTS... becomes + -chardev socket,host=HOST,port=PORT,OPTS...,telnet=on + +* udp:HOST:PORT@LOCALADDR:LOCALPORT becomes + -chardev udp,host=HOST,port=PORT,localaddr=LOCALADDR,localport=LOCALPORT + +* unix:FNAME becomes -chardev socket,path=FNAME + +* /dev/parportN becomes -chardev parport,file=/dev/parportN + +* /dev/ppiN likewise + +* Any other /dev/FNAME becomes -chardev tty,path=/dev/FNAME + +* mon:LEGACY-CHARDEV is special: it multiplexes the monitor onto the + character device defined by LEGACY-CHARDEV. -chardev provides more + general multiplexing instead: you can connect up to four users to a + single host part. You need to pass mux=on to -chardev to enable + switching the input focus. + +QEMU uses LEGACY-CHARDEV syntax not just to set up guest devices, but +also in various other places such as -monitor or -net +user,guestfwd=... You can use chardev:CHR-ID in place of +LEGACY-CHARDEV to refer to a host part defined with -chardev. + +=== Network Devices === + +Host and guest part of network devices have always been separate. + +The old way to define the guest part looks like this: + + -net nic,netdev=NET-ID,macaddr=MACADDR,model=MODEL,name=ID,addr=STR,vectors=V + +Except for USB it looks like this: + + -usbdevice net:netdev=NET-ID,macaddr=MACADDR,name=ID + +The new way is -device: + + -device DEVNAME,netdev=NET-ID,mac=MACADDR,DEV-OPTS... + +DEVNAME equals MODEL, except for virtio you have to name the virtio +device appropriate for the bus (virtio-net-pci for PCI), and for USB +you have to use usb-net. + +The old name=ID parameter becomes the usual id=ID with -device. + +For PCI devices, you can add bus=PCI-BUS,addr=DEVFN to control the PCI +device address, as usual. The old -net nic provides parameter addr +for that, which is silently ignored when the NIC is not a PCI device. + +For virtio-net-pci, you can control whether or not ioeventfd is used for +virtqueue notify by setting ioeventfd= to on or off (default). + +-net nic accepts vectors=V for all models, but it's silently ignored +except for virtio-net-pci (model=virtio). With -device, only devices +that support it accept it. + +Not all devices are available with -device at this time. All PCI +devices and ne2k_isa are. + +Some PCI devices aren't available with -net nic, e.g. i82558a. + +To connect to a VLAN instead of an ordinary host part, replace +netdev=NET-ID by vlan=VLAN. + +=== Graphics Devices === + +Host and guest part of graphics devices have always been separate. + +The old way to define the guest graphics device is -vga VGA. Not all +machines support all -vga options. + +The new way is -device. The mapping from -vga argument to -device +depends on the machine type. For machine "pc", it's: + + std -device VGA + cirrus -device cirrus-vga + vmware -device vmware-svga + qxl -device qxl-vga + none -nodefaults + disables more than just VGA, see "Default Devices" + +As for all PCI devices, you can add bus=PCI-BUS,addr=DEVFN to control +the PCI device address. + +-device VGA supports properties bios-offset and bios-size, but they +aren't used with machine type "pc". + +For machine "isapc", it's + + std -device isa-vga + cirrus not yet available with -device + none -nodefaults + disables more than just VGA, see "Default Devices" + +Bug: the new way doesn't work for machine types "pc" and "isapc", +because it violates obscure device initialization ordering +constraints. + +=== Audio Devices === + +Host and guest part of audio devices have always been separate. + +The old way to define guest audio devices is -soundhw C1,... + +The new way is to define each guest audio device separately with +-device. + +Map from -soundhw sound card name to -device: + + ac97 -device AC97 + cs4231a -device cs4231a,iobase=IOADDR,irq=IRQ,dma=DMA + es1370 -device ES1370 + gus -device gus,iobase=IOADDR,irq=IRQ,dma=DMA,freq=F + hda -device intel-hda,msi=MSI -device hda-duplex + sb16 -device sb16,iobase=IOADDR,irq=IRQ,dma=DMA,dma16=DMA16,version=V + adlib not yet available with -device + pcspk not yet available with -device + +For PCI devices, you can add bus=PCI-BUS,addr=DEVFN to control the PCI +device address, as usual. + +=== USB Devices === + +The old way to define a virtual USB device is -usbdevice DRIVER:OPTS... + +The new way is -device DEVNAME,DEV-OPTS... Details depend on DRIVER: + +* ccid -device usb-ccid +* keyboard -device usb-kbd +* mouse -device usb-mouse +* tablet -device usb-tablet +* wacom-tablet -device usb-wacom-tablet +* host:... See "Host Device Assignment" +* disk:... See "Block Devices" +* serial:... See "Character Devices" +* braille See "Character Devices" +* net:... See "Network Devices" +* bt:... not yet available with -device + +=== Watchdog Devices === + +Host and guest part of watchdog devices have always been separate. + +The old way to define a guest watchdog device is -watchdog DEVNAME. +The new way is -device DEVNAME. For PCI devices, you can add +bus=PCI-BUS,addr=DEVFN to control the PCI device address, as usual. + +=== Host Device Assignment === + +QEMU supports assigning host PCI devices (qemu-kvm only at this time) +and host USB devices. + +The old way to assign a host PCI device is + + -pcidevice host=ADDR,dma=none,id=ID + +The new way is + + -device pci-assign,host=ADDR,iommu=IOMMU,id=ID + +The old dma=none becomes iommu=off with -device. + +The old way to assign a host USB device is + + -usbdevice host:auto:BUS.ADDR:VID:PRID + +where any of BUS, ADDR, VID, PRID can be the wildcard *. + +The new way is + + -device usb-host,hostbus=BUS,hostaddr=ADDR,vendorid=VID,productid=PRID + +Omitted options match anything, just like the old way's wildcard. + +=== Default Devices === + +QEMU creates a number of devices by default, depending on the machine +type. + +-device DEVNAME... and global DEVNAME... suppress default devices for +some DEVNAMEs: + + default device suppressing DEVNAMEs + CD-ROM ide-cd, ide-drive, scsi-cd + isa-fdc's driveA isa-fdc + parallel isa-parallel + serial isa-serial + VGA VGA, cirrus-vga, vmware-svga + virtioconsole virtio-serial-pci, virtio-serial-s390, virtio-serial + +The default NIC is connected to a default part created along with it. +It is *not* suppressed by configuring a NIC with -device (you may call +that a bug). -net and -netdev suppress the default NIC. + +-nodefaults suppresses all the default devices mentioned above, plus a +few other things such as default SD-Card drive and default monitor. diff --git a/qemu/docs/qemupciserial.inf b/qemu/docs/qemupciserial.inf new file mode 100644 index 00000000..6f7eef49 --- /dev/null +++ b/qemu/docs/qemupciserial.inf @@ -0,0 +1,102 @@ +; qemupciserial.inf for QEMU, based on MSPORTS.INF + +; The driver itself is shipped with Windows (serial.sys). This is +; just a inf file to tell windows which pci id the serial pci card +; emulated by qemu has, and to apply a name tag to it which windows +; will show in the device manager. + +; Installing the driver: Go to device manager. You should find a "pci +; serial card" tagged with a yellow question mark. Open properties. +; Pick "update driver". Then "select driver manually". Pick "Ports +; (Com+Lpt)" from the list. Click "Have a disk". Select this file. +; Procedure may vary a bit depending on the windows version. + +; This file covers all options: pci-serial, pci-serial-2x, pci-serial-4x +; for both 32 and 64 bit platforms. + +[Version] +Signature="$Windows NT$" +Class=MultiFunction +ClassGUID={4d36e971-e325-11ce-bfc1-08002be10318} +Provider=%QEMU% +DriverVer=12/29/2013,1.3.0 +[ControlFlags] +ExcludeFromSelect=* +[Manufacturer] +%QEMU%=QEMU,NTx86,NTAMD64 + +[QEMU.NTx86] +%QEMU-PCI_SERIAL_1_PORT%=ComPort_inst1, PCI\VEN_1B36&DEV_0002 +%QEMU-PCI_SERIAL_2_PORT%=ComPort_inst2, PCI\VEN_1B36&DEV_0003 +%QEMU-PCI_SERIAL_4_PORT%=ComPort_inst4, PCI\VEN_1B36&DEV_0004 + +[QEMU.NTAMD64] +%QEMU-PCI_SERIAL_1_PORT%=ComPort_inst1, PCI\VEN_1B36&DEV_0002 +%QEMU-PCI_SERIAL_2_PORT%=ComPort_inst2, PCI\VEN_1B36&DEV_0003 +%QEMU-PCI_SERIAL_4_PORT%=ComPort_inst4, PCI\VEN_1B36&DEV_0004 + +[ComPort_inst1] +Include=mf.inf +Needs=MFINSTALL.mf + +[ComPort_inst2] +Include=mf.inf +Needs=MFINSTALL.mf + +[ComPort_inst4] +Include=mf.inf +Needs=MFINSTALL.mf + +[ComPort_inst1.HW] +AddReg=ComPort_inst1.RegHW + +[ComPort_inst2.HW] +AddReg=ComPort_inst2.RegHW + +[ComPort_inst4.HW] +AddReg=ComPort_inst4.RegHW + +[ComPort_inst1.Services] +Include=mf.inf +Needs=MFINSTALL.mf.Services + +[ComPort_inst2.Services] +Include=mf.inf +Needs=MFINSTALL.mf.Services + +[ComPort_inst4.Services] +Include=mf.inf +Needs=MFINSTALL.mf.Services + +[ComPort_inst1.RegHW] +HKR,Child0000,HardwareID,,*PNP0501 +HKR,Child0000,VaryingResourceMap,1,00, 00,00,00,00, 08,00,00,00 +HKR,Child0000,ResourceMap,1,02 + +[ComPort_inst2.RegHW] +HKR,Child0000,HardwareID,,*PNP0501 +HKR,Child0000,VaryingResourceMap,1,00, 00,00,00,00, 08,00,00,00 +HKR,Child0000,ResourceMap,1,02 +HKR,Child0001,HardwareID,,*PNP0501 +HKR,Child0001,VaryingResourceMap,1,00, 08,00,00,00, 08,00,00,00 +HKR,Child0001,ResourceMap,1,02 + +[ComPort_inst4.RegHW] +HKR,Child0000,HardwareID,,*PNP0501 +HKR,Child0000,VaryingResourceMap,1,00, 00,00,00,00, 08,00,00,00 +HKR,Child0000,ResourceMap,1,02 +HKR,Child0001,HardwareID,,*PNP0501 +HKR,Child0001,VaryingResourceMap,1,00, 08,00,00,00, 08,00,00,00 +HKR,Child0001,ResourceMap,1,02 +HKR,Child0002,HardwareID,,*PNP0501 +HKR,Child0002,VaryingResourceMap,1,00, 10,00,00,00, 08,00,00,00 +HKR,Child0002,ResourceMap,1,02 +HKR,Child0003,HardwareID,,*PNP0501 +HKR,Child0003,VaryingResourceMap,1,00, 18,00,00,00, 08,00,00,00 +HKR,Child0003,ResourceMap,1,02 + +[Strings] +QEMU="QEMU" +QEMU-PCI_SERIAL_1_PORT="1x QEMU PCI Serial Card" +QEMU-PCI_SERIAL_2_PORT="2x QEMU PCI Serial Card" +QEMU-PCI_SERIAL_4_PORT="4x QEMU PCI Serial Card" diff --git a/qemu/docs/qmp/README b/qemu/docs/qmp/README new file mode 100644 index 00000000..f6a3a031 --- /dev/null +++ b/qemu/docs/qmp/README @@ -0,0 +1,87 @@ + QEMU Machine Protocol + ===================== + +Introduction +------------ + +The QEMU Machine Protocol (QMP) allows applications to operate a +QEMU instance. + +QMP is JSON[1] based and features the following: + +- Lightweight, text-based, easy to parse data format +- Asynchronous messages support (ie. events) +- Capabilities Negotiation + +For detailed information on QMP's usage, please, refer to the following files: + +o qmp-spec.txt QEMU Machine Protocol current specification +o qmp-commands.txt QMP supported commands (auto-generated at build-time) +o qmp-events.txt List of available asynchronous events + +[1] http://www.json.org + +Usage +----- + +You can use the -qmp option to enable QMP. For example, the following +makes QMP available on localhost port 4444: + +$ qemu [...] -qmp tcp:localhost:4444,server,nowait + +However, for more flexibility and to make use of more options, the -mon +command-line option should be used. For instance, the following example +creates one HMP instance (human monitor) on stdio and one QMP instance +on localhost port 4444: + +$ qemu [...] -chardev stdio,id=mon0 -mon chardev=mon0,mode=readline \ + -chardev socket,id=mon1,host=localhost,port=4444,server,nowait \ + -mon chardev=mon1,mode=control,pretty=on + +Please, refer to QEMU's manpage for more information. + +Simple Testing +-------------- + +To manually test QMP one can connect with telnet and issue commands by hand: + +$ telnet localhost 4444 +Trying 127.0.0.1... +Connected to localhost. +Escape character is '^]'. +{ + "QMP": { + "version": { + "qemu": { + "micro": 50, + "minor": 6, + "major": 1 + }, + "package": "" + }, + "capabilities": [ + ] + } +} + +{ "execute": "qmp_capabilities" } +{ + "return": { + } +} + +{ "execute": "query-status" } +{ + "return": { + "status": "prelaunch", + "singlestep": false, + "running": false + } +} + +Please, refer to the qapi-schema.json file for a complete command reference. + +QMP wiki page +------------- + +http://wiki.qemu-project.org/QMP diff --git a/qemu/docs/qmp/qmp-events.txt b/qemu/docs/qmp/qmp-events.txt new file mode 100644 index 00000000..d759d197 --- /dev/null +++ b/qemu/docs/qmp/qmp-events.txt @@ -0,0 +1,627 @@ + QEMU Machine Protocol Events + ============================ + +ACPI_DEVICE_OST +--------------- + +Emitted when guest executes ACPI _OST method. + + - data: ACPIOSTInfo type as described in qapi-schema.json + +{ "event": "ACPI_DEVICE_OST", + "data": { "device": "d1", "slot": "0", "slot-type": "DIMM", "source": 1, "status": 0 } } + +BALLOON_CHANGE +-------------- + +Emitted when the guest changes the actual BALLOON level. This +value is equivalent to the 'actual' field return by the +'query-balloon' command + +Data: + +- "actual": actual level of the guest memory balloon in bytes (json-number) + +Example: + +{ "event": "BALLOON_CHANGE", + "data": { "actual": 944766976 }, + "timestamp": { "seconds": 1267020223, "microseconds": 435656 } } + +BLOCK_IMAGE_CORRUPTED +--------------------- + +Emitted when a disk image is being marked corrupt. + +Data: + +- "device": Device name (json-string) +- "msg": Informative message (e.g., reason for the corruption) (json-string) +- "offset": If the corruption resulted from an image access, this is the access + offset into the image (json-int) +- "size": If the corruption resulted from an image access, this is the access + size (json-int) + +Example: + +{ "event": "BLOCK_IMAGE_CORRUPTED", + "data": { "device": "ide0-hd0", + "msg": "Prevented active L1 table overwrite", "offset": 196608, + "size": 65536 }, + "timestamp": { "seconds": 1378126126, "microseconds": 966463 } } + +BLOCK_IO_ERROR +-------------- + +Emitted when a disk I/O error occurs. + +Data: + +- "device": device name (json-string) +- "operation": I/O operation (json-string, "read" or "write") +- "action": action that has been taken, it's one of the following (json-string): + "ignore": error has been ignored + "report": error has been reported to the device + "stop": the VM is going to stop because of the error + +Example: + +{ "event": "BLOCK_IO_ERROR", + "data": { "device": "ide0-hd1", + "operation": "write", + "action": "stop" }, + "timestamp": { "seconds": 1265044230, "microseconds": 450486 } } + +Note: If action is "stop", a STOP event will eventually follow the +BLOCK_IO_ERROR event. + +BLOCK_JOB_CANCELLED +------------------- + +Emitted when a block job has been cancelled. + +Data: + +- "type": Job type (json-string; "stream" for image streaming + "commit" for block commit) +- "device": Device name (json-string) +- "len": Maximum progress value (json-int) +- "offset": Current progress value (json-int) + On success this is equal to len. + On failure this is less than len. +- "speed": Rate limit, bytes per second (json-int) + +Example: + +{ "event": "BLOCK_JOB_CANCELLED", + "data": { "type": "stream", "device": "virtio-disk0", + "len": 10737418240, "offset": 134217728, + "speed": 0 }, + "timestamp": { "seconds": 1267061043, "microseconds": 959568 } } + +BLOCK_JOB_COMPLETED +------------------- + +Emitted when a block job has completed. + +Data: + +- "type": Job type (json-string; "stream" for image streaming + "commit" for block commit) +- "device": Device name (json-string) +- "len": Maximum progress value (json-int) +- "offset": Current progress value (json-int) + On success this is equal to len. + On failure this is less than len. +- "speed": Rate limit, bytes per second (json-int) +- "error": Error message (json-string, optional) + Only present on failure. This field contains a human-readable + error message. There are no semantics other than that streaming + has failed and clients should not try to interpret the error + string. + +Example: + +{ "event": "BLOCK_JOB_COMPLETED", + "data": { "type": "stream", "device": "virtio-disk0", + "len": 10737418240, "offset": 10737418240, + "speed": 0 }, + "timestamp": { "seconds": 1267061043, "microseconds": 959568 } } + +BLOCK_JOB_ERROR +--------------- + +Emitted when a block job encounters an error. + +Data: + +- "device": device name (json-string) +- "operation": I/O operation (json-string, "read" or "write") +- "action": action that has been taken, it's one of the following (json-string): + "ignore": error has been ignored, the job may fail later + "report": error will be reported and the job canceled + "stop": error caused job to be paused + +Example: + +{ "event": "BLOCK_JOB_ERROR", + "data": { "device": "ide0-hd1", + "operation": "write", + "action": "stop" }, + "timestamp": { "seconds": 1265044230, "microseconds": 450486 } } + +BLOCK_JOB_READY +--------------- + +Emitted when a block job is ready to complete. + +Data: + +- "type": Job type (json-string; "stream" for image streaming + "commit" for block commit) +- "device": Device name (json-string) +- "len": Maximum progress value (json-int) +- "offset": Current progress value (json-int) + On success this is equal to len. + On failure this is less than len. +- "speed": Rate limit, bytes per second (json-int) + +Example: + +{ "event": "BLOCK_JOB_READY", + "data": { "device": "drive0", "type": "mirror", "speed": 0, + "len": 2097152, "offset": 2097152 } + "timestamp": { "seconds": 1265044230, "microseconds": 450486 } } + +Note: The "ready to complete" status is always reset by a BLOCK_JOB_ERROR +event. + +DEVICE_DELETED +-------------- + +Emitted whenever the device removal completion is acknowledged +by the guest. +At this point, it's safe to reuse the specified device ID. +Device removal can be initiated by the guest or by HMP/QMP commands. + +Data: + +- "device": device name (json-string, optional) +- "path": device path (json-string) + +{ "event": "DEVICE_DELETED", + "data": { "device": "virtio-net-pci-0", + "path": "/machine/peripheral/virtio-net-pci-0" }, + "timestamp": { "seconds": 1265044230, "microseconds": 450486 } } + +DEVICE_TRAY_MOVED +----------------- + +It's emitted whenever the tray of a removable device is moved by the guest +or by HMP/QMP commands. + +Data: + +- "device": device name (json-string) +- "tray-open": true if the tray has been opened or false if it has been closed + (json-bool) + +{ "event": "DEVICE_TRAY_MOVED", + "data": { "device": "ide1-cd0", + "tray-open": true + }, + "timestamp": { "seconds": 1265044230, "microseconds": 450486 } } + +GUEST_PANICKED +-------------- + +Emitted when guest OS panic is detected. + +Data: + +- "action": Action that has been taken (json-string, currently always "pause"). + +Example: + +{ "event": "GUEST_PANICKED", + "data": { "action": "pause" } } + +NIC_RX_FILTER_CHANGED +--------------------- + +The event is emitted once until the query command is executed, +the first event will always be emitted. + +Data: + +- "name": net client name (json-string) +- "path": device path (json-string) + +{ "event": "NIC_RX_FILTER_CHANGED", + "data": { "name": "vnet0", + "path": "/machine/peripheral/vnet0/virtio-backend" }, + "timestamp": { "seconds": 1368697518, "microseconds": 326866 } } +} + +POWERDOWN +--------- + +Emitted when the Virtual Machine is powered down through the power +control system, such as via ACPI. + +Data: None. + +Example: + +{ "event": "POWERDOWN", + "timestamp": { "seconds": 1267040730, "microseconds": 682951 } } + +QUORUM_FAILURE +-------------- + +Emitted by the Quorum block driver if it fails to establish a quorum. + +Data: + +- "reference": device name if defined else node name. +- "sector-num": Number of the first sector of the failed read operation. +- "sectors-count": Failed read operation sector count. + +Example: + +{ "event": "QUORUM_FAILURE", + "data": { "reference": "usr1", "sector-num": 345435, "sectors-count": 5 }, + "timestamp": { "seconds": 1344522075, "microseconds": 745528 } } + +QUORUM_REPORT_BAD +----------------- + +Emitted to report a corruption of a Quorum file. + +Data: + +- "error": Error message (json-string, optional) + Only present on failure. This field contains a human-readable + error message. There are no semantics other than that the + block layer reported an error and clients should not try to + interpret the error string. +- "node-name": The graph node name of the block driver state. +- "sector-num": Number of the first sector of the failed read operation. +- "sectors-count": Failed read operation sector count. + +Example: + +{ "event": "QUORUM_REPORT_BAD", + "data": { "node-name": "1.raw", "sector-num": 345435, "sectors-count": 5 }, + "timestamp": { "seconds": 1344522075, "microseconds": 745528 } } + +RESET +----- + +Emitted when the Virtual Machine is reset. + +Data: None. + +Example: + +{ "event": "RESET", + "timestamp": { "seconds": 1267041653, "microseconds": 9518 } } + +RESUME +------ + +Emitted when the Virtual Machine resumes execution. + +Data: None. + +Example: + +{ "event": "RESUME", + "timestamp": { "seconds": 1271770767, "microseconds": 582542 } } + +RTC_CHANGE +---------- + +Emitted when the guest changes the RTC time. + +Data: + +- "offset": Offset between base RTC clock (as specified by -rtc base), and +new RTC clock value (json-number) + +Example: + +{ "event": "RTC_CHANGE", + "data": { "offset": 78 }, + "timestamp": { "seconds": 1267020223, "microseconds": 435656 } } + +SHUTDOWN +-------- + +Emitted when the Virtual Machine has shut down, indicating that qemu +is about to exit. + +Data: None. + +Example: + +{ "event": "SHUTDOWN", + "timestamp": { "seconds": 1267040730, "microseconds": 682951 } } + +Note: If the command-line option "-no-shutdown" has been specified, a STOP +event will eventually follow the SHUTDOWN event. + +SPICE_CONNECTED +--------------- + +Emitted when a SPICE client connects. + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") +- "client": Client information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + +Example: + +{ "timestamp": {"seconds": 1290688046, "microseconds": 388707}, + "event": "SPICE_CONNECTED", + "data": { + "server": { "port": "5920", "family": "ipv4", "host": "127.0.0.1"}, + "client": {"port": "52873", "family": "ipv4", "host": "127.0.0.1"} +}} + +SPICE_DISCONNECTED +------------------ + +Emitted when a SPICE client disconnects. + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") +- "client": Client information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + +Example: + +{ "timestamp": {"seconds": 1290688046, "microseconds": 388707}, + "event": "SPICE_DISCONNECTED", + "data": { + "server": { "port": "5920", "family": "ipv4", "host": "127.0.0.1"}, + "client": {"port": "52873", "family": "ipv4", "host": "127.0.0.1"} +}} + +SPICE_INITIALIZED +----------------- + +Emitted after initial handshake and authentication takes place (if any) +and the SPICE channel is up and running + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "auth": authentication method (json-string, optional) +- "client": Client information (json-object) + - "host": IP address (json-string) + - "port": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "connection-id": spice connection id. All channels with the same id + belong to the same spice session (json-int) + - "channel-type": channel type. "1" is the main control channel, filter for + this one if you want track spice sessions only (json-int) + - "channel-id": channel id. Usually "0", might be different needed when + multiple channels of the same type exist, such as multiple + display channels in a multihead setup (json-int) + - "tls": whevener the channel is encrypted (json-bool) + +Example: + +{ "timestamp": {"seconds": 1290688046, "microseconds": 417172}, + "event": "SPICE_INITIALIZED", + "data": {"server": {"auth": "spice", "port": "5921", + "family": "ipv4", "host": "127.0.0.1"}, + "client": {"port": "49004", "family": "ipv4", "channel-type": 3, + "connection-id": 1804289383, "host": "127.0.0.1", + "channel-id": 0, "tls": true} +}} + +SPICE_MIGRATE_COMPLETED +----------------------- + +Emitted when SPICE migration has completed + +Data: None. + +Example: + +{ "timestamp": {"seconds": 1290688046, "microseconds": 417172}, + "event": "SPICE_MIGRATE_COMPLETED" } + + +STOP +---- + +Emitted when the Virtual Machine is stopped. + +Data: None. + +Example: + +{ "event": "STOP", + "timestamp": { "seconds": 1267041730, "microseconds": 281295 } } + +SUSPEND +------- + +Emitted when guest enters S3 state. + +Data: None. + +Example: + +{ "event": "SUSPEND", + "timestamp": { "seconds": 1344456160, "microseconds": 309119 } } + +SUSPEND_DISK +------------ + +Emitted when the guest makes a request to enter S4 state. + +Data: None. + +Example: + +{ "event": "SUSPEND_DISK", + "timestamp": { "seconds": 1344456160, "microseconds": 309119 } } + +Note: QEMU shuts down when entering S4 state. + +VNC_CONNECTED +------------- + +Emitted when a VNC client establishes a connection. + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "auth": authentication method (json-string, optional) +- "client": Client information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + +Example: + +{ "event": "VNC_CONNECTED", + "data": { + "server": { "auth": "sasl", "family": "ipv4", + "service": "5901", "host": "0.0.0.0" }, + "client": { "family": "ipv4", "service": "58425", + "host": "127.0.0.1" } }, + "timestamp": { "seconds": 1262976601, "microseconds": 975795 } } + + +Note: This event is emitted before any authentication takes place, thus +the authentication ID is not provided. + +VNC_DISCONNECTED +---------------- + +Emitted when the connection is closed. + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "auth": authentication method (json-string, optional) +- "client": Client information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "x509_dname": TLS dname (json-string, optional) + - "sasl_username": SASL username (json-string, optional) + +Example: + +{ "event": "VNC_DISCONNECTED", + "data": { + "server": { "auth": "sasl", "family": "ipv4", + "service": "5901", "host": "0.0.0.0" }, + "client": { "family": "ipv4", "service": "58425", + "host": "127.0.0.1", "sasl_username": "luiz" } }, + "timestamp": { "seconds": 1262976601, "microseconds": 975795 } } + +VNC_INITIALIZED +--------------- + +Emitted after authentication takes place (if any) and the VNC session is +made active. + +Data: + +- "server": Server information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "auth": authentication method (json-string, optional) +- "client": Client information (json-object) + - "host": IP address (json-string) + - "service": port number (json-string) + - "family": address family (json-string, "ipv4" or "ipv6") + - "x509_dname": TLS dname (json-string, optional) + - "sasl_username": SASL username (json-string, optional) + +Example: + +{ "event": "VNC_INITIALIZED", + "data": { + "server": { "auth": "sasl", "family": "ipv4", + "service": "5901", "host": "0.0.0.0"}, + "client": { "family": "ipv4", "service": "46089", + "host": "127.0.0.1", "sasl_username": "luiz" } }, + "timestamp": { "seconds": 1263475302, "microseconds": 150772 } } + +VSERPORT_CHANGE +--------------- + +Emitted when the guest opens or closes a virtio-serial port. + +Data: + +- "id": device identifier of the virtio-serial port (json-string) +- "open": true if the guest has opened the virtio-serial port (json-bool) + +Example: + +{ "event": "VSERPORT_CHANGE", + "data": { "id": "channel0", "open": true }, + "timestamp": { "seconds": 1401385907, "microseconds": 422329 } } + +WAKEUP +------ + +Emitted when the guest has woken up from S3 and is running. + +Data: None. + +Example: + +{ "event": "WAKEUP", + "timestamp": { "seconds": 1344522075, "microseconds": 745528 } } + +WATCHDOG +-------- + +Emitted when the watchdog device's timer is expired. + +Data: + +- "action": Action that has been taken, it's one of the following (json-string): + "reset", "shutdown", "poweroff", "pause", "debug", or "none" + +Example: + +{ "event": "WATCHDOG", + "data": { "action": "reset" }, + "timestamp": { "seconds": 1267061043, "microseconds": 959568 } } + +Note: If action is "reset", "shutdown", or "pause" the WATCHDOG event is +followed respectively by the RESET, SHUTDOWN, or STOP events. diff --git a/qemu/docs/qmp/qmp-spec.txt b/qemu/docs/qmp/qmp-spec.txt new file mode 100644 index 00000000..22568c64 --- /dev/null +++ b/qemu/docs/qmp/qmp-spec.txt @@ -0,0 +1,273 @@ + QEMU Machine Protocol Specification + +1. Introduction +=============== + +This document specifies the QEMU Machine Protocol (QMP), a JSON-based protocol +which is available for applications to operate QEMU at the machine-level. + +2. Protocol Specification +========================= + +This section details the protocol format. For the purpose of this document +"Client" is any application which is using QMP to communicate with QEMU and +"Server" is QEMU itself. + +JSON data structures, when mentioned in this document, are always in the +following format: + + json-DATA-STRUCTURE-NAME + +Where DATA-STRUCTURE-NAME is any valid JSON data structure, as defined by +the JSON standard: + +http://www.ietf.org/rfc/rfc4627.txt + +For convenience, json-object members and json-array elements mentioned in +this document will be in a certain order. However, in real protocol usage +they can be in ANY order, thus no particular order should be assumed. + +2.1 General Definitions +----------------------- + +2.1.1 All interactions transmitted by the Server are json-objects, always + terminating with CRLF + +2.1.2 All json-objects members are mandatory when not specified otherwise + +2.2 Server Greeting +------------------- + +Right when connected the Server will issue a greeting message, which signals +that the connection has been successfully established and that the Server is +ready for capabilities negotiation (for more information refer to section +'4. Capabilities Negotiation'). + +The greeting message format is: + +{ "QMP": { "version": json-object, "capabilities": json-array } } + + Where, + +- The "version" member contains the Server's version information (the format + is the same of the query-version command) +- The "capabilities" member specify the availability of features beyond the + baseline specification + +2.3 Issuing Commands +-------------------- + +The format for command execution is: + +{ "execute": json-string, "arguments": json-object, "id": json-value } + + Where, + +- The "execute" member identifies the command to be executed by the Server +- The "arguments" member is used to pass any arguments required for the + execution of the command, it is optional when no arguments are required +- The "id" member is a transaction identification associated with the + command execution, it is optional and will be part of the response if + provided + +2.4 Commands Responses +---------------------- + +There are two possible responses which the Server will issue as the result +of a command execution: success or error. + +2.4.1 success +------------- + +The format of a success response is: + +{ "return": json-object, "id": json-value } + + Where, + +- The "return" member contains the command returned data, which is defined + in a per-command basis or an empty json-object if the command does not + return data +- The "id" member contains the transaction identification associated + with the command execution if issued by the Client + +2.4.2 error +----------- + +The format of an error response is: + +{ "error": { "class": json-string, "desc": json-string }, "id": json-value } + + Where, + +- The "class" member contains the error class name (eg. "GenericError") +- The "desc" member is a human-readable error message. Clients should + not attempt to parse this message. +- The "id" member contains the transaction identification associated with + the command execution if issued by the Client + +NOTE: Some errors can occur before the Server is able to read the "id" member, +in these cases the "id" member will not be part of the error response, even +if provided by the client. + +2.5 Asynchronous events +----------------------- + +As a result of state changes, the Server may send messages unilaterally +to the Client at any time. They are called "asynchronous events". + +The format of asynchronous events is: + +{ "event": json-string, "data": json-object, + "timestamp": { "seconds": json-number, "microseconds": json-number } } + + Where, + +- The "event" member contains the event's name +- The "data" member contains event specific data, which is defined in a + per-event basis, it is optional +- The "timestamp" member contains the exact time of when the event occurred + in the Server. It is a fixed json-object with time in seconds and + microseconds + +For a listing of supported asynchronous events, please, refer to the +qmp-events.txt file. + +3. QMP Examples +=============== + +This section provides some examples of real QMP usage, in all of them +"C" stands for "Client" and "S" stands for "Server". + +3.1 Server greeting +------------------- + +S: { "QMP": { "version": { "qemu": { "micro": 50, "minor": 6, "major": 1 }, + "package": ""}, "capabilities": []}} + +3.2 Simple 'stop' execution +--------------------------- + +C: { "execute": "stop" } +S: { "return": {} } + +3.3 KVM information +------------------- + +C: { "execute": "query-kvm", "id": "example" } +S: { "return": { "enabled": true, "present": true }, "id": "example"} + +3.4 Parsing error +------------------ + +C: { "execute": } +S: { "error": { "class": "GenericError", "desc": "Invalid JSON syntax" } } + +3.5 Powerdown event +------------------- + +S: { "timestamp": { "seconds": 1258551470, "microseconds": 802384 }, + "event": "POWERDOWN" } + +4. Capabilities Negotiation +---------------------------- + +When a Client successfully establishes a connection, the Server is in +Capabilities Negotiation mode. + +In this mode only the qmp_capabilities command is allowed to run, all +other commands will return the CommandNotFound error. Asynchronous +messages are not delivered either. + +Clients should use the qmp_capabilities command to enable capabilities +advertised in the Server's greeting (section '2.2 Server Greeting') they +support. + +When the qmp_capabilities command is issued, and if it does not return an +error, the Server enters in Command mode where capabilities changes take +effect, all commands (except qmp_capabilities) are allowed and asynchronous +messages are delivered. + +5 Compatibility Considerations +------------------------------ + +All protocol changes or new features which modify the protocol format in an +incompatible way are disabled by default and will be advertised by the +capabilities array (section '2.2 Server Greeting'). Thus, Clients can check +that array and enable the capabilities they support. + +The QMP Server performs a type check on the arguments to a command. It +generates an error if a value does not have the expected type for its +key, or if it does not understand a key that the Client included. The +strictness of the Server catches wrong assumptions of Clients about +the Server's schema. Clients can assume that, when such validation +errors occur, they will be reported before the command generated any +side effect. + +However, Clients must not assume any particular: + +- Length of json-arrays +- Size of json-objects; in particular, future versions of QEMU may add + new keys and Clients should be able to ignore them. +- Order of json-object members or json-array elements +- Amount of errors generated by a command, that is, new errors can be added + to any existing command in newer versions of the Server + +Of course, the Server does guarantee to send valid JSON. But apart from +this, a Client should be "conservative in what they send, and liberal in +what they accept". + +6. Downstream extension of QMP +------------------------------ + +We recommend that downstream consumers of QEMU do *not* modify QMP. +Management tools should be able to support both upstream and downstream +versions of QMP without special logic, and downstream extensions are +inherently at odds with that. + +However, we recognize that it is sometimes impossible for downstreams to +avoid modifying QMP. Both upstream and downstream need to take care to +preserve long-term compatibility and interoperability. + +To help with that, QMP reserves JSON object member names beginning with +'__' (double underscore) for downstream use ("downstream names"). This +means upstream will never use any downstream names for its commands, +arguments, errors, asynchronous events, and so forth. + +Any new names downstream wishes to add must begin with '__'. To +ensure compatibility with other downstreams, it is strongly +recommended that you prefix your downstream names with '__RFQDN_' where +RFQDN is a valid, reverse fully qualified domain name which you +control. For example, a qemu-kvm specific monitor command would be: + + (qemu) __org.linux-kvm_enable_irqchip + +Downstream must not change the server greeting (section 2.2) other than +to offer additional capabilities. But see below for why even that is +discouraged. + +Section '5 Compatibility Considerations' applies to downstream as well +as to upstream, obviously. It follows that downstream must behave +exactly like upstream for any input not containing members with +downstream names ("downstream members"), except it may add members +with downstream names to its output. + +Thus, a client should not be able to distinguish downstream from +upstream as long as it doesn't send input with downstream members, and +properly ignores any downstream members in the output it receives. + +Advice on downstream modifications: + +1. Introducing new commands is okay. If you want to extend an existing + command, consider introducing a new one with the new behaviour + instead. + +2. Introducing new asynchronous messages is okay. If you want to extend + an existing message, consider adding a new one instead. + +3. Introducing new errors for use in new commands is okay. Adding new + errors to existing commands counts as extension, so 1. applies. + +4. New capabilities are strongly discouraged. Capabilities are for + evolving the basic protocol, and multiple diverging basic protocol + dialects are most undesirable. diff --git a/qemu/docs/rdma.txt b/qemu/docs/rdma.txt new file mode 100644 index 00000000..2bdd0a5b --- /dev/null +++ b/qemu/docs/rdma.txt @@ -0,0 +1,420 @@ +(RDMA: Remote Direct Memory Access) +RDMA Live Migration Specification, Version # 1 +============================================== +Wiki: http://wiki.qemu-project.org/Features/RDMALiveMigration +Github: git@github.com:hinesmr/qemu.git, 'rdma' branch + +Copyright (C) 2013 Michael R. Hines + +An *exhaustive* paper (2010) shows additional performance details +linked on the QEMU wiki above. + +Contents: +========= +* Introduction +* Before running +* Running +* Performance +* RDMA Migration Protocol Description +* Versioning and Capabilities +* QEMUFileRDMA Interface +* Migration of VM's ram +* Error handling +* TODO + +Introduction: +============= + +RDMA helps make your migration more deterministic under heavy load because +of the significantly lower latency and higher throughput over TCP/IP. This is +because the RDMA I/O architecture reduces the number of interrupts and +data copies by bypassing the host networking stack. In particular, a TCP-based +migration, under certain types of memory-bound workloads, may take a more +unpredicatable amount of time to complete the migration if the amount of +memory tracked during each live migration iteration round cannot keep pace +with the rate of dirty memory produced by the workload. + +RDMA currently comes in two flavors: both Ethernet based (RoCE, or RDMA +over Converged Ethernet) as well as Infiniband-based. This implementation of +migration using RDMA is capable of using both technologies because of +the use of the OpenFabrics OFED software stack that abstracts out the +programming model irrespective of the underlying hardware. + +Refer to openfabrics.org or your respective RDMA hardware vendor for +an understanding on how to verify that you have the OFED software stack +installed in your environment. You should be able to successfully link +against the "librdmacm" and "libibverbs" libraries and development headers +for a working build of QEMU to run successfully using RDMA Migration. + +BEFORE RUNNING: +=============== + +Use of RDMA during migration requires pinning and registering memory +with the hardware. This means that memory must be physically resident +before the hardware can transmit that memory to another machine. +If this is not acceptable for your application or product, then the use +of RDMA migration may in fact be harmful to co-located VMs or other +software on the machine if there is not sufficient memory available to +relocate the entire footprint of the virtual machine. If so, then the +use of RDMA is discouraged and it is recommended to use standard TCP migration. + +Experimental: Next, decide if you want dynamic page registration. +For example, if you have an 8GB RAM virtual machine, but only 1GB +is in active use, then enabling this feature will cause all 8GB to +be pinned and resident in memory. This feature mostly affects the +bulk-phase round of the migration and can be enabled for extremely +high-performance RDMA hardware using the following command: + +QEMU Monitor Command: +$ migrate_set_capability rdma-pin-all on # disabled by default + +Performing this action will cause all 8GB to be pinned, so if that's +not what you want, then please ignore this step altogether. + +On the other hand, this will also significantly speed up the bulk round +of the migration, which can greatly reduce the "total" time of your migration. +Example performance of this using an idle VM in the previous example +can be found in the "Performance" section. + +Note: for very large virtual machines (hundreds of GBs), pinning all +*all* of the memory of your virtual machine in the kernel is very expensive +may extend the initial bulk iteration time by many seconds, +and thus extending the total migration time. However, this will not +affect the determinism or predictability of your migration you will +still gain from the benefits of advanced pinning with RDMA. + +RUNNING: +======== + +First, set the migration speed to match your hardware's capabilities: + +QEMU Monitor Command: +$ migrate_set_speed 40g # or whatever is the MAX of your RDMA device + +Next, on the destination machine, add the following to the QEMU command line: + +qemu ..... -incoming rdma:host:port + +Finally, perform the actual migration on the source machine: + +QEMU Monitor Command: +$ migrate -d rdma:host:port + +PERFORMANCE +=========== + +Here is a brief summary of total migration time and downtime using RDMA: +Using a 40gbps infiniband link performing a worst-case stress test, +using an 8GB RAM virtual machine: + +Using the following command: +$ apt-get install stress +$ stress --vm-bytes 7500M --vm 1 --vm-keep + +1. Migration throughput: 26 gigabits/second. +2. Downtime (stop time) varies between 15 and 100 milliseconds. + +EFFECTS of memory registration on bulk phase round: + +For example, in the same 8GB RAM example with all 8GB of memory in +active use and the VM itself is completely idle using the same 40 gbps +infiniband link: + +1. rdma-pin-all disabled total time: approximately 7.5 seconds @ 9.5 Gbps +2. rdma-pin-all enabled total time: approximately 4 seconds @ 26 Gbps + +These numbers would of course scale up to whatever size virtual machine +you have to migrate using RDMA. + +Enabling this feature does *not* have any measurable affect on +migration *downtime*. This is because, without this feature, all of the +memory will have already been registered already in advance during +the bulk round and does not need to be re-registered during the successive +iteration rounds. + +RDMA Protocol Description: +========================== + +Migration with RDMA is separated into two parts: + +1. The transmission of the pages using RDMA +2. Everything else (a control channel is introduced) + +"Everything else" is transmitted using a formal +protocol now, consisting of infiniband SEND messages. + +An infiniband SEND message is the standard ibverbs +message used by applications of infiniband hardware. +The only difference between a SEND message and an RDMA +message is that SEND messages cause notifications +to be posted to the completion queue (CQ) on the +infiniband receiver side, whereas RDMA messages (used +for VM's ram) do not (to behave like an actual DMA). + +Messages in infiniband require two things: + +1. registration of the memory that will be transmitted +2. (SEND only) work requests to be posted on both + sides of the network before the actual transmission + can occur. + +RDMA messages are much easier to deal with. Once the memory +on the receiver side is registered and pinned, we're +basically done. All that is required is for the sender +side to start dumping bytes onto the link. + +(Memory is not released from pinning until the migration +completes, given that RDMA migrations are very fast.) + +SEND messages require more coordination because the +receiver must have reserved space (using a receive +work request) on the receive queue (RQ) before QEMUFileRDMA +can start using them to carry all the bytes as +a control transport for migration of device state. + +To begin the migration, the initial connection setup is +as follows (migration-rdma.c): + +1. Receiver and Sender are started (command line or libvirt): +2. Both sides post two RQ work requests +3. Receiver does listen() +4. Sender does connect() +5. Receiver accept() +6. Check versioning and capabilities (described later) + +At this point, we define a control channel on top of SEND messages +which is described by a formal protocol. Each SEND message has a +header portion and a data portion (but together are transmitted +as a single SEND message). + +Header: + * Length (of the data portion, uint32, network byte order) + * Type (what command to perform, uint32, network byte order) + * Repeat (Number of commands in data portion, same type only) + +The 'Repeat' field is here to support future multiple page registrations +in a single message without any need to change the protocol itself +so that the protocol is compatible against multiple versions of QEMU. +Version #1 requires that all server implementations of the protocol must +check this field and register all requests found in the array of commands located +in the data portion and return an equal number of results in the response. +The maximum number of repeats is hard-coded to 4096. This is a conservative +limit based on the maximum size of a SEND message along with empirical +observations on the maximum future benefit of simultaneous page registrations. + +The 'type' field has 12 different command values: + 1. Unused + 2. Error (sent to the source during bad things) + 3. Ready (control-channel is available) + 4. QEMU File (for sending non-live device state) + 5. RAM Blocks request (used right after connection setup) + 6. RAM Blocks result (used right after connection setup) + 7. Compress page (zap zero page and skip registration) + 8. Register request (dynamic chunk registration) + 9. Register result ('rkey' to be used by sender) + 10. Register finished (registration for current iteration finished) + 11. Unregister request (unpin previously registered memory) + 12. Unregister finished (confirmation that unpin completed) + +A single control message, as hinted above, can contain within the data +portion an array of many commands of the same type. If there is more than +one command, then the 'repeat' field will be greater than 1. + +After connection setup, message 5 & 6 are used to exchange ram block +information and optionally pin all the memory if requested by the user. + +After ram block exchange is completed, we have two protocol-level +functions, responsible for communicating control-channel commands +using the above list of values: + +Logically: + +qemu_rdma_exchange_recv(header, expected command type) + +1. We transmit a READY command to let the sender know that + we are *ready* to receive some data bytes on the control channel. +2. Before attempting to receive the expected command, we post another + RQ work request to replace the one we just used up. +3. Block on a CQ event channel and wait for the SEND to arrive. +4. When the send arrives, librdmacm will unblock us. +5. Verify that the command-type and version received matches the one we expected. + +qemu_rdma_exchange_send(header, data, optional response header & data): + +1. Block on the CQ event channel waiting for a READY command + from the receiver to tell us that the receiver + is *ready* for us to transmit some new bytes. +2. Optionally: if we are expecting a response from the command + (that we have not yet transmitted), let's post an RQ + work request to receive that data a few moments later. +3. When the READY arrives, librdmacm will + unblock us and we immediately post a RQ work request + to replace the one we just used up. +4. Now, we can actually post the work request to SEND + the requested command type of the header we were asked for. +5. Optionally, if we are expecting a response (as before), + we block again and wait for that response using the additional + work request we previously posted. (This is used to carry + 'Register result' commands #6 back to the sender which + hold the rkey need to perform RDMA. Note that the virtual address + corresponding to this rkey was already exchanged at the beginning + of the connection (described below). + +All of the remaining command types (not including 'ready') +described above all use the aformentioned two functions to do the hard work: + +1. After connection setup, RAMBlock information is exchanged using + this protocol before the actual migration begins. This information includes + a description of each RAMBlock on the server side as well as the virtual addresses + and lengths of each RAMBlock. This is used by the client to determine the + start and stop locations of chunks and how to register them dynamically + before performing the RDMA operations. +2. During runtime, once a 'chunk' becomes full of pages ready to + be sent with RDMA, the registration commands are used to ask the + other side to register the memory for this chunk and respond + with the result (rkey) of the registration. +3. Also, the QEMUFile interfaces also call these functions (described below) + when transmitting non-live state, such as devices or to send + its own protocol information during the migration process. +4. Finally, zero pages are only checked if a page has not yet been registered + using chunk registration (or not checked at all and unconditionally + written if chunk registration is disabled. This is accomplished using + the "Compress" command listed above. If the page *has* been registered + then we check the entire chunk for zero. Only if the entire chunk is + zero, then we send a compress command to zap the page on the other side. + +Versioning and Capabilities +=========================== +Current version of the protocol is version #1. + +The same version applies to both for protocol traffic and capabilities +negotiation. (i.e. There is only one version number that is referred to +by all communication). + +librdmacm provides the user with a 'private data' area to be exchanged +at connection-setup time before any infiniband traffic is generated. + +Header: + * Version (protocol version validated before send/recv occurs), + uint32, network byte order + * Flags (bitwise OR of each capability), + uint32, network byte order + +There is no data portion of this header right now, so there is +no length field. The maximum size of the 'private data' section +is only 192 bytes per the Infiniband specification, so it's not +very useful for data anyway. This structure needs to remain small. + +This private data area is a convenient place to check for protocol +versioning because the user does not need to register memory to +transmit a few bytes of version information. + +This is also a convenient place to negotiate capabilities +(like dynamic page registration). + +If the version is invalid, we throw an error. + +If the version is new, we only negotiate the capabilities that the +requested version is able to perform and ignore the rest. + +Currently there is only one capability in Version #1: dynamic page registration + +Finally: Negotiation happens with the Flags field: If the primary-VM +sets a flag, but the destination does not support this capability, it +will return a zero-bit for that flag and the primary-VM will understand +that as not being an available capability and will thus disable that +capability on the primary-VM side. + +QEMUFileRDMA Interface: +======================= + +QEMUFileRDMA introduces a couple of new functions: + +1. qemu_rdma_get_buffer() (QEMUFileOps rdma_read_ops) +2. qemu_rdma_put_buffer() (QEMUFileOps rdma_write_ops) + +These two functions are very short and simply use the protocol +describe above to deliver bytes without changing the upper-level +users of QEMUFile that depend on a bytestream abstraction. + +Finally, how do we handoff the actual bytes to get_buffer()? + +Again, because we're trying to "fake" a bytestream abstraction +using an analogy not unlike individual UDP frames, we have +to hold on to the bytes received from control-channel's SEND +messages in memory. + +Each time we receive a complete "QEMU File" control-channel +message, the bytes from SEND are copied into a small local holding area. + +Then, we return the number of bytes requested by get_buffer() +and leave the remaining bytes in the holding area until get_buffer() +comes around for another pass. + +If the buffer is empty, then we follow the same steps +listed above and issue another "QEMU File" protocol command, +asking for a new SEND message to re-fill the buffer. + +Migration of VM's ram: +==================== + +At the beginning of the migration, (migration-rdma.c), +the sender and the receiver populate the list of RAMBlocks +to be registered with each other into a structure. +Then, using the aforementioned protocol, they exchange a +description of these blocks with each other, to be used later +during the iteration of main memory. This description includes +a list of all the RAMBlocks, their offsets and lengths, virtual +addresses and possibly includes pre-registered RDMA keys in case dynamic +page registration was disabled on the server-side, otherwise not. + +Main memory is not migrated with the aforementioned protocol, +but is instead migrated with normal RDMA Write operations. + +Pages are migrated in "chunks" (hard-coded to 1 Megabyte right now). +Chunk size is not dynamic, but it could be in a future implementation. +There's nothing to indicate that this is useful right now. + +When a chunk is full (or a flush() occurs), the memory backed by +the chunk is registered with librdmacm is pinned in memory on +both sides using the aforementioned protocol. +After pinning, an RDMA Write is generated and transmitted +for the entire chunk. + +Chunks are also transmitted in batches: This means that we +do not request that the hardware signal the completion queue +for the completion of *every* chunk. The current batch size +is about 64 chunks (corresponding to 64 MB of memory). +Only the last chunk in a batch must be signaled. +This helps keep everything as asynchronous as possible +and helps keep the hardware busy performing RDMA operations. + +Error-handling: +=============== + +Infiniband has what is called a "Reliable, Connected" +link (one of 4 choices). This is the mode in which +we use for RDMA migration. + +If a *single* message fails, +the decision is to abort the migration entirely and +cleanup all the RDMA descriptors and unregister all +the memory. + +After cleanup, the Virtual Machine is returned to normal +operation the same way that would happen if the TCP +socket is broken during a non-RDMA based migration. + +TODO: +===== +1. Currently, 'ulimit -l' mlock() limits as well as cgroups swap limits + are not compatible with infinband memory pinning and will result in + an aborted migration (but with the source VM left unaffected). +2. Use of the recent /proc//pagemap would likely speed up + the use of KSM and ballooning while using RDMA. +3. Also, some form of balloon-device usage tracking would also + help alleviate some issues. +4. Use LRU to provide more fine-grained direction of UNREGISTER + requests for unpinning memory in an overcommitted environment. +5. Expose UNREGISTER support to the user by way of workload-specific + hints about application behavior. diff --git a/qemu/docs/specs/acpi_cpu_hotplug.txt b/qemu/docs/specs/acpi_cpu_hotplug.txt new file mode 100644 index 00000000..340b751a --- /dev/null +++ b/qemu/docs/specs/acpi_cpu_hotplug.txt @@ -0,0 +1,24 @@ +QEMU<->ACPI BIOS CPU hotplug interface +-------------------------------------- + +QEMU supports CPU hotplug via ACPI. This document +describes the interface between QEMU and the ACPI BIOS. + +ACPI GPE block (IO ports 0xafe0-0xafe3, byte access): +----------------------------------------- + +Generic ACPI GPE block. Bit 2 (GPE.2) used to notify CPU +hot-add/remove event to ACPI BIOS, via SCI interrupt. + +CPU present bitmap for: + ICH9-LPC (IO port 0x0cd8-0xcf7, 1-byte access) + PIIX-PM (IO port 0xaf00-0xaf1f, 1-byte access) +--------------------------------------------------------------- +One bit per CPU. Bit position reflects corresponding CPU APIC ID. +Read-only. + +CPU hot-add/remove notification: +----------------------------------------------------- +QEMU sets/clears corresponding CPU bit on hot-add/remove event. +CPU present map read by ACPI BIOS GPE.2 handler to notify OS of CPU +hot-(un)plug events. diff --git a/qemu/docs/specs/acpi_mem_hotplug.txt b/qemu/docs/specs/acpi_mem_hotplug.txt new file mode 100644 index 00000000..12909940 --- /dev/null +++ b/qemu/docs/specs/acpi_mem_hotplug.txt @@ -0,0 +1,44 @@ +QEMU<->ACPI BIOS memory hotplug interface +-------------------------------------- + +ACPI BIOS GPE.3 handler is dedicated for notifying OS about memory hot-add +events. + +Memory hot-plug interface (IO port 0xa00-0xa17, 1-4 byte access): +--------------------------------------------------------------- +0xa00: + read access: + [0x0-0x3] Lo part of memory device phys address + [0x4-0x7] Hi part of memory device phys address + [0x8-0xb] Lo part of memory device size in bytes + [0xc-0xf] Hi part of memory device size in bytes + [0x10-0x13] Memory device proximity domain + [0x14] Memory device status fields + bits: + 0: Device is enabled and may be used by guest + 1: Device insert event, used to distinguish device for which + no device check event to OSPM was issued. + It's valid only when bit 1 is set. + 2-7: reserved and should be ignored by OSPM + [0x15-0x17] reserved + + write access: + [0x0-0x3] Memory device slot selector, selects active memory device. + All following accesses to other registers in 0xa00-0xa17 + region will read/store data from/to selected memory device. + [0x4-0x7] OST event code reported by OSPM + [0x8-0xb] OST status code reported by OSPM + [0xc-0x13] reserved, writes into it are ignored + [0x14] Memory device control fields + bits: + 0: reserved, OSPM must clear it before writing to register + 1: if set to 1 clears device insert event, set by OSPM + after it has emitted device check event for the + selected memory device + 2-7: reserved, OSPM must clear them before writing to register + +Selecting memory device slot beyond present range has no effect on platform: + - write accesses to memory hot-plug registers not documented above are + ignored + - read accesses to memory hot-plug registers not documented above return + all bits set to 1. diff --git a/qemu/docs/specs/acpi_pci_hotplug.txt b/qemu/docs/specs/acpi_pci_hotplug.txt new file mode 100644 index 00000000..a839434f --- /dev/null +++ b/qemu/docs/specs/acpi_pci_hotplug.txt @@ -0,0 +1,45 @@ +QEMU<->ACPI BIOS PCI hotplug interface +-------------------------------------- + +QEMU supports PCI hotplug via ACPI, for PCI bus 0. This document +describes the interface between QEMU and the ACPI BIOS. + +ACPI GPE block (IO ports 0xafe0-0xafe3, byte access): +----------------------------------------- + +Generic ACPI GPE block. Bit 1 (GPE.1) used to notify PCI hotplug/eject +event to ACPI BIOS, via SCI interrupt. + +PCI slot injection notification pending (IO port 0xae00-0xae03, 4-byte access): +--------------------------------------------------------------- +Slot injection notification pending. One bit per slot. + +Read by ACPI BIOS GPE.1 handler to notify OS of injection +events. Read-only. + +PCI slot removal notification (IO port 0xae04-0xae07, 4-byte access): +----------------------------------------------------- +Slot removal notification pending. One bit per slot. + +Read by ACPI BIOS GPE.1 handler to notify OS of removal +events. Read-only. + +PCI device eject (IO port 0xae08-0xae0b, 4-byte access): +---------------------------------------- + +Write: Used by ACPI BIOS _EJ0 method to request device removal. +One bit per slot. + +Read: Hotplug features register. Used by platform to identify features +available. Current base feature set (no bits set): + - Read-only "up" register @0xae00, 4-byte access, bit per slot + - Read-only "down" register @0xae04, 4-byte access, bit per slot + - Read/write "eject" register @0xae08, 4-byte access, + write: bit per slot eject, read: hotplug feature set + - Read-only hotplug capable register @0xae0c, 4-byte access, bit per slot + +PCI removability status (IO port 0xae0c-0xae0f, 4-byte access): +----------------------------------------------- + +Used by ACPI BIOS _RMV method to indicate removability status to OS. One +bit per slot. Read-only diff --git a/qemu/docs/specs/ivshmem_device_spec.txt b/qemu/docs/specs/ivshmem_device_spec.txt new file mode 100644 index 00000000..667a8628 --- /dev/null +++ b/qemu/docs/specs/ivshmem_device_spec.txt @@ -0,0 +1,96 @@ + +Device Specification for Inter-VM shared memory device +------------------------------------------------------ + +The Inter-VM shared memory device is designed to share a region of memory to +userspace in multiple virtual guests. The memory region does not belong to any +guest, but is a POSIX memory object on the host. Optionally, the device may +support sending interrupts to other guests sharing the same memory region. + + +The Inter-VM PCI device +----------------------- + +*BARs* + +The device supports three BARs. BAR0 is a 1 Kbyte MMIO region to support +registers. BAR1 is used for MSI-X when it is enabled in the device. BAR2 is +used to map the shared memory object from the host. The size of BAR2 is +specified when the guest is started and must be a power of 2 in size. + +*Registers* + +The device currently supports 4 registers of 32-bits each. Registers +are used for synchronization between guests sharing the same memory object when +interrupts are supported (this requires using the shared memory server). + +The server assigns each VM an ID number and sends this ID number to the QEMU +process when the guest starts. + +enum ivshmem_registers { + IntrMask = 0, + IntrStatus = 4, + IVPosition = 8, + Doorbell = 12 +}; + +The first two registers are the interrupt mask and status registers. Mask and +status are only used with pin-based interrupts. They are unused with MSI +interrupts. + +Status Register: The status register is set to 1 when an interrupt occurs. + +Mask Register: The mask register is bitwise ANDed with the interrupt status +and the result will raise an interrupt if it is non-zero. However, since 1 is +the only value the status will be set to, it is only the first bit of the mask +that has any effect. Therefore interrupts can be masked by setting the first +bit to 0 and unmasked by setting the first bit to 1. + +IVPosition Register: The IVPosition register is read-only and reports the +guest's ID number. The guest IDs are non-negative integers. When using the +server, since the server is a separate process, the VM ID will only be set when +the device is ready (shared memory is received from the server and accessible via +the device). If the device is not ready, the IVPosition will return -1. +Applications should ensure that they have a valid VM ID before accessing the +shared memory. + +Doorbell Register: To interrupt another guest, a guest must write to the +Doorbell register. The doorbell register is 32-bits, logically divided into +two 16-bit fields. The high 16-bits are the guest ID to interrupt and the low +16-bits are the interrupt vector to trigger. The semantics of the value +written to the doorbell depends on whether the device is using MSI or a regular +pin-based interrupt. In short, MSI uses vectors while regular interrupts set the +status register. + +Regular Interrupts + +If regular interrupts are used (due to either a guest not supporting MSI or the +user specifying not to use them on startup) then the value written to the lower +16-bits of the Doorbell register results is arbitrary and will trigger an +interrupt in the destination guest. + +Message Signalled Interrupts + +A ivshmem device may support multiple MSI vectors. If so, the lower 16-bits +written to the Doorbell register must be between 0 and the maximum number of +vectors the guest supports. The lower 16 bits written to the doorbell is the +MSI vector that will be raised in the destination guest. The number of MSI +vectors is configurable but it is set when the VM is started. + +The important thing to remember with MSI is that it is only a signal, no status +is set (since MSI interrupts are not shared). All information other than the +interrupt itself should be communicated via the shared memory region. Devices +supporting multiple MSI vectors can use different vectors to indicate different +events have occurred. The semantics of interrupt vectors are left to the +user's discretion. + + +Usage in the Guest +------------------ + +The shared memory device is intended to be used with the provided UIO driver. +Very little configuration is needed. The guest should map BAR0 to access the +registers (an array of 32-bit ints allows simple writing) and map BAR2 to +access the shared memory region itself. The size of the shared memory region +is specified when the guest (or shared memory server) is started. A guest may +map the whole shared memory region or only part of it. diff --git a/qemu/docs/specs/pci-ids.txt b/qemu/docs/specs/pci-ids.txt new file mode 100644 index 00000000..3c65e1a6 --- /dev/null +++ b/qemu/docs/specs/pci-ids.txt @@ -0,0 +1,50 @@ + +PCI IDs for qemu +================ + +Red Hat, Inc. donates a part of its device ID range to qemu, to be used for +virtual devices. The vendor IDs are 1af4 (formerly Qumranet ID) and 1b36. + +Contact Gerd Hoffmann to get a device ID assigned +for your devices. + +1af4 vendor ID +-------------- + +The 1000 -> 10ff device ID range is used as follows for virtio-pci devices. +Note that this allocation separate from the virtio device IDs, which are +maintained as part of the virtio specification. + +1af4:1000 network device +1af4:1001 block device +1af4:1002 balloon device +1af4:1003 console device +1af4:1004 SCSI host bus adapter device +1af4:1005 entropy generator device +1af4:1009 9p filesystem device + +1af4:10f0 Available for experimental usage without registration. Must get + to official ID when the code leaves the test lab (i.e. when seeking +1af4:10ff upstream merge or shipping a distro/product) to avoid conflicts. + +1af4:1100 Used as PCI Subsystem ID for existing hardware devices emulated + by qemu. + +1af4:1110 ivshmem device (shared memory, docs/specs/ivshmem_device_spec.txt) + +All other device IDs are reserved. + +1b36 vendor ID +-------------- + +The 0000 -> 00ff device ID range is used as follows for QEMU-specific +PCI devices (other than virtio): + +1b36:0001 PCI-PCI bridge +1b36:0002 PCI serial port (16550A) adapter (docs/specs/pci-serial.txt) +1b36:0003 PCI Dual-port 16550A adapter (docs/specs/pci-serial.txt) +1b36:0004 PCI Quad-port 16550A adapter (docs/specs/pci-serial.txt) + +All these devices are documented in docs/specs. + +The 0100 device ID is used for the QXL video card device. diff --git a/qemu/docs/specs/pci-serial.txt b/qemu/docs/specs/pci-serial.txt new file mode 100644 index 00000000..66c761f2 --- /dev/null +++ b/qemu/docs/specs/pci-serial.txt @@ -0,0 +1,34 @@ + +QEMU pci serial devices +======================= + +There is one single-port variant and two muliport-variants. Linux +guests out-of-the box with all cards. There is a Windows inf file +(docs/qemupciserial.inf) to setup the single-port card in Windows +guests. + + +single-port card +---------------- + +Name: pci-serial +PCI ID: 1b36:0002 + +PCI Region 0: + IO bar, 8 bytes long, with the 16550 uart mapped to it. + Interrupt is wired to pin A. + + +multiport cards +--------------- + +Name: pci-serial-2x +PCI ID: 1b36:0003 + +Name: pci-serial-4x +PCI ID: 1b36:0004 + +PCI Region 0: + IO bar, with two/four 16550 uart mapped after each other. + The first is at offset 0, second at offset 8, ... + Interrupt is wired to pin A. diff --git a/qemu/docs/specs/pci-testdev.txt b/qemu/docs/specs/pci-testdev.txt new file mode 100644 index 00000000..128ae222 --- /dev/null +++ b/qemu/docs/specs/pci-testdev.txt @@ -0,0 +1,26 @@ +pci-test is a device used for testing low level IO + +device implements up to two BARs: BAR0 and BAR1. +Each BAR can be memory or IO. Guests must detect +BAR type and act accordingly. + +Each BAR size is up to 4K bytes. +Each BAR starts with the following header: + +typedef struct PCITestDevHdr { + uint8_t test; <- write-only, starts a given test number + uint8_t width_type; <- read-only, type and width of access for a given test. + 1,2,4 for byte,word or long write. + any other value if test not supported on this BAR + uint8_t pad0[2]; + uint32_t offset; <- read-only, offset in this BAR for a given test + uint32_t data; <- read-only, data to use for a given test + uint32_t count; <- for debugging. number of writes detected. + uint8_t name[]; <- for debugging. 0-terminated ASCII string. +} PCITestDevHdr; + +All registers are little endian. + +device is expected to always implement tests 0 to N on each BAR, and to add new +tests with higher numbers. In this way a guest can scan test numbers until it +detects an access type that it does not support on this BAR, then stop. diff --git a/qemu/docs/specs/ppc-spapr-hcalls.txt b/qemu/docs/specs/ppc-spapr-hcalls.txt new file mode 100644 index 00000000..667b3fa0 --- /dev/null +++ b/qemu/docs/specs/ppc-spapr-hcalls.txt @@ -0,0 +1,78 @@ +When used with the "pseries" machine type, QEMU-system-ppc64 implements +a set of hypervisor calls using a subset of the server "PAPR" specification +(IBM internal at this point), which is also what IBM's proprietary hypervisor +adheres too. + +The subset is selected based on the requirements of Linux as a guest. + +In addition to those calls, we have added our own private hypervisor +calls which are mostly used as a private interface between the firmware +running in the guest and QEMU. + +All those hypercalls start at hcall number 0xf000 which correspond +to a implementation specific range in PAPR. + +- H_RTAS (0xf000) + +RTAS is a set of runtime services generally provided by the firmware +inside the guest to the operating system. It predates the existence +of hypervisors (it was originally an extension to Open Firmware) and +is still used by PAPR to provide various services that aren't performance +sensitive. + +We currently implement the RTAS services in QEMU itself. The actual RTAS +"firmware" blob in the guest is a small stub of a few instructions which +calls our private H_RTAS hypervisor call to pass the RTAS calls to QEMU. + +Arguments: + + r3 : H_RTAS (0xf000) + r4 : Guest physical address of RTAS parameter block + +Returns: + + H_SUCCESS : Successfully called the RTAS function (RTAS result + will have been stored in the parameter block) + H_PARAMETER : Unknown token + +- H_LOGICAL_MEMOP (0xf001) + +When the guest runs in "real mode" (in powerpc lingua this means +with MMU disabled, ie guest effective == guest physical), it only +has access to a subset of memory and no IOs. + +PAPR provides a set of hypervisor calls to perform cachable or +non-cachable accesses to any guest physical addresses that the +guest can use in order to access IO devices while in real mode. + +This is typically used by the firmware running in the guest. + +However, doing a hypercall for each access is extremely inefficient +(even more so when running KVM) when accessing the frame buffer. In +that case, things like scrolling become unusably slow. + +This hypercall allows the guest to request a "memory op" to be applied +to memory. The supported memory ops at this point are to copy a range +of memory (supports overlap of source and destination) and XOR which +is used by our SLOF firmware to invert the screen. + +Arguments: + + r3: H_LOGICAL_MEMOP (0xf001) + r4: Guest physical address of destination + r5: Guest physical address of source + r6: Individual element size + 0 = 1 byte + 1 = 2 bytes + 2 = 4 bytes + 3 = 8 bytes + r7: Number of elements + r8: Operation + 0 = copy + 1 = xor + +Returns: + + H_SUCCESS : Success + H_PARAMETER : Invalid argument + diff --git a/qemu/docs/specs/pvpanic.txt b/qemu/docs/specs/pvpanic.txt new file mode 100644 index 00000000..c7bbacc7 --- /dev/null +++ b/qemu/docs/specs/pvpanic.txt @@ -0,0 +1,39 @@ +PVPANIC DEVICE +============== + +pvpanic device is a simulated ISA device, through which a guest panic +event is sent to qemu, and a QMP event is generated. This allows +management apps (e.g. libvirt) to be notified and respond to the event. + +The management app has the option of waiting for GUEST_PANICKED events, +and/or polling for guest-panicked RunState, to learn when the pvpanic +device has fired a panic event. + +ISA Interface +------------- + +pvpanic exposes a single I/O port, by default 0x505. On read, the bits +recognized by the device are set. Software should ignore bits it doesn't +recognize. On write, the bits not recognized by the device are ignored. +Software should set only bits both itself and the device recognize. +Currently, only bit 0 is recognized, setting it indicates a guest panic +has happened. + +ACPI Interface +-------------- + +pvpanic device is defined with ACPI ID "QEMU0001". Custom methods: + +RDPT: To determine whether guest panic notification is supported. +Arguments: None +Return: Returns a byte, bit 0 set to indicate guest panic + notification is supported. Other bits are reserved and + should be ignored. + +WRPT: To send a guest panic event +Arguments: Arg0 is a byte, with bit 0 set to indicate guest panic has + happened. Other bits are reserved and should be cleared. +Return: None + +The ACPI device will automatically refer to the right port in case it +is modified. diff --git a/qemu/docs/specs/qcow2.txt b/qemu/docs/specs/qcow2.txt new file mode 100644 index 00000000..121dfc8c --- /dev/null +++ b/qemu/docs/specs/qcow2.txt @@ -0,0 +1,362 @@ +== General == + +A qcow2 image file is organized in units of constant size, which are called +(host) clusters. A cluster is the unit in which all allocations are done, +both for actual guest data and for image metadata. + +Likewise, the virtual disk as seen by the guest is divided into (guest) +clusters of the same size. + +All numbers in qcow2 are stored in Big Endian byte order. + + +== Header == + +The first cluster of a qcow2 image contains the file header: + + Byte 0 - 3: magic + QCOW magic string ("QFI\xfb") + + 4 - 7: version + Version number (valid values are 2 and 3) + + 8 - 15: backing_file_offset + Offset into the image file at which the backing file name + is stored (NB: The string is not null terminated). 0 if the + image doesn't have a backing file. + + 16 - 19: backing_file_size + Length of the backing file name in bytes. Must not be + longer than 1023 bytes. Undefined if the image doesn't have + a backing file. + + 20 - 23: cluster_bits + Number of bits that are used for addressing an offset + within a cluster (1 << cluster_bits is the cluster size). + Must not be less than 9 (i.e. 512 byte clusters). + + Note: qemu as of today has an implementation limit of 2 MB + as the maximum cluster size and won't be able to open images + with larger cluster sizes. + + 24 - 31: size + Virtual disk size in bytes + + 32 - 35: crypt_method + 0 for no encryption + 1 for AES encryption + + 36 - 39: l1_size + Number of entries in the active L1 table + + 40 - 47: l1_table_offset + Offset into the image file at which the active L1 table + starts. Must be aligned to a cluster boundary. + + 48 - 55: refcount_table_offset + Offset into the image file at which the refcount table + starts. Must be aligned to a cluster boundary. + + 56 - 59: refcount_table_clusters + Number of clusters that the refcount table occupies + + 60 - 63: nb_snapshots + Number of snapshots contained in the image + + 64 - 71: snapshots_offset + Offset into the image file at which the snapshot table + starts. Must be aligned to a cluster boundary. + +If the version is 3 or higher, the header has the following additional fields. +For version 2, the values are assumed to be zero, unless specified otherwise +in the description of a field. + + 72 - 79: incompatible_features + Bitmask of incompatible features. An implementation must + fail to open an image if an unknown bit is set. + + Bit 0: Dirty bit. If this bit is set then refcounts + may be inconsistent, make sure to scan L1/L2 + tables to repair refcounts before accessing the + image. + + Bit 1: Corrupt bit. If this bit is set then any data + structure may be corrupt and the image must not + be written to (unless for regaining + consistency). + + Bits 2-63: Reserved (set to 0) + + 80 - 87: compatible_features + Bitmask of compatible features. An implementation can + safely ignore any unknown bits that are set. + + Bit 0: Lazy refcounts bit. If this bit is set then + lazy refcount updates can be used. This means + marking the image file dirty and postponing + refcount metadata updates. + + Bits 1-63: Reserved (set to 0) + + 88 - 95: autoclear_features + Bitmask of auto-clear features. An implementation may only + write to an image with unknown auto-clear features if it + clears the respective bits from this field first. + + Bits 0-63: Reserved (set to 0) + + 96 - 99: refcount_order + Describes the width of a reference count block entry (width + in bits: refcount_bits = 1 << refcount_order). For version 2 + images, the order is always assumed to be 4 + (i.e. refcount_bits = 16). + This value may not exceed 6 (i.e. refcount_bits = 64). + + 100 - 103: header_length + Length of the header structure in bytes. For version 2 + images, the length is always assumed to be 72 bytes. + +Directly after the image header, optional sections called header extensions can +be stored. Each extension has a structure like the following: + + Byte 0 - 3: Header extension type: + 0x00000000 - End of the header extension area + 0xE2792ACA - Backing file format name + 0x6803f857 - Feature name table + other - Unknown header extension, can be safely + ignored + + 4 - 7: Length of the header extension data + + 8 - n: Header extension data + + n - m: Padding to round up the header extension size to the next + multiple of 8. + +Unless stated otherwise, each header extension type shall appear at most once +in the same image. + +If the image has a backing file then the backing file name should be stored in +the remaining space between the end of the header extension area and the end of +the first cluster. It is not allowed to store other data here, so that an +implementation can safely modify the header and add extensions without harming +data of compatible features that it doesn't support. Compatible features that +need space for additional data can use a header extension. + + +== Feature name table == + +The feature name table is an optional header extension that contains the name +for features used by the image. It can be used by applications that don't know +the respective feature (e.g. because the feature was introduced only later) to +display a useful error message. + +The number of entries in the feature name table is determined by the length of +the header extension data. Each entry look like this: + + Byte 0: Type of feature (select feature bitmap) + 0: Incompatible feature + 1: Compatible feature + 2: Autoclear feature + + 1: Bit number within the selected feature bitmap (valid + values: 0-63) + + 2 - 47: Feature name (padded with zeros, but not necessarily null + terminated if it has full length) + + +== Host cluster management == + +qcow2 manages the allocation of host clusters by maintaining a reference count +for each host cluster. A refcount of 0 means that the cluster is free, 1 means +that it is used, and >= 2 means that it is used and any write access must +perform a COW (copy on write) operation. + +The refcounts are managed in a two-level table. The first level is called +refcount table and has a variable size (which is stored in the header). The +refcount table can cover multiple clusters, however it needs to be contiguous +in the image file. + +It contains pointers to the second level structures which are called refcount +blocks and are exactly one cluster in size. + +Given a offset into the image file, the refcount of its cluster can be obtained +as follows: + + refcount_block_entries = (cluster_size * 8 / refcount_bits) + + refcount_block_index = (offset / cluster_size) % refcount_block_entries + refcount_table_index = (offset / cluster_size) / refcount_block_entries + + refcount_block = load_cluster(refcount_table[refcount_table_index]); + return refcount_block[refcount_block_index]; + +Refcount table entry: + + Bit 0 - 8: Reserved (set to 0) + + 9 - 63: Bits 9-63 of the offset into the image file at which the + refcount block starts. Must be aligned to a cluster + boundary. + + If this is 0, the corresponding refcount block has not yet + been allocated. All refcounts managed by this refcount block + are 0. + +Refcount block entry (x = refcount_bits - 1): + + Bit 0 - x: Reference count of the cluster. If refcount_bits implies a + sub-byte width, note that bit 0 means the least significant + bit in this context. + + +== Cluster mapping == + +Just as for refcounts, qcow2 uses a two-level structure for the mapping of +guest clusters to host clusters. They are called L1 and L2 table. + +The L1 table has a variable size (stored in the header) and may use multiple +clusters, however it must be contiguous in the image file. L2 tables are +exactly one cluster in size. + +Given a offset into the virtual disk, the offset into the image file can be +obtained as follows: + + l2_entries = (cluster_size / sizeof(uint64_t)) + + l2_index = (offset / cluster_size) % l2_entries + l1_index = (offset / cluster_size) / l2_entries + + l2_table = load_cluster(l1_table[l1_index]); + cluster_offset = l2_table[l2_index]; + + return cluster_offset + (offset % cluster_size) + +L1 table entry: + + Bit 0 - 8: Reserved (set to 0) + + 9 - 55: Bits 9-55 of the offset into the image file at which the L2 + table starts. Must be aligned to a cluster boundary. If the + offset is 0, the L2 table and all clusters described by this + L2 table are unallocated. + + 56 - 62: Reserved (set to 0) + + 63: 0 for an L2 table that is unused or requires COW, 1 if its + refcount is exactly one. This information is only accurate + in the active L1 table. + +L2 table entry: + + Bit 0 - 61: Cluster descriptor + + 62: 0 for standard clusters + 1 for compressed clusters + + 63: 0 for a cluster that is unused or requires COW, 1 if its + refcount is exactly one. This information is only accurate + in L2 tables that are reachable from the the active L1 + table. + +Standard Cluster Descriptor: + + Bit 0: If set to 1, the cluster reads as all zeros. The host + cluster offset can be used to describe a preallocation, + but it won't be used for reading data from this cluster, + nor is data read from the backing file if the cluster is + unallocated. + + With version 2, this is always 0. + + 1 - 8: Reserved (set to 0) + + 9 - 55: Bits 9-55 of host cluster offset. Must be aligned to a + cluster boundary. If the offset is 0, the cluster is + unallocated. + + 56 - 61: Reserved (set to 0) + + +Compressed Clusters Descriptor (x = 62 - (cluster_bits - 8)): + + Bit 0 - x: Host cluster offset. This is usually _not_ aligned to a + cluster boundary! + + x+1 - 61: Compressed size of the images in sectors of 512 bytes + +If a cluster is unallocated, read requests shall read the data from the backing +file (except if bit 0 in the Standard Cluster Descriptor is set). If there is +no backing file or the backing file is smaller than the image, they shall read +zeros for all parts that are not covered by the backing file. + + +== Snapshots == + +qcow2 supports internal snapshots. Their basic principle of operation is to +switch the active L1 table, so that a different set of host clusters are +exposed to the guest. + +When creating a snapshot, the L1 table should be copied and the refcount of all +L2 tables and clusters reachable from this L1 table must be increased, so that +a write causes a COW and isn't visible in other snapshots. + +When loading a snapshot, bit 63 of all entries in the new active L1 table and +all L2 tables referenced by it must be reconstructed from the refcount table +as it doesn't need to be accurate in inactive L1 tables. + +A directory of all snapshots is stored in the snapshot table, a contiguous area +in the image file, whose starting offset and length are given by the header +fields snapshots_offset and nb_snapshots. The entries of the snapshot table +have variable length, depending on the length of ID, name and extra data. + +Snapshot table entry: + + Byte 0 - 7: Offset into the image file at which the L1 table for the + snapshot starts. Must be aligned to a cluster boundary. + + 8 - 11: Number of entries in the L1 table of the snapshots + + 12 - 13: Length of the unique ID string describing the snapshot + + 14 - 15: Length of the name of the snapshot + + 16 - 19: Time at which the snapshot was taken in seconds since the + Epoch + + 20 - 23: Subsecond part of the time at which the snapshot was taken + in nanoseconds + + 24 - 31: Time that the guest was running until the snapshot was + taken in nanoseconds + + 32 - 35: Size of the VM state in bytes. 0 if no VM state is saved. + If there is VM state, it starts at the first cluster + described by first L1 table entry that doesn't describe a + regular guest cluster (i.e. VM state is stored like guest + disk content, except that it is stored at offsets that are + larger than the virtual disk presented to the guest) + + 36 - 39: Size of extra data in the table entry (used for future + extensions of the format) + + variable: Extra data for future extensions. Unknown fields must be + ignored. Currently defined are (offset relative to snapshot + table entry): + + Byte 40 - 47: Size of the VM state in bytes. 0 if no VM + state is saved. If this field is present, + the 32-bit value in bytes 32-35 is ignored. + + Byte 48 - 55: Virtual disk size of the snapshot in bytes + + Version 3 images must include extra data at least up to + byte 55. + + variable: Unique ID string for the snapshot (not null terminated) + + variable: Name of the snapshot (not null terminated) + + variable: Padding to round up the snapshot table entry size to the + next multiple of 8. diff --git a/qemu/docs/specs/qed_spec.txt b/qemu/docs/specs/qed_spec.txt new file mode 100644 index 00000000..7982e058 --- /dev/null +++ b/qemu/docs/specs/qed_spec.txt @@ -0,0 +1,138 @@ +=Specification= + +The file format looks like this: + + +----------+----------+----------+-----+ + | cluster0 | cluster1 | cluster2 | ... | + +----------+----------+----------+-----+ + +The first cluster begins with the '''header'''. The header contains information about where regular clusters start; this allows the header to be extensible and store extra information about the image file. A regular cluster may be a '''data cluster''', an '''L2''', or an '''L1 table'''. L1 and L2 tables are composed of one or more contiguous clusters. + +Normally the file size will be a multiple of the cluster size. If the file size is not a multiple, extra information after the last cluster may not be preserved if data is written. Legitimate extra information should use space between the header and the first regular cluster. + +All fields are little-endian. + +==Header== + Header { + uint32_t magic; /* QED\0 */ + + uint32_t cluster_size; /* in bytes */ + uint32_t table_size; /* for L1 and L2 tables, in clusters */ + uint32_t header_size; /* in clusters */ + + uint64_t features; /* format feature bits */ + uint64_t compat_features; /* compat feature bits */ + uint64_t autoclear_features; /* self-resetting feature bits */ + + uint64_t l1_table_offset; /* in bytes */ + uint64_t image_size; /* total logical image size, in bytes */ + + /* if (features & QED_F_BACKING_FILE) */ + uint32_t backing_filename_offset; /* in bytes from start of header */ + uint32_t backing_filename_size; /* in bytes */ + } + +Field descriptions: +* ''cluster_size'' must be a power of 2 in range [2^12, 2^26]. +* ''table_size'' must be a power of 2 in range [1, 16]. +* ''header_size'' is the number of clusters used by the header and any additional information stored before regular clusters. +* ''features'', ''compat_features'', and ''autoclear_features'' are file format extension bitmaps. They work as follows: +** An image with unknown ''features'' bits enabled must not be opened. File format changes that are not backwards-compatible must use ''features'' bits. +** An image with unknown ''compat_features'' bits enabled can be opened safely. The unknown features are simply ignored and represent backwards-compatible changes to the file format. +** An image with unknown ''autoclear_features'' bits enable can be opened safely after clearing the unknown bits. This allows for backwards-compatible changes to the file format which degrade gracefully and can be re-enabled again by a new program later. +* ''l1_table_offset'' is the offset of the first byte of the L1 table in the image file and must be a multiple of ''cluster_size''. +* ''image_size'' is the block device size seen by the guest and must be a multiple of 512 bytes. +* ''backing_filename_offset'' and ''backing_filename_size'' describe a string in (byte offset, byte size) form. It is not NUL-terminated and has no alignment constraints. The string must be stored within the first ''header_size'' clusters. The backing filename may be an absolute path or relative to the image file. + +Feature bits: +* QED_F_BACKING_FILE = 0x01. The image uses a backing file. +* QED_F_NEED_CHECK = 0x02. The image needs a consistency check before use. +* QED_F_BACKING_FORMAT_NO_PROBE = 0x04. The backing file is a raw disk image and no file format autodetection should be attempted. This should be used to ensure that raw backing files are never detected as an image format if they happen to contain magic constants. + +There are currently no defined ''compat_features'' or ''autoclear_features'' bits. + +Fields predicated on a feature bit are only used when that feature is set. The fields always take up header space, regardless of whether or not the feature bit is set. + +==Tables== + +Tables provide the translation from logical offsets in the block device to cluster offsets in the file. + + #define TABLE_NOFFSETS (table_size * cluster_size / sizeof(uint64_t)) + + Table { + uint64_t offsets[TABLE_NOFFSETS]; + } + +The tables are organized as follows: + + +----------+ + | L1 table | + +----------+ + ,------' | '------. + +----------+ | +----------+ + | L2 table | ... | L2 table | + +----------+ +----------+ + ,------' | '------. + +----------+ | +----------+ + | Data | ... | Data | + +----------+ +----------+ + +A table is made up of one or more contiguous clusters. The table_size header field determines table size for an image file. For example, cluster_size=64 KB and table_size=4 results in 256 KB tables. + +The logical image size must be less than or equal to the maximum possible size of clusters rooted by the L1 table: + header.image_size <= TABLE_NOFFSETS * TABLE_NOFFSETS * header.cluster_size + +L1, L2, and data cluster offsets must be aligned to header.cluster_size. The following offsets have special meanings: + +===L2 table offsets=== +* 0 - unallocated. The L2 table is not yet allocated. + +===Data cluster offsets=== +* 0 - unallocated. The data cluster is not yet allocated. +* 1 - zero. The data cluster contents are all zeroes and no cluster is allocated. + +Future format extensions may wish to store per-offset information. The least significant 12 bits of an offset are reserved for this purpose and must be set to zero. Image files with cluster_size > 2^12 will have more unused bits which should also be zeroed. + +===Unallocated L2 tables and data clusters=== +Reads to an unallocated area of the image file access the backing file. If there is no backing file, then zeroes are produced. The backing file may be smaller than the image file and reads of unallocated areas beyond the end of the backing file produce zeroes. + +Writes to an unallocated area cause a new data clusters to be allocated, and a new L2 table if that is also unallocated. The new data cluster is populated with data from the backing file (or zeroes if no backing file) and the data being written. + +===Zero data clusters=== +Zero data clusters are a space-efficient way of storing zeroed regions of the image. + +Reads to a zero data cluster produce zeroes. Note that the difference between an unallocated and a zero data cluster is that zero data clusters stop the reading of contents from the backing file. + +Writes to a zero data cluster cause a new data cluster to be allocated. The new data cluster is populated with zeroes and the data being written. + +===Logical offset translation=== +Logical offsets are translated into cluster offsets as follows: + + table_bits table_bits cluster_bits + <--------> <--------> <---------------> + +----------+----------+-----------------+ + | L1 index | L2 index | byte offset | + +----------+----------+-----------------+ + + Structure of a logical offset + + offset_mask = ~(cluster_size - 1) # mask for the image file byte offset + + def logical_to_cluster_offset(l1_index, l2_index, byte_offset): + l2_offset = l1_table[l1_index] + l2_table = load_table(l2_offset) + cluster_offset = l2_table[l2_index] & offset_mask + return cluster_offset + byte_offset + +==Consistency checking== + +This section is informational and included to provide background on the use of the QED_F_NEED_CHECK ''features'' bit. + +The QED_F_NEED_CHECK bit is used to mark an image as dirty before starting an operation that could leave the image in an inconsistent state if interrupted by a crash or power failure. A dirty image must be checked on open because its metadata may not be consistent. + +Consistency check includes the following invariants: +# Each cluster is referenced once and only once. It is an inconsistency to have a cluster referenced more than once by L1 or L2 tables. A cluster has been leaked if it has no references. +# Offsets must be within the image file size and must be ''cluster_size'' aligned. +# Table offsets must at least ''table_size'' * ''cluster_size'' bytes from the end of the image file so that there is space for the entire table. + +The consistency check process starts by from ''l1_table_offset'' and scans all L2 tables. After the check completes with no other errors besides leaks, the QED_F_NEED_CHECK bit can be cleared and the image can be accessed. diff --git a/qemu/docs/specs/standard-vga.txt b/qemu/docs/specs/standard-vga.txt new file mode 100644 index 00000000..19d2a745 --- /dev/null +++ b/qemu/docs/specs/standard-vga.txt @@ -0,0 +1,81 @@ + +QEMU Standard VGA +================= + +Exists in two variants, for isa and pci. + +command line switches: + -vga std [ picks isa for -M isapc, otherwise pci ] + -device VGA [ pci variant ] + -device isa-vga [ isa variant ] + -device secondary-vga [ legacy-free pci variant ] + + +PCI spec +-------- + +Applies to the pci variant only for obvious reasons. + +PCI ID: 1234:1111 + +PCI Region 0: + Framebuffer memory, 16 MB in size (by default). + Size is tunable via vga_mem_mb property. + +PCI Region 1: + Reserved (so we have the option to make the framebuffer bar 64bit). + +PCI Region 2: + MMIO bar, 4096 bytes in size (qemu 1.3+) + +PCI ROM Region: + Holds the vgabios (qemu 0.14+). + + +The legacy-free variant has no ROM and has PCI_CLASS_DISPLAY_OTHER +instead of PCI_CLASS_DISPLAY_VGA. + + +IO ports used +------------- + +Doesn't apply to the legacy-free pci variant, use the MMIO bar instead. + +03c0 - 03df : standard vga ports +01ce : bochs vbe interface index port +01cf : bochs vbe interface data port (x86 only) +01d0 : bochs vbe interface data port + + +Memory regions used +------------------- + +0xe0000000 : Framebuffer memory, isa variant only. + +The pci variant used to mirror the framebuffer bar here, qemu 0.14+ +stops doing that (except when in -M pc-$old compat mode). + + +MMIO area spec +-------------- + +Likewise applies to the pci variant only for obvious reasons. + +0000 - 03ff : reserved, for possible virtio extension. +0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1. + word access is supported, bytes are written + in little endia order (aka index port first), + so indexed registers can be updated with a + single mmio write (and thus only one vmexit). +0500 - 0515 : bochs dispi interface registers, mapped flat + without index/data ports. Use (index << 1) + as offset for (16bit) register access. + +0600 - 0607 : qemu extended registers. qemu 2.2+ only. + The pci revision is 2 (or greater) when + these registers are present. The registers + are 32bit. + 0600 : qemu extended register region size, in bytes. + 0604 : framebuffer endianness register. + - 0xbebebebe indicates big endian. + - 0x1e1e1e1e indicates little endian. diff --git a/qemu/docs/specs/vhost-user.txt b/qemu/docs/specs/vhost-user.txt new file mode 100644 index 00000000..650bb181 --- /dev/null +++ b/qemu/docs/specs/vhost-user.txt @@ -0,0 +1,266 @@ +Vhost-user Protocol +=================== + +Copyright (c) 2014 Virtual Open Systems Sarl. + +This work is licensed under the terms of the GNU GPL, version 2 or later. +See the COPYING file in the top-level directory. +=================== + +This protocol is aiming to complement the ioctl interface used to control the +vhost implementation in the Linux kernel. It implements the control plane needed +to establish virtqueue sharing with a user space process on the same host. It +uses communication over a Unix domain socket to share file descriptors in the +ancillary data of the message. + +The protocol defines 2 sides of the communication, master and slave. Master is +the application that shares its virtqueues, in our case QEMU. Slave is the +consumer of the virtqueues. + +In the current implementation QEMU is the Master, and the Slave is intended to +be a software Ethernet switch running in user space, such as Snabbswitch. + +Master and slave can be either a client (i.e. connecting) or server (listening) +in the socket communication. + +Message Specification +--------------------- + +Note that all numbers are in the machine native byte order. A vhost-user message +consists of 3 header fields and a payload: + +------------------------------------ +| request | flags | size | payload | +------------------------------------ + + * Request: 32-bit type of the request + * Flags: 32-bit bit field: + - Lower 2 bits are the version (currently 0x01) + - Bit 2 is the reply flag - needs to be sent on each reply from the slave + * Size - 32-bit size of the payload + + +Depending on the request type, payload can be: + + * A single 64-bit integer + ------- + | u64 | + ------- + + u64: a 64-bit unsigned integer + + * A vring state description + --------------- + | index | num | + --------------- + + Index: a 32-bit index + Num: a 32-bit number + + * A vring address description + -------------------------------------------------------------- + | index | flags | size | descriptor | used | available | log | + -------------------------------------------------------------- + + Index: a 32-bit vring index + Flags: a 32-bit vring flags + Descriptor: a 64-bit user address of the vring descriptor table + Used: a 64-bit user address of the vring used ring + Available: a 64-bit user address of the vring available ring + Log: a 64-bit guest address for logging + + * Memory regions description + --------------------------------------------------- + | num regions | padding | region0 | ... | region7 | + --------------------------------------------------- + + Num regions: a 32-bit number of regions + Padding: 32-bit + + A region is: + ----------------------------------------------------- + | guest address | size | user address | mmap offset | + ----------------------------------------------------- + + Guest address: a 64-bit guest address of the region + Size: a 64-bit size + User address: a 64-bit user address + mmap offset: 64-bit offset where region starts in the mapped memory + +In QEMU the vhost-user message is implemented with the following struct: + +typedef struct VhostUserMsg { + VhostUserRequest request; + uint32_t flags; + uint32_t size; + union { + uint64_t u64; + struct vhost_vring_state state; + struct vhost_vring_addr addr; + VhostUserMemory memory; + }; +} QEMU_PACKED VhostUserMsg; + +Communication +------------- + +The protocol for vhost-user is based on the existing implementation of vhost +for the Linux Kernel. Most messages that can be sent via the Unix domain socket +implementing vhost-user have an equivalent ioctl to the kernel implementation. + +The communication consists of master sending message requests and slave sending +message replies. Most of the requests don't require replies. Here is a list of +the ones that do: + + * VHOST_GET_FEATURES + * VHOST_GET_VRING_BASE + +There are several messages that the master sends with file descriptors passed +in the ancillary data: + + * VHOST_SET_MEM_TABLE + * VHOST_SET_LOG_FD + * VHOST_SET_VRING_KICK + * VHOST_SET_VRING_CALL + * VHOST_SET_VRING_ERR + +If Master is unable to send the full message or receives a wrong reply it will +close the connection. An optional reconnection mechanism can be implemented. + +Message types +------------- + + * VHOST_USER_GET_FEATURES + + Id: 1 + Equivalent ioctl: VHOST_GET_FEATURES + Master payload: N/A + Slave payload: u64 + + Get from the underlying vhost implementation the features bitmask. + + * VHOST_USER_SET_FEATURES + + Id: 2 + Ioctl: VHOST_SET_FEATURES + Master payload: u64 + + Enable features in the underlying vhost implementation using a bitmask. + + * VHOST_USER_SET_OWNER + + Id: 3 + Equivalent ioctl: VHOST_SET_OWNER + Master payload: N/A + + Issued when a new connection is established. It sets the current Master + as an owner of the session. This can be used on the Slave as a + "session start" flag. + + * VHOST_USER_RESET_OWNER + + Id: 4 + Equivalent ioctl: VHOST_RESET_OWNER + Master payload: N/A + + Issued when a new connection is about to be closed. The Master will no + longer own this connection (and will usually close it). + + * VHOST_USER_SET_MEM_TABLE + + Id: 5 + Equivalent ioctl: VHOST_SET_MEM_TABLE + Master payload: memory regions description + + Sets the memory map regions on the slave so it can translate the vring + addresses. In the ancillary data there is an array of file descriptors + for each memory mapped region. The size and ordering of the fds matches + the number and ordering of memory regions. + + * VHOST_USER_SET_LOG_BASE + + Id: 6 + Equivalent ioctl: VHOST_SET_LOG_BASE + Master payload: u64 + + Sets the logging base address. + + * VHOST_USER_SET_LOG_FD + + Id: 7 + Equivalent ioctl: VHOST_SET_LOG_FD + Master payload: N/A + + Sets the logging file descriptor, which is passed as ancillary data. + + * VHOST_USER_SET_VRING_NUM + + Id: 8 + Equivalent ioctl: VHOST_SET_VRING_NUM + Master payload: vring state description + + Sets the number of vrings for this owner. + + * VHOST_USER_SET_VRING_ADDR + + Id: 9 + Equivalent ioctl: VHOST_SET_VRING_ADDR + Master payload: vring address description + Slave payload: N/A + + Sets the addresses of the different aspects of the vring. + + * VHOST_USER_SET_VRING_BASE + + Id: 10 + Equivalent ioctl: VHOST_SET_VRING_BASE + Master payload: vring state description + + Sets the base offset in the available vring. + + * VHOST_USER_GET_VRING_BASE + + Id: 11 + Equivalent ioctl: VHOST_USER_GET_VRING_BASE + Master payload: vring state description + Slave payload: vring state description + + Get the available vring base offset. + + * VHOST_USER_SET_VRING_KICK + + Id: 12 + Equivalent ioctl: VHOST_SET_VRING_KICK + Master payload: u64 + + Set the event file descriptor for adding buffers to the vring. It + is passed in the ancillary data. + Bits (0-7) of the payload contain the vring index. Bit 8 is the + invalid FD flag. This flag is set when there is no file descriptor + in the ancillary data. This signals that polling should be used + instead of waiting for a kick. + + * VHOST_USER_SET_VRING_CALL + + Id: 13 + Equivalent ioctl: VHOST_SET_VRING_CALL + Master payload: u64 + + Set the event file descriptor to signal when buffers are used. It + is passed in the ancillary data. + Bits (0-7) of the payload contain the vring index. Bit 8 is the + invalid FD flag. This flag is set when there is no file descriptor + in the ancillary data. This signals that polling will be used + instead of waiting for the call. + + * VHOST_USER_SET_VRING_ERR + + Id: 14 + Equivalent ioctl: VHOST_SET_VRING_ERR + Master payload: u64 + + Set the event file descriptor to signal when error occurs. It + is passed in the ancillary data. + Bits (0-7) of the payload contain the vring index. Bit 8 is the + invalid FD flag. This flag is set when there is no file descriptor + in the ancillary data. diff --git a/qemu/docs/specs/vmw_pvscsi-spec.txt b/qemu/docs/specs/vmw_pvscsi-spec.txt new file mode 100644 index 00000000..49affb2a --- /dev/null +++ b/qemu/docs/specs/vmw_pvscsi-spec.txt @@ -0,0 +1,92 @@ +General Description +=================== + +This document describes VMWare PVSCSI device interface specification. +Created by Dmitry Fleytman (dmitry@daynix.com), Daynix Computing LTD. +Based on source code of PVSCSI Linux driver from kernel 3.0.4 + +PVSCSI Device Interface Overview +================================ + +The interface is based on memory area shared between hypervisor and VM. +Memory area is obtained by driver as device IO memory resource of +PVSCSI_MEM_SPACE_SIZE length. +The shared memory consists of registers area and rings area. +The registers area is used to raise hypervisor interrupts and issue device +commands. The rings area is used to transfer data descriptors and SCSI +commands from VM to hypervisor and to transfer messages produced by +hypervisor to VM. Data itself is transferred via virtual scatter-gather DMA. + +PVSCSI Device Registers +======================= + +The length of the registers area is 1 page (PVSCSI_MEM_SPACE_COMMAND_NUM_PAGES). +The structure of the registers area is described by the PVSCSIRegOffset enum. +There are registers to issue device command (with optional short data), +issue device interrupt, control interrupts masking. + +PVSCSI Device Rings +=================== + +There are three rings in shared memory: + + 1. Request ring (struct PVSCSIRingReqDesc *req_ring) + - ring for OS to device requests + 2. Completion ring (struct PVSCSIRingCmpDesc *cmp_ring) + - ring for device request completions + 3. Message ring (struct PVSCSIRingMsgDesc *msg_ring) + - ring for messages from device. + This ring is optional and the guest might not configure it. +There is a control area (struct PVSCSIRingsState *rings_state) used to control +rings operation. + +PVSCSI Device to Host Interrupts +================================ +There are following interrupt types supported by PVSCSI device: + 1. Completion interrupts (completion ring notifications): + PVSCSI_INTR_CMPL_0 + PVSCSI_INTR_CMPL_1 + 2. Message interrupts (message ring notifications): + PVSCSI_INTR_MSG_0 + PVSCSI_INTR_MSG_1 + +Interrupts are controlled via PVSCSI_REG_OFFSET_INTR_MASK register +Bit set means interrupt enabled, bit cleared - disabled + +Interrupt modes supported are legacy, MSI and MSI-X +In case of legacy interrupts, register PVSCSI_REG_OFFSET_INTR_STATUS +is used to check which interrupt has arrived. Interrupts are +acknowledged when the corresponding bit is written to the interrupt +status register. + +PVSCSI Device Operation Sequences +================================= + +1. Startup sequence: + a. Issue PVSCSI_CMD_ADAPTER_RESET command; + aa. Windows driver reads interrupt status register here; + b. Issue PVSCSI_CMD_SETUP_MSG_RING command with no additional data, + check status and disable device messages if error returned; + (Omitted if device messages disabled by driver configuration) + c. Issue PVSCSI_CMD_SETUP_RINGS command, provide rings configuration + as struct PVSCSICmdDescSetupRings; + d. Issue PVSCSI_CMD_SETUP_MSG_RING command again, provide + rings configuration as struct PVSCSICmdDescSetupMsgRing; + e. Unmask completion and message (if device messages enabled) interrupts. + +2. Shutdown sequences + a. Mask interrupts; + b. Flush request ring using PVSCSI_REG_OFFSET_KICK_NON_RW_IO; + c. Issue PVSCSI_CMD_ADAPTER_RESET command. + +3. Send request + a. Fill next free request ring descriptor; + b. Issue PVSCSI_REG_OFFSET_KICK_RW_IO for R/W operations; + or PVSCSI_REG_OFFSET_KICK_NON_RW_IO for other operations. + +4. Abort command + a. Issue PVSCSI_CMD_ABORT_CMD command; + +5. Request completion processing + a. Upon completion interrupt arrival process completion + and message (if enabled) rings. diff --git a/qemu/docs/spice-port-fqdn.txt b/qemu/docs/spice-port-fqdn.txt new file mode 100644 index 00000000..50778952 --- /dev/null +++ b/qemu/docs/spice-port-fqdn.txt @@ -0,0 +1,19 @@ +A Spice port channel is an arbitrary communication between the Spice +server host side and the client side. + +Thanks to the associated reverse fully qualified domain name (fqdn), +a Spice client can handle the various ports appropriately. + +The following fqdn names are reserved by the QEMU project: + +org.qemu.monitor.hmp.0 + QEMU human monitor + +org.qemu.monitor.qmp.0: + QEMU control monitor + +org.qemu.console.serial.0 + QEMU virtual serial port + +org.qemu.console.debug.0 + QEMU debug console diff --git a/qemu/docs/tracing.txt b/qemu/docs/tracing.txt new file mode 100644 index 00000000..7117c5e7 --- /dev/null +++ b/qemu/docs/tracing.txt @@ -0,0 +1,349 @@ += Tracing = + +== Introduction == + +This document describes the tracing infrastructure in QEMU and how to use it +for debugging, profiling, and observing execution. + +== Quickstart == + +1. Build with the 'simple' trace backend: + + ./configure --enable-trace-backends=simple + make + +2. Create a file with the events you want to trace: + + echo bdrv_aio_readv > /tmp/events + echo bdrv_aio_writev >> /tmp/events + +3. Run the virtual machine to produce a trace file: + + qemu -trace events=/tmp/events ... # your normal QEMU invocation + +4. Pretty-print the binary trace file: + + ./scripts/simpletrace.py trace-events trace-* # Override * with QEMU + +== Trace events == + +There is a set of static trace events declared in the "trace-events" source +file. Each trace event declaration names the event, its arguments, and the +format string which can be used for pretty-printing: + + qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" + qemu_vfree(void *ptr) "ptr %p" + +The "trace-events" file is processed by the "tracetool" script during build to +generate code for the trace events. Trace events are invoked directly from +source code like this: + + #include "trace.h" /* needed for trace event prototype */ + + void *qemu_vmalloc(size_t size) + { + void *ptr; + size_t align = QEMU_VMALLOC_ALIGN; + + if (size < align) { + align = getpagesize(); + } + ptr = qemu_memalign(align, size); + trace_qemu_vmalloc(size, ptr); + return ptr; + } + +=== Declaring trace events === + +The "tracetool" script produces the trace.h header file which is included by +every source file that uses trace events. Since many source files include +trace.h, it uses a minimum of types and other header files included to keep the +namespace clean and compile times and dependencies down. + +Trace events should use types as follows: + + * Use stdint.h types for fixed-size types. Most offsets and guest memory + addresses are best represented with uint32_t or uint64_t. Use fixed-size + types over primitive types whose size may change depending on the host + (32-bit versus 64-bit) so trace events don't truncate values or break + the build. + + * Use void * for pointers to structs or for arrays. The trace.h header + cannot include all user-defined struct declarations and it is therefore + necessary to use void * for pointers to structs. + + * For everything else, use primitive scalar types (char, int, long) with the + appropriate signedness. + +Format strings should reflect the types defined in the trace event. Take +special care to use PRId64 and PRIu64 for int64_t and uint64_t types, +respectively. This ensures portability between 32- and 64-bit platforms. + +=== Hints for adding new trace events === + +1. Trace state changes in the code. Interesting points in the code usually + involve a state change like starting, stopping, allocating, freeing. State + changes are good trace events because they can be used to understand the + execution of the system. + +2. Trace guest operations. Guest I/O accesses like reading device registers + are good trace events because they can be used to understand guest + interactions. + +3. Use correlator fields so the context of an individual line of trace output + can be understood. For example, trace the pointer returned by malloc and + used as an argument to free. This way mallocs and frees can be matched up. + Trace events with no context are not very useful. + +4. Name trace events after their function. If there are multiple trace events + in one function, append a unique distinguisher at the end of the name. + +== Generic interface and monitor commands == + +You can programmatically query and control the state of trace events through a +backend-agnostic interface provided by the header "trace/control.h". + +Note that some of the backends do not provide an implementation for some parts +of this interface, in which case QEMU will just print a warning (please refer to +header "trace/control.h" to see which routines are backend-dependent). + +The state of events can also be queried and modified through monitor commands: + +* info trace-events + View available trace events and their state. State 1 means enabled, state 0 + means disabled. + +* trace-event NAME on|off + Enable/disable a given trace event or a group of events (using wildcards). + +The "-trace events=" command line argument can be used to enable the +events listed in from the very beginning of the program. This file must +contain one event name per line. + +If a line in the "-trace events=" file begins with a '-', the trace event +will be disabled instead of enabled. This is useful when a wildcard was used +to enable an entire family of events but one noisy event needs to be disabled. + +Wildcard matching is supported in both the monitor command "trace-event" and the +events list file. That means you can enable/disable the events having a common +prefix in a batch. For example, virtio-blk trace events could be enabled using +the following monitor command: + + trace-event virtio_blk_* on + +== Trace backends == + +The "tracetool" script automates tedious trace event code generation and also +keeps the trace event declarations independent of the trace backend. The trace +events are not tightly coupled to a specific trace backend, such as LTTng or +SystemTap. Support for trace backends can be added by extending the "tracetool" +script. + +The trace backends are chosen at configure time: + + ./configure --enable-trace-backends=simple + +For a list of supported trace backends, try ./configure --help or see below. +If multiple backends are enabled, the trace is sent to them all. + +The following subsections describe the supported trace backends. + +=== Nop === + +The "nop" backend generates empty trace event functions so that the compiler +can optimize out trace events completely. This is the default and imposes no +performance penalty. + +Note that regardless of the selected trace backend, events with the "disable" +property will be generated with the "nop" backend. + +=== Stderr === + +The "stderr" backend sends trace events directly to standard error. This +effectively turns trace events into debug printfs. + +This is the simplest backend and can be used together with existing code that +uses DPRINTF(). + +=== Simpletrace === + +The "simple" backend supports common use cases and comes as part of the QEMU +source tree. It may not be as powerful as platform-specific or third-party +trace backends but it is portable. This is the recommended trace backend +unless you have specific needs for more advanced backends. + +The "simple" backend currently does not capture string arguments, it simply +records the char* pointer value instead of the string that is pointed to. + +=== Ftrace === + +The "ftrace" backend writes trace data to ftrace marker. This effectively +sends trace events to ftrace ring buffer, and you can compare qemu trace +data and kernel(especially kvm.ko when using KVM) trace data. + +if you use KVM, enable kvm events in ftrace: + + # echo 1 > /sys/kernel/debug/tracing/events/kvm/enable + +After running qemu by root user, you can get the trace: + + # cat /sys/kernel/debug/tracing/trace + +Restriction: "ftrace" backend is restricted to Linux only. + +==== Monitor commands ==== + +* trace-file on|off|flush|set + Enable/disable/flush the trace file or set the trace file name. + +==== Analyzing trace files ==== + +The "simple" backend produces binary trace files that can be formatted with the +simpletrace.py script. The script takes the "trace-events" file and the binary +trace: + + ./scripts/simpletrace.py trace-events trace-12345 + +You must ensure that the same "trace-events" file was used to build QEMU, +otherwise trace event declarations may have changed and output will not be +consistent. + +=== LTTng Userspace Tracer === + +The "ust" backend uses the LTTng Userspace Tracer library. There are no +monitor commands built into QEMU, instead UST utilities should be used to list, +enable/disable, and dump traces. + +Package lttng-tools is required for userspace tracing. You must ensure that the +current user belongs to the "tracing" group, or manually launch the +lttng-sessiond daemon for the current user prior to running any instance of +QEMU. + +While running an instrumented QEMU, LTTng should be able to list all available +events: + + lttng list -u + +Create tracing session: + + lttng create mysession + +Enable events: + + lttng enable-event qemu:g_malloc -u + +Where the events can either be a comma-separated list of events, or "-a" to +enable all tracepoint events. Start and stop tracing as needed: + + lttng start + lttng stop + +View the trace: + + lttng view + +Destroy tracing session: + + lttng destroy + +Babeltrace can be used at any later time to view the trace: + + babeltrace $HOME/lttng-traces/mysession--