diff --git a/qemu/aarch64.h b/qemu/aarch64.h
index 253205a3..da2ea8fb 100644
--- a/qemu/aarch64.h
+++ b/qemu/aarch64.h
@@ -3291,6 +3291,7 @@
 #define arm_reset_cpu arm_reset_cpu_aarch64
 #define arm_set_cpu_off arm_set_cpu_off_aarch64
 #define arm_set_cpu_on arm_set_cpu_on_aarch64
+#define arm_stage1_mmu_idx arm_stage1_mmu_idx_aarch64
 #define bif_op bif_op_aarch64
 #define bit_op bit_op_aarch64
 #define bsl_op bsl_op_aarch64
diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h
index dbd908a3..53824139 100644
--- a/qemu/aarch64eb.h
+++ b/qemu/aarch64eb.h
@@ -3291,6 +3291,7 @@
 #define arm_reset_cpu arm_reset_cpu_aarch64eb
 #define arm_set_cpu_off arm_set_cpu_off_aarch64eb
 #define arm_set_cpu_on arm_set_cpu_on_aarch64eb
+#define arm_stage1_mmu_idx arm_stage1_mmu_idx_aarch64eb
 #define bif_op bif_op_aarch64eb
 #define bit_op bit_op_aarch64eb
 #define bsl_op bsl_op_aarch64eb
diff --git a/qemu/arm.h b/qemu/arm.h
index 04a80391..f4692068 100644
--- a/qemu/arm.h
+++ b/qemu/arm.h
@@ -3283,6 +3283,7 @@
 #define arm_reset_cpu arm_reset_cpu_arm
 #define arm_set_cpu_off arm_set_cpu_off_arm
 #define arm_set_cpu_on arm_set_cpu_on_arm
+#define arm_stage1_mmu_idx arm_stage1_mmu_idx_arm
 #define cmtst_op cmtst_op_arm
 #define fp_exception_el fp_exception_el_arm
 #define gen_cmtst_i64 gen_cmtst_i64_arm
diff --git a/qemu/armeb.h b/qemu/armeb.h
index 8879f581..248b38af 100644
--- a/qemu/armeb.h
+++ b/qemu/armeb.h
@@ -3283,6 +3283,7 @@
 #define arm_reset_cpu arm_reset_cpu_armeb
 #define arm_set_cpu_off arm_set_cpu_off_armeb
 #define arm_set_cpu_on arm_set_cpu_on_armeb
+#define arm_stage1_mmu_idx arm_stage1_mmu_idx_armeb
 #define cmtst_op cmtst_op_armeb
 #define fp_exception_el fp_exception_el_armeb
 #define gen_cmtst_i64 gen_cmtst_i64_armeb
diff --git a/qemu/header_gen.py b/qemu/header_gen.py
index c67a691d..85fb0330 100644
--- a/qemu/header_gen.py
+++ b/qemu/header_gen.py
@@ -3292,6 +3292,7 @@ arm_symbols = (
     'arm_reset_cpu',
     'arm_set_cpu_off',
     'arm_set_cpu_on',
+    'arm_stage1_mmu_idx',
     'cmtst_op',
     'fp_exception_el',
     'gen_cmtst_i64',
@@ -3329,6 +3330,7 @@ aarch64_symbols = (
     'arm_reset_cpu',
     'arm_set_cpu_off',
     'arm_set_cpu_on',
+    'arm_stage1_mmu_idx',
     'bif_op',
     'bit_op',
     'bsl_op',
diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c
index a743b647..4af4302a 100644
--- a/qemu/target/arm/helper.c
+++ b/qemu/target/arm/helper.c
@@ -12205,6 +12205,13 @@ int cpu_mmu_index(CPUARMState *env, bool ifetch)
     return arm_to_core_mmu_idx(arm_mmu_idx(env));
 }
 
+#ifndef CONFIG_USER_ONLY
+ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env)
+{
+    return stage_1_mmu_idx(arm_mmu_idx(env));
+}
+#endif
+
 void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
                           target_ulong *cs_base, uint32_t *pflags)
 {
diff --git a/qemu/target/arm/internals.h b/qemu/target/arm/internals.h
index 31eb48d5..a5f776b0 100644
--- a/qemu/target/arm/internals.h
+++ b/qemu/target/arm/internals.h
@@ -929,4 +929,19 @@ void arm_cpu_update_vfiq(ARMCPU *cpu);
  */
 ARMMMUIdx arm_mmu_idx(CPUARMState *env);
 
+/**
+ * arm_stage1_mmu_idx:
+ * @env: The cpu environment
+ *
+ * Return the ARMMMUIdx for the stage1 traversal for the current regime.
+ */
+#ifdef CONFIG_USER_ONLY
+static inline ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env)
+{
+    return ARMMMUIdx_S1NSE0;
+}
+#else
+ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env);
+#endif
+
 #endif