diff --git a/qemu/target-sparc/helper.c b/qemu/target-sparc/helper.c index 0263ef1c..17b18c21 100644 --- a/qemu/target-sparc/helper.c +++ b/qemu/target-sparc/helper.c @@ -49,14 +49,23 @@ target_ulong helper_popc(target_ulong val) void helper_tick_set_count(void *opaque, uint64_t count) { #if !defined(CONFIG_USER_ONLY) - // cpu_tick_set_count(opaque, count); + // Unicorn: commented out + //cpu_tick_set_count(opaque, count); #endif } -uint64_t helper_tick_get_count(void *opaque) +uint64_t helper_tick_get_count(CPUSPARCState *env, void *opaque, int mem_idx) { #if !defined(CONFIG_USER_ONLY) - return 0; //cpu_tick_get_count(opaque); + /* Unicorn: commented out + CPUTimer *timer = opaque; + + if (timer->npt && mem_idx < MMU_KERNEL_IDX) { + helper_raise_exception(env, TT_PRIV_INSN); + } + + return cpu_tick_get_count(timer);*/ + return 0; #else return 0; #endif diff --git a/qemu/target-sparc/helper.h b/qemu/target-sparc/helper.h index 3b449539..b4a3ee48 100644 --- a/qemu/target-sparc/helper.h +++ b/qemu/target-sparc/helper.h @@ -23,9 +23,9 @@ DEF_HELPER_4(ldda_asi, void, env, tl, int, int) DEF_HELPER_5(ldf_asi, void, env, tl, int, int, int) DEF_HELPER_FLAGS_5(stf_asi, TCG_CALL_NO_WG, void, env, tl, int, int, int) DEF_HELPER_FLAGS_5(casx_asi, TCG_CALL_NO_WG, tl, env, tl, tl, tl, i32) -DEF_HELPER_2(set_softint, void, env, i64) -DEF_HELPER_2(clear_softint, void, env, i64) -DEF_HELPER_2(write_softint, void, env, i64) +DEF_HELPER_FLAGS_2(set_softint, TCG_CALL_NO_RWG, void, env, i64) +DEF_HELPER_FLAGS_2(clear_softint, TCG_CALL_NO_RWG, void, env, i64) +DEF_HELPER_FLAGS_2(write_softint, TCG_CALL_NO_RWG, void, env, i64) DEF_HELPER_FLAGS_2(tick_set_count, TCG_CALL_NO_RWG, void, ptr, i64) DEF_HELPER_FLAGS_3(tick_get_count, TCG_CALL_NO_WG, i64, env, ptr, int) DEF_HELPER_FLAGS_2(tick_set_limit, TCG_CALL_NO_RWG, void, ptr, i64) diff --git a/qemu/target-sparc/translate.c b/qemu/target-sparc/translate.c index 1b6327d8..fbb1a7fa 100644 --- a/qemu/target-sparc/translate.c +++ b/qemu/target-sparc/translate.c @@ -2868,12 +2868,16 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins case 0x4: /* V9 rdtick */ { TCGv_ptr r_tickptr; + TCGv_i32 r_const; r_tickptr = tcg_temp_new_ptr(tcg_ctx); + r_const = tcg_const_i32(tcg_ctx, dc->mem_idx); tcg_gen_ld_ptr(tcg_ctx, r_tickptr, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tick)); - gen_helper_tick_get_count(tcg_ctx, cpu_dst, r_tickptr); + gen_helper_tick_get_count(tcg_ctx, cpu_dst, tcg_ctx->cpu_env, r_tickptr, + r_const); tcg_temp_free_ptr(tcg_ctx, r_tickptr); + tcg_temp_free_i32(tcg_ctx, r_const); gen_store_gpr(dc, rd, cpu_dst); } break; @@ -2901,7 +2905,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins gen_store_gpr(dc, rd, tcg_ctx->cpu_gsr); break; case 0x16: /* Softint */ - tcg_gen_ext_i32_tl(tcg_ctx, cpu_dst, tcg_ctx->cpu_softint); + tcg_gen_ld32s_tl(tcg_ctx, cpu_dst, tcg_ctx->cpu_env, + offsetof(CPUSPARCState, softint)); gen_store_gpr(dc, rd, cpu_dst); break; case 0x17: /* Tick compare */ @@ -2910,12 +2915,16 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins case 0x18: /* System tick */ { TCGv_ptr r_tickptr; + TCGv_i32 r_const; r_tickptr = tcg_temp_new_ptr(tcg_ctx); + r_const = tcg_const_i32(tcg_ctx, dc->mem_idx); tcg_gen_ld_ptr(tcg_ctx, r_tickptr, tcg_ctx->cpu_env, offsetof(CPUSPARCState, stick)); - gen_helper_tick_get_count(tcg_ctx, cpu_dst, r_tickptr); + gen_helper_tick_get_count(tcg_ctx, cpu_dst, tcg_ctx->cpu_env, r_tickptr, + r_const); tcg_temp_free_ptr(tcg_ctx, r_tickptr); + tcg_temp_free_i32(tcg_ctx, r_const); gen_store_gpr(dc, rd, cpu_dst); } break; @@ -3023,12 +3032,16 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins case 4: // tick { TCGv_ptr r_tickptr; + TCGv_i32 r_const; r_tickptr = tcg_temp_new_ptr(tcg_ctx); + r_const = tcg_const_i32(tcg_ctx, dc->mem_idx); tcg_gen_ld_ptr(tcg_ctx, r_tickptr, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tick)); - gen_helper_tick_get_count(tcg_ctx, cpu_tmp0, r_tickptr); + gen_helper_tick_get_count(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_env, + r_tickptr, r_const); tcg_temp_free_ptr(tcg_ctx, r_tickptr); + tcg_temp_free_i32(tcg_ctx, r_const); } break; case 5: // tba @@ -5579,10 +5592,6 @@ void gen_intermediate_code_init(CPUSPARCState *env) tcg_ctx->cpu_ver = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, version), "ver"); - - tcg_ctx->cpu_softint = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, - offsetof(CPUSPARCState, softint), - "softint"); #else tcg_ctx->cpu_wim = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, wim), "wim"); diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index baf8a9a1..e67c0489 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -924,7 +924,6 @@ struct TCGContext { TCGv_ptr cpu_regwptr; TCGv_i32 cpu_psr; TCGv_i32 cpu_xcc, cpu_asi, cpu_fprs; - TCGv_i32 cpu_softint; /* Floating point registers */ TCGv_i64 cpu_fpr[32]; // TARGET_DPREGS = 32 for Sparc64, 16 for Sparc