From 3afb3723c7fbf5f4fa104402db9214c3b2720f03 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>
Date: Mon, 18 Nov 2019 21:15:17 -0500
Subject: [PATCH] target/mips: rationalise softfloat includes

We should avoid including the whole of softfloat headers in cpu.h and
explicitly include it only where we will be calling softfloat
functions. We can use the -types.h in cpu.h for the few bits that are
global. We also move the restore_snan_bit_mode into internal.h and
include -helpers.h there.

Backports commit 502700d0674919309a19bfd016ea0680c6b7747d from qemu
---
 qemu/target/mips/cpu.h        | 7 +------
 qemu/target/mips/internal.h   | 7 +++++++
 qemu/target/mips/msa_helper.c | 1 +
 qemu/target/mips/op_helper.c  | 1 +
 4 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h
index f6eca939..d98f58ef 100644
--- a/qemu/target/mips/cpu.h
+++ b/qemu/target/mips/cpu.h
@@ -7,7 +7,7 @@
 #include "qemu-common.h"
 #include "cpu-qom.h"
 #include "exec/cpu-defs.h"
-#include "fpu/softfloat.h"
+#include "fpu/softfloat-types.h"
 #include "mips-defs.h"
 
 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
@@ -1194,11 +1194,6 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
 target_ulong exception_resume_pc(CPUMIPSState *env);
 
 /* op_helper.c */
-static inline void restore_snan_bit_mode(CPUMIPSState *env)
-{
-    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
-                        &env->active_fpu.fp_status);
-}
 
 static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *pc,
                                         target_ulong *cs_base, uint32_t *flags)
diff --git a/qemu/target/mips/internal.h b/qemu/target/mips/internal.h
index 082f87ba..c302cc0e 100644
--- a/qemu/target/mips/internal.h
+++ b/qemu/target/mips/internal.h
@@ -7,6 +7,7 @@
 #ifndef MIPS_INTERNAL_H
 #define MIPS_INTERNAL_H
 
+#include "fpu/softfloat-helpers.h"
 
 /* MMU types, the first four entries have the same layout as the
    CP0C0_MT field.  */
@@ -227,6 +228,12 @@ static inline void restore_flush_mode(CPUMIPSState *env)
                       &env->active_fpu.fp_status);
 }
 
+static inline void restore_snan_bit_mode(CPUMIPSState *env)
+{
+    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
+                        &env->active_fpu.fp_status);
+}
+
 static inline void restore_fp_status(CPUMIPSState *env)
 {
     restore_rounding_mode(env);
diff --git a/qemu/target/mips/msa_helper.c b/qemu/target/mips/msa_helper.c
index 8641f496..8a6f2bd0 100644
--- a/qemu/target/mips/msa_helper.c
+++ b/qemu/target/mips/msa_helper.c
@@ -22,6 +22,7 @@
 #include "internal.h"
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"
+#include "fpu/softfloat.h"
 
 /* Data format min and max values */
 #define DF_BITS(df) ((uint64_t)1 << ((df) + 3))
diff --git a/qemu/target/mips/op_helper.c b/qemu/target/mips/op_helper.c
index ef9dd990..9bb70453 100644
--- a/qemu/target/mips/op_helper.c
+++ b/qemu/target/mips/op_helper.c
@@ -23,6 +23,7 @@
 #include "exec/helper-proto.h"
 #include "exec/exec-all.h"
 #include "exec/cpu_ldst.h"
+#include "fpu/softfloat.h"
 
 /*****************************************************************************/
 /* Exceptions processing helpers */