diff --git a/qemu/target/arm/neon-dp.decode b/qemu/target/arm/neon-dp.decode index ea8d5fd9..c9acd00f 100644 --- a/qemu/target/arm/neon-dp.decode +++ b/qemu/target/arm/neon-dp.decode @@ -479,6 +479,12 @@ Vimm_1r 1111 001 . 1 . 000 ... .... cmode:4 0 . op:1 1 .... @1reg_imm VABS 1111 001 11 . 11 .. 01 .... 0 0110 . . 0 .... @2misc VNEG 1111 001 11 . 11 .. 01 .... 0 0111 . . 0 .... @2misc + VCGT0_F 1111 001 11 . 11 .. 01 .... 0 1000 . . 0 .... @2misc + VCGE0_F 1111 001 11 . 11 .. 01 .... 0 1001 . . 0 .... @2misc + VCEQ0_F 1111 001 11 . 11 .. 01 .... 0 1010 . . 0 .... @2misc + VCLE0_F 1111 001 11 . 11 .. 01 .... 0 1011 . . 0 .... @2misc + VCLT0_F 1111 001 11 . 11 .. 01 .... 0 1100 . . 0 .... @2misc + VABS_F 1111 001 11 . 11 .. 01 .... 0 1110 . . 0 .... @2misc VNEG_F 1111 001 11 . 11 .. 01 .... 0 1111 . . 0 .... @2misc diff --git a/qemu/target/arm/translate-neon.inc.c b/qemu/target/arm/translate-neon.inc.c index a201145a..e732b5d9 100644 --- a/qemu/target/arm/translate-neon.inc.c +++ b/qemu/target/arm/translate-neon.inc.c @@ -3815,3 +3815,31 @@ static bool trans_VRINTX(DisasContext *s, arg_2misc *a) } return do_2misc_fp(s, a, gen_helper_rints_exact); } + +#define WRAP_FP_CMP0_FWD(WRAPNAME, FUNC) \ + static void WRAPNAME(TCGContext *s, TCGv_i32 d, TCGv_i32 m, TCGv_ptr fpst) \ + { \ + TCGv_i32 zero = tcg_const_i32(s, 0); \ + FUNC(s, d, m, zero, fpst); \ + tcg_temp_free_i32(s, zero); \ + } +#define WRAP_FP_CMP0_REV(WRAPNAME, FUNC) \ + static void WRAPNAME(TCGContext *s, TCGv_i32 d, TCGv_i32 m, TCGv_ptr fpst) \ + { \ + TCGv_i32 zero = tcg_const_i32(s, 0); \ + FUNC(s, d, zero, m, fpst); \ + tcg_temp_free_i32(s, zero); \ + } + +#define DO_FP_CMP0(INSN, FUNC, REV) \ + WRAP_FP_CMP0_##REV(gen_##INSN, FUNC) \ + static bool trans_##INSN(DisasContext *s, arg_2misc *a) \ + { \ + return do_2misc_fp(s, a, gen_##INSN); \ + } + +DO_FP_CMP0(VCGT0_F, gen_helper_neon_cgt_f32, FWD) +DO_FP_CMP0(VCGE0_F, gen_helper_neon_cge_f32, FWD) +DO_FP_CMP0(VCEQ0_F, gen_helper_neon_ceq_f32, FWD) +DO_FP_CMP0(VCLE0_F, gen_helper_neon_cge_f32, REV) +DO_FP_CMP0(VCLT0_F, gen_helper_neon_cgt_f32, REV) diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c index 17f53e8b..8c2fc425 100644 --- a/qemu/target/arm/translate.c +++ b/qemu/target/arm/translate.c @@ -5056,6 +5056,11 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_2RM_VCVT_SF: case NEON_2RM_VCVT_UF: case NEON_2RM_VRINTX: + case NEON_2RM_VCGT0_F: + case NEON_2RM_VCGE0_F: + case NEON_2RM_VCEQ0_F: + case NEON_2RM_VCLE0_F: + case NEON_2RM_VCLT0_F: /* handled by decodetree */ return 1; case NEON_2RM_VTRN: @@ -5077,51 +5082,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) for (pass = 0; pass < (q ? 4 : 2); pass++) { tmp = neon_load_reg(s, rm, pass); switch (op) { - case NEON_2RM_VCGT0_F: - { - TCGv_ptr fpstatus = get_fpstatus_ptr(tcg_ctx, 1); - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_helper_neon_cgt_f32(tcg_ctx, tmp, tmp, tmp2, fpstatus); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_ptr(tcg_ctx, fpstatus); - break; - } - case NEON_2RM_VCGE0_F: - { - TCGv_ptr fpstatus = get_fpstatus_ptr(tcg_ctx, 1); - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_helper_neon_cge_f32(tcg_ctx, tmp, tmp, tmp2, fpstatus); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_ptr(tcg_ctx, fpstatus); - break; - } - case NEON_2RM_VCEQ0_F: - { - TCGv_ptr fpstatus = get_fpstatus_ptr(tcg_ctx, 1); - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_helper_neon_ceq_f32(tcg_ctx, tmp, tmp, tmp2, fpstatus); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_ptr(tcg_ctx, fpstatus); - break; - } - case NEON_2RM_VCLE0_F: - { - TCGv_ptr fpstatus = get_fpstatus_ptr(tcg_ctx, 1); - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_helper_neon_cge_f32(tcg_ctx, tmp, tmp2, tmp, fpstatus); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_ptr(tcg_ctx, fpstatus); - break; - } - case NEON_2RM_VCLT0_F: - { - TCGv_ptr fpstatus = get_fpstatus_ptr(tcg_ctx, 1); - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_helper_neon_cgt_f32(tcg_ctx, tmp, tmp2, tmp, fpstatus); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_ptr(tcg_ctx, fpstatus); - break; - } case NEON_2RM_VSWP: tmp2 = neon_load_reg(s, rd, pass); neon_store_reg(s, rm, pass, tmp2);