From 4680ceca1df71a837372f5e62b52867742e05f73 Mon Sep 17 00:00:00 2001 From: Nadav Amit Date: Mon, 12 Feb 2018 21:07:08 -0500 Subject: [PATCH] target-i386: disable LINT0 after reset Due to old Seabios bug, QEMU reenable LINT0 after reset. This bug is long gone and therefore this hack is no longer needed. Since it violates the specifications, it is removed. Backports commit b8eb5512fd8a115f164edbbe897cdf8884920ccb from qemu --- qemu/hw/intc/apic_common.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/qemu/hw/intc/apic_common.c b/qemu/hw/intc/apic_common.c index d4d8b004..baab720a 100644 --- a/qemu/hw/intc/apic_common.c +++ b/qemu/hw/intc/apic_common.c @@ -191,15 +191,6 @@ static void apic_reset_common(struct uc_struct *uc, DeviceState *dev) info->vapic_base_update(s); apic_init_reset(uc, dev); - - if (bsp) { - /* - * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization - * time typically by BIOS, so PIC interrupt can be delivered to the - * processor when local APIC is enabled. - */ - s->lvt[APIC_LVT_LINT0] = 0x700; - } } static int apic_common_realize(struct uc_struct *uc, DeviceState *dev, Error **errp)