diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index 4ff6f67f..5ee45213 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -24570,6 +24570,11 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) } } +static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx) +{ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_LQ */ +} + static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset) { generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_SQ */ @@ -26602,8 +26607,12 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pat } break; case OPC_MSA: /* OPC_MDMX */ - /* MDMX: Not implemented. */ - gen_msa(env, ctx); + if (ctx->insn_flags & INSN_R5900) { + decode_tx79_lq(env, ctx); /* TX79_LQ */ + } else { + /* MDMX: Not implemented. */ + gen_msa(env, ctx); + } break; case OPC_PCREL: check_insn(ctx, ISA_MIPS32R6);