From f3dc2522a090e1f8467f5a67571dc3e1bef49786 Mon Sep 17 00:00:00 2001 From: Chris Eagle Date: Thu, 4 Feb 2016 17:17:40 -0800 Subject: [PATCH 1/4] read/write of x86 segment registers should modify selector field not base field --- qemu/target-i386/unicorn.c | 48 +++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 24 deletions(-) mode change 100644 => 100755 qemu/target-i386/unicorn.c diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c old mode 100644 new mode 100755 index 0af5763e..e6705133 --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -260,22 +260,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); break; case UC_X86_REG_CS: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; break; case UC_X86_REG_DS: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; break; case UC_X86_REG_SS: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; break; case UC_X86_REG_ES: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; break; case UC_X86_REG_FS: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; break; case UC_X86_REG_GS: - *(int32_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base; + *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; break; } break; @@ -412,22 +412,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); break; case UC_X86_REG_CS: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_CS].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; break; case UC_X86_REG_DS: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_DS].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; break; case UC_X86_REG_SS: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_SS].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; break; case UC_X86_REG_ES: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_ES].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; break; case UC_X86_REG_FS: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_FS].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; break; case UC_X86_REG_GS: - *(int64_t *)value = X86_CPU(uc, mycpu)->env.segs[R_GS].base; + *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; break; case UC_X86_REG_R8: *(int64_t *)value = READ_QWORD(X86_CPU(uc, mycpu)->env.regs[8]); @@ -667,22 +667,22 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value) uc_emu_stop(uc); break; case UC_X86_REG_CS: - X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_CS].selector = *(uint16_t *)value; break; case UC_X86_REG_DS: - X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value; break; case UC_X86_REG_SS: - X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value; break; case UC_X86_REG_ES: - X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value; break; case UC_X86_REG_FS: - X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value; break; case UC_X86_REG_GS: - X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint32_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value; break; } break; @@ -829,22 +829,22 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value) uc_emu_stop(uc); break; case UC_X86_REG_CS: - X86_CPU(uc, mycpu)->env.segs[R_CS].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_CS].selector = *(uint16_t *)value; break; case UC_X86_REG_DS: - X86_CPU(uc, mycpu)->env.segs[R_DS].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value; break; case UC_X86_REG_SS: - X86_CPU(uc, mycpu)->env.segs[R_SS].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value; break; case UC_X86_REG_ES: - X86_CPU(uc, mycpu)->env.segs[R_ES].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value; break; case UC_X86_REG_FS: - X86_CPU(uc, mycpu)->env.segs[R_FS].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value; break; case UC_X86_REG_GS: - X86_CPU(uc, mycpu)->env.segs[R_GS].base = *(uint64_t *)value; + X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value; break; case UC_X86_REG_R8: X86_CPU(uc, mycpu)->env.regs[8] = *(uint64_t *)value; From c339ced21863745be7fa49a14d17d51dd5a89509 Mon Sep 17 00:00:00 2001 From: Chris Eagle Date: Thu, 4 Feb 2016 17:18:24 -0800 Subject: [PATCH 2/4] file perms --- qemu/target-i386/unicorn.c | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 qemu/target-i386/unicorn.c diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c old mode 100755 new mode 100644 From 4cb43be5bf5a7dee090a6c0c337e1ae0573a679f Mon Sep 17 00:00:00 2001 From: Chris Eagle Date: Thu, 4 Feb 2016 19:20:59 -0800 Subject: [PATCH 3/4] fix reg_read casting for x86 segment registers --- qemu/target-i386/unicorn.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) mode change 100644 => 100755 qemu/target-i386/unicorn.c diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c old mode 100644 new mode 100755 index e6705133..3da1c94d --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -260,22 +260,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); break; case UC_X86_REG_CS: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; break; case UC_X86_REG_DS: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; break; case UC_X86_REG_SS: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; break; case UC_X86_REG_ES: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; break; case UC_X86_REG_FS: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; break; case UC_X86_REG_GS: - *(int32_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; break; } break; @@ -412,22 +412,22 @@ int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value) *(int16_t *)value = READ_WORD(X86_CPU(uc, mycpu)->env.eip); break; case UC_X86_REG_CS: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_CS].selector; break; case UC_X86_REG_DS: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_DS].selector; break; case UC_X86_REG_SS: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_SS].selector; break; case UC_X86_REG_ES: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_ES].selector; break; case UC_X86_REG_FS: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_FS].selector; break; case UC_X86_REG_GS: - *(int64_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; + *(int16_t *)value = (uint16_t)X86_CPU(uc, mycpu)->env.segs[R_GS].selector; break; case UC_X86_REG_R8: *(int64_t *)value = READ_QWORD(X86_CPU(uc, mycpu)->env.regs[8]); From b49358524f2f6f0b019943aabc8cc719176c5d35 Mon Sep 17 00:00:00 2001 From: Chris Eagle Date: Thu, 4 Feb 2016 19:22:39 -0800 Subject: [PATCH 4/4] fix reg_read casting for x86 segment registers --- qemu/target-i386/unicorn.c | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 qemu/target-i386/unicorn.c diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c old mode 100755 new mode 100644