From 49e7e28ec95555902b677991c469959e6470c3fb Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Fri, 25 Jan 2019 12:45:19 -0500 Subject: [PATCH] target/mips: Correct the second argument type of cpu_supports_isa() "insn_flags" bitfield was expanded from 32-bit to 64-bit in commit f9c9cd63e3. However, this was not reflected on the second argument of the function cpu_supports_isa(). By chance, this did not create some wrong behavior, since the left-most halves of all instances of the second argument are currently all zeros. However, this is still a bug waiting to happen. Correct this by changing the type of the second argument to be always 64-bit. Backports commit 5b1e098128367d6ef7cb2d1e99a55fcf4fa9cdde from qemu --- qemu/target/mips/cpu.h | 2 +- qemu/target/mips/translate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h index 76b0c104..cd6fd089 100644 --- a/qemu/target/mips/cpu.h +++ b/qemu/target/mips/cpu.h @@ -1173,7 +1173,7 @@ enum { #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); -bool cpu_supports_isa(struct uc_struct *uc, const char *cpu_model, unsigned int isa); +bool cpu_supports_isa(struct uc_struct *uc, const char *cpu_model, uint64_t isa); bool cpu_supports_cps_smp(struct uc_struct *uc, const char *cpu_type); void cpu_set_exception_base(struct uc_struct *uc, int vp_index, target_ulong address); diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index 1fe6f406..32da5ebd 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -30068,7 +30068,7 @@ bool cpu_supports_cps_smp(struct uc_struct *uc, const char *cpu_type) return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) != 0; } -bool cpu_supports_isa(struct uc_struct *uc, const char *cpu_type, unsigned int isa) +bool cpu_supports_isa(struct uc_struct *uc, const char *cpu_type, uint64_t isa) { const MIPSCPUClass *mcc = MIPS_CPU_CLASS(uc, object_class_by_name(uc, cpu_type)); return (mcc->cpu_def->insn_flags & isa) != 0;