From 4a1cc16eef2de5aaf16bef53e5b5d4dbf7d76640 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 18 Nov 2019 20:27:09 -0500 Subject: [PATCH] target/arm: Use tcg_gen_rotri_i32 for gen_swap_half Rotate is the more compact and obvious way to swap 16-bit elements of a 32-bit word. Backports commit adefba76e8bf10dfb342094d2f5debfeedb1a74d from qemu --- qemu/target/arm/translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c index 403a1669..5ae02831 100644 --- a/qemu/target/arm/translate.c +++ b/qemu/target/arm/translate.c @@ -457,11 +457,7 @@ static TCGv_i64 gen_muls_i64_i32(DisasContext *s, TCGv_i32 a, TCGv_i32 b) static void gen_swap_half(DisasContext *s, TCGv_i32 var) { TCGContext *tcg_ctx = s->uc->tcg_ctx; - TCGv_i32 tmp = tcg_temp_new_i32(tcg_ctx); - tcg_gen_shri_i32(tcg_ctx, tmp, var, 16); - tcg_gen_shli_i32(tcg_ctx, var, var, 16); - tcg_gen_or_i32(tcg_ctx, var, var, tmp); - tcg_temp_free_i32(tcg_ctx, tmp); + tcg_gen_rotri_i32(tcg_ctx, var, var, 16); } /* Dual 16-bit add. Result placed in t0 and t1 is marked as dead.