From 4a8f52ae7f24e9dbbf05d792a91825cdffe7b54d Mon Sep 17 00:00:00 2001 From: Andrew Dutcher Date: Wed, 29 Jun 2016 03:56:53 -0700 Subject: [PATCH] support xmm registers --- bindings/python/unicorn/unicorn.py | 18 ++++++++++++++++++ qemu/target-i386/unicorn.c | 16 ++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/bindings/python/unicorn/unicorn.py b/bindings/python/unicorn/unicorn.py index a1083f70..01c52ca8 100644 --- a/bindings/python/unicorn/unicorn.py +++ b/bindings/python/unicorn/unicorn.py @@ -202,6 +202,14 @@ class uc_x86_float80(ctypes.Structure): ] +class uc_x86_xmm(ctypes.Structure): + """128-bit xmm register""" + _fields_ = [ + ("lowdword", ctypes.c_uint64), + ("highdword", ctypes.c_uint64), + ] + + class Uc(object): def __init__(self, arch, mode): # verify version compatibility with the core before doing anything @@ -260,6 +268,12 @@ class Uc(object): if status != uc.UC_ERR_OK: raise UcError(status) return reg.mantissa, reg.exponent + if reg_id in range(x86_const.UC_X86_REG_XMM0, x86_const.UC_X86_REG_XMM0+8): + reg = uc_x86_xmm() + status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg)) + if status != uc.UC_ERR_OK: + raise UcError(status) + return reg.lowdword | (reg.highdword << 64) # read to 64bit number to be safe reg = ctypes.c_int64(0) @@ -284,6 +298,10 @@ class Uc(object): reg = uc_x86_float80() reg.mantissa = value[0] reg.exponent = value[1] + if reg_id in range(x86_const.UC_X86_REG_XMM0, x86_const.UC_X86_REG_XMM0+8): + reg = uc_x86_xmm() + reg.lowdword = value & 0xffffffffffffffff + reg.highdword = value >> 64 if reg is None: # convert to 64bit number to be safe diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c index 004e2a4a..92ca69df 100644 --- a/qemu/target-i386/unicorn.c +++ b/qemu/target-i386/unicorn.c @@ -195,6 +195,14 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun *(uint16_t*) value = fptag; } continue; + case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7: + { + float64 *dst = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + dst[0] = reg->_d[0]; + dst[1] = reg->_d[1]; + continue; + } } switch(uc->mode) { @@ -666,6 +674,14 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i continue; } break; + case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7: + { + float64 *src = (float64*)value; + XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0]; + reg->_d[0] = src[0]; + reg->_d[1] = src[1]; + continue; + } } switch(uc->mode) {