From 4ed7524444c4fae99dc9d3d22d631faa1ae99014 Mon Sep 17 00:00:00 2001
From: Aaron Lindsay <alindsay@codeaurora.org>
Date: Thu, 26 Apr 2018 09:22:54 -0400
Subject: [PATCH] target/arm: Fix bitmask for PMCCFILTR writes

It was shifted to the left one bit too few.

Backports commit ac57fd24cd864d42e7551f82266bc0930bd39547 from qemu
---
 qemu/target/arm/helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c
index 4e3a0e81..48b7e517 100644
--- a/qemu/target/arm/helper.c
+++ b/qemu/target/arm/helper.c
@@ -1014,7 +1014,7 @@ static void pmccfiltr_write(CPUARMState *env, const ARMCPRegInfo *ri,
                             uint64_t value)
 {
     pmccntr_sync(env);
-    env->cp15.pmccfiltr_el0 = value & 0x7E000000;
+    env->cp15.pmccfiltr_el0 = value & 0xfc000000;
     pmccntr_sync(env);
 }