diff --git a/qemu/target-i386/cc_helper.c b/qemu/target-i386/cc_helper.c
index ecbf0ec0..2de54053 100644
--- a/qemu/target-i386/cc_helper.c
+++ b/qemu/target-i386/cc_helper.c
@@ -328,12 +328,7 @@ void helper_write_eflags(CPUX86State *env, target_ulong t0,
 
 target_ulong helper_read_eflags(CPUX86State *env)
 {
-    uint32_t eflags;
-
-    eflags = cpu_cc_compute_all(env, CC_OP);
-    eflags |= (env->df & DF_MASK);
-    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
-    return eflags;
+    return cpu_compute_eflags(env);
 }
 
 void helper_clts(CPUX86State *env)
diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h
index e14e6612..4628a8df 100644
--- a/qemu/target-i386/cpu.h
+++ b/qemu/target-i386/cpu.h
@@ -839,6 +839,7 @@ typedef struct CPUX86State {
     /* standard registers */
     target_ulong regs[CPU_NB_REGS];
     target_ulong eip;
+    target_ulong eflags0; // copy of eflags that does not change thru the BB
     target_ulong eflags; /* eflags register. During CPU emulation, CC
                         flags and DF are set to zero because they are
                         stored elsewhere */
@@ -1314,7 +1315,7 @@ void update_fp_status(CPUX86State *env);
 
 static inline uint32_t cpu_compute_eflags(CPUX86State *env)
 {
-    return env->eflags | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
+    return env->eflags0 | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
 }
 
 /* NOTE: the translator must set DisasContext.cc_op to CC_OP_EFLAGS
diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c
index b098c221..ca8af555 100644
--- a/qemu/target-i386/helper.c
+++ b/qemu/target-i386/helper.c
@@ -1141,4 +1141,5 @@ void x86_cpu_exec_exit(CPUState *cs)
     CPUX86State *env = &cpu->env;
 
     env->eflags = cpu_compute_eflags(env);
+    env->eflags0 = env->eflags;
 }
diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c
index acac9638..b7c62e30 100644
--- a/qemu/target-i386/unicorn.c
+++ b/qemu/target-i386/unicorn.c
@@ -70,6 +70,7 @@ void x86_reg_reset(struct uc_struct *uc)
 
     env->eip = 0;
     env->eflags = 0;
+    env->eflags0 = 0;
 
     env->fpstt = 0; /* top of stack index */
     env->fpus = 0;
@@ -580,6 +581,7 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
                     break;
                 case UC_X86_REG_EFLAGS:
                     X86_CPU(uc, mycpu)->env.eflags = *(uint32_t *)value;
+                    X86_CPU(uc, mycpu)->env.eflags0 = *(uint32_t *)value;
                     break;
                 case UC_X86_REG_EAX:
                     X86_CPU(uc, mycpu)->env.regs[R_EAX] = *(uint32_t *)value;
@@ -693,6 +695,7 @@ int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
                     break;
                 case UC_X86_REG_EFLAGS:
                     X86_CPU(uc, mycpu)->env.eflags = *(uint64_t *)value;
+                    X86_CPU(uc, mycpu)->env.eflags0 = *(uint64_t *)value;
                     break;
                 case UC_X86_REG_RAX:
                     X86_CPU(uc, mycpu)->env.regs[R_EAX] = *(uint64_t *)value;