From 54851f7d746eb2a90312e8b4ea820c3a08dad021 Mon Sep 17 00:00:00 2001 From: "Dr. David Alan Gilbert" Date: Sun, 25 Feb 2018 20:29:11 -0500 Subject: [PATCH] target-i386: Fill high bits of mtrr mask Fill the bits between 51..number-of-physical-address-bits in the MTRR_PHYSMASKn variable range mtrr masks so that they're consistent in the migration stream irrespective of the physical address space of the source VM in a migration. Backports commit fcc35e7ccaed771790940524f3b0eef7aebfc9b1 from qemu --- qemu/target-i386/cpu.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h index 831af2ea..44ea80a2 100644 --- a/qemu/target-i386/cpu.h +++ b/qemu/target-i386/cpu.h @@ -1188,6 +1188,9 @@ typedef struct X86CPU { /* Number of physical address bits supported */ uint32_t phys_bits; + /* if true fill the top bits of the MTRR_PHYSMASKn variable range */ + bool fill_mtrr_mask; + /* in order to simplify APIC support, we leave this pointer to the user */ struct DeviceState *apic_state;