From 591ec2a44f279032112c999698621de8d63d4eae Mon Sep 17 00:00:00 2001
From: Aleksandar Markovic <amarkovic@wavecomp.com>
Date: Tue, 22 Jan 2019 19:56:05 -0500
Subject: [PATCH] target/mips: Add CP0 register MemoryMapID

Add CP0 register MemoryMapID. Only data field is added.
The corresponding functionality will be added in future
patches.

Backports commit 3ef521ee9fe2d01d4bbcf3e4d5c91ed982bf3f60 from qemu
---
 qemu/target/mips/cpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h
index 305f4d16..f09769bb 100644
--- a/qemu/target/mips/cpu.h
+++ b/qemu/target/mips/cpu.h
@@ -535,6 +535,7 @@ struct CPUMIPSState {
  */
     target_ulong CP0_Context;
     target_ulong CP0_KScratch[MIPS_KSCRATCH_NUM];
+    int32_t CP0_MemoryMapID;
 /*
  * CP0 Register 5
  */