diff --git a/include/uc_priv.h b/include/uc_priv.h
old mode 100644
new mode 100755
index c9e19f95..1494cc65
--- a/include/uc_priv.h
+++ b/include/uc_priv.h
@@ -24,7 +24,8 @@ typedef struct ModuleEntry {
 typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList;
 
 // return 0 on success, -1 on failure
-typedef int (*reg_access_t)(uch handle, unsigned int regid, void *value);
+typedef int (*reg_read_t)(uch handle, unsigned int regid, void *value);
+typedef int (*reg_write_t)(uch handle, unsigned int regid, const void *value);
 
 typedef void (*reg_reset_t)(uch handle);
 
@@ -70,7 +71,8 @@ struct uc_struct {
     struct CPUTailQ cpus;   // qemu/cpu-exec.c
     uc_err errnum;  // qemu/cpu-exec.c
     AddressSpace as;
-    reg_access_t reg_read, reg_write;
+    reg_read_t reg_read;
+    reg_write_t reg_write;
     reg_reset_t reg_reset;
 
     uc_write_mem_t write_mem;
diff --git a/include/unicorn/unicorn.h b/include/unicorn/unicorn.h
old mode 100644
new mode 100755
index d5bb350a..161e7613
--- a/include/unicorn/unicorn.h
+++ b/include/unicorn/unicorn.h
@@ -274,7 +274,7 @@ const char *uc_strerror(uc_err code);
  for detailed error).
 */
 UNICORN_EXPORT
-uc_err uc_reg_write(uch handle, int regid, void *value);
+uc_err uc_reg_write(uch handle, int regid, const void *value);
 
 /*
  Read register value.
diff --git a/qemu/target-arm/unicorn.h b/qemu/target-arm/unicorn.h
old mode 100644
new mode 100755
index 9bd2a40a..0c355a71
--- a/qemu/target-arm/unicorn.h
+++ b/qemu/target-arm/unicorn.h
@@ -6,9 +6,9 @@
 
 // functions to read & write registers
 int arm_reg_read(uch handle, unsigned int regid, void *value);
-int arm_reg_write(uch handle, unsigned int regid, void *value);
+int arm_reg_write(uch handle, unsigned int regid, const void *value);
 int arm64_reg_read(uch handle, unsigned int regid, void *value);
-int arm64_reg_write(uch handle, unsigned int regid, void *value);
+int arm64_reg_write(uch handle, unsigned int regid, const void *value);
 
 void arm_reg_reset(uch handle);
 void arm64_reg_reset(uch handle);
diff --git a/qemu/target-arm/unicorn_aarch64.c b/qemu/target-arm/unicorn_aarch64.c
old mode 100644
new mode 100755
index 4521d39e..b9474155
--- a/qemu/target-arm/unicorn_aarch64.c
+++ b/qemu/target-arm/unicorn_aarch64.c
@@ -68,7 +68,7 @@ int arm64_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int arm64_reg_write(uch handle, unsigned int regid, void *value)
+int arm64_reg_write(uch handle, unsigned int regid, const void *value)
 {
     CPUState *mycpu;
     struct uc_struct *uc = (struct uc_struct *) handle;
diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c
old mode 100644
new mode 100755
index 301233ef..9737906c
--- a/qemu/target-arm/unicorn_arm.c
+++ b/qemu/target-arm/unicorn_arm.c
@@ -78,7 +78,7 @@ int arm_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int arm_reg_write(uch handle, unsigned int regid, void *value)
+int arm_reg_write(uch handle, unsigned int regid, const void *value)
 {
     CPUState *mycpu;
     struct uc_struct *uc = (struct uc_struct *) handle;
diff --git a/qemu/target-i386/unicorn.c b/qemu/target-i386/unicorn.c
old mode 100644
new mode 100755
index 8235c0e5..82aa47a4
--- a/qemu/target-i386/unicorn.c
+++ b/qemu/target-i386/unicorn.c
@@ -536,7 +536,7 @@ int x86_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int x86_reg_write(uch handle, unsigned int regid, void *value)
+int x86_reg_write(uch handle, unsigned int regid, const void *value)
 {
     CPUState *mycpu;
     struct uc_struct *uc = (struct uc_struct *) handle;
diff --git a/qemu/target-i386/unicorn.h b/qemu/target-i386/unicorn.h
old mode 100644
new mode 100755
index 1ad1a4f6..b710236b
--- a/qemu/target-i386/unicorn.h
+++ b/qemu/target-i386/unicorn.h
@@ -6,7 +6,7 @@
 
 // functions to read & write registers
 int x86_reg_read(uch handle, unsigned int regid, void *value);
-int x86_reg_write(uch handle, unsigned int regid, void *value);
+int x86_reg_write(uch handle, unsigned int regid, const void *value);
 
 void x86_reg_reset(uch handle);
 
diff --git a/qemu/target-m68k/unicorn.c b/qemu/target-m68k/unicorn.c
old mode 100644
new mode 100755
index e765d909..f085b53c
--- a/qemu/target-m68k/unicorn.c
+++ b/qemu/target-m68k/unicorn.c
@@ -60,7 +60,7 @@ int m68k_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int m68k_reg_write(uch handle, unsigned int regid, void *value)
+int m68k_reg_write(uch handle, unsigned int regid, const void *value)
 {
     struct uc_struct *uc = (struct uc_struct *) handle;
     CPUState *mycpu = first_cpu;
diff --git a/qemu/target-m68k/unicorn.h b/qemu/target-m68k/unicorn.h
old mode 100644
new mode 100755
index ac1059ef..5fcca5f3
--- a/qemu/target-m68k/unicorn.h
+++ b/qemu/target-m68k/unicorn.h
@@ -6,7 +6,7 @@
 
 // functions to read & write registers
 int m68k_reg_read(uch handle, unsigned int regid, void *value);
-int m68k_reg_write(uch handle, unsigned int regid, void *value);
+int m68k_reg_write(uch handle, unsigned int regid, const void *value);
 
 void m68k_reg_reset(uch handle);
 
diff --git a/qemu/target-mips/unicorn.c b/qemu/target-mips/unicorn.c
old mode 100644
new mode 100755
index 65f0bd75..a66efdaf
--- a/qemu/target-mips/unicorn.c
+++ b/qemu/target-mips/unicorn.c
@@ -57,7 +57,7 @@ int mips_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int mips_reg_write(uch handle, unsigned int regid, void *value)
+int mips_reg_write(uch handle, unsigned int regid, const void *value)
 {
     struct uc_struct *uc = (struct uc_struct *) handle;
     CPUState *mycpu = first_cpu;
diff --git a/qemu/target-mips/unicorn.h b/qemu/target-mips/unicorn.h
old mode 100644
new mode 100755
index b6a9820b..29d36a7d
--- a/qemu/target-mips/unicorn.h
+++ b/qemu/target-mips/unicorn.h
@@ -6,7 +6,7 @@
 
 // functions to read & write registers
 int mips_reg_read(uch handle, unsigned int regid, void *value);
-int mips_reg_write(uch handle, unsigned int regid, void *value);
+int mips_reg_write(uch handle, unsigned int regid, const void *value);
 
 void mips_reg_reset(uch handle);
 
diff --git a/qemu/target-sparc/unicorn.c b/qemu/target-sparc/unicorn.c
old mode 100644
new mode 100755
index e91b2ecf..31c79cd7
--- a/qemu/target-sparc/unicorn.c
+++ b/qemu/target-sparc/unicorn.c
@@ -71,7 +71,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int sparc_reg_write(uch handle, unsigned int regid, void *value)
+int sparc_reg_write(uch handle, unsigned int regid, const void *value)
 {
     struct uc_struct *uc = (struct uc_struct *) handle;
     CPUState *mycpu = first_cpu;
diff --git a/qemu/target-sparc/unicorn.h b/qemu/target-sparc/unicorn.h
old mode 100644
new mode 100755
index b2606771..492a7ffb
--- a/qemu/target-sparc/unicorn.h
+++ b/qemu/target-sparc/unicorn.h
@@ -6,7 +6,7 @@
 
 // functions to read & write registers
 int sparc_reg_read(uch handle, unsigned int regid, void *value);
-int sparc_reg_write(uch handle, unsigned int regid, void *value);
+int sparc_reg_write(uch handle, unsigned int regid, const void *value);
 
 void sparc_reg_reset(uch handle);
 
diff --git a/qemu/target-sparc/unicorn64.c b/qemu/target-sparc/unicorn64.c
old mode 100644
new mode 100755
index 1c2eb8df..f9baef0c
--- a/qemu/target-sparc/unicorn64.c
+++ b/qemu/target-sparc/unicorn64.c
@@ -54,7 +54,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
 #define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
 #define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
 
-int sparc_reg_write(uch handle, unsigned int regid, void *value)
+int sparc_reg_write(uch handle, unsigned int regid, const void *value)
 {
     struct uc_struct *uc = (struct uc_struct *) handle;
     CPUState *mycpu = first_cpu;
diff --git a/uc.c b/uc.c
index c1d6479c..2011c693 100755
--- a/uc.c
+++ b/uc.c
@@ -321,7 +321,7 @@ uc_err uc_reg_read(uch handle, int regid, void *value)
 
 
 UNICORN_EXPORT
-uc_err uc_reg_write(uch handle, int regid, void *value)
+uc_err uc_reg_write(uch handle, int regid, const void *value)
 {
     struct uc_struct *uc;