diff --git a/qemu/target-m68k/translate.c b/qemu/target-m68k/translate.c
index 25cf6c21..7d29f7dc 100644
--- a/qemu/target-m68k/translate.c
+++ b/qemu/target-m68k/translate.c
@@ -678,12 +678,14 @@ static void gen_partset_reg(DisasContext *s, int opsize, TCGv reg, TCGv val)
         tmp = tcg_temp_new(tcg_ctx);
         tcg_gen_ext8u_i32(tcg_ctx, tmp, val);
         tcg_gen_or_i32(tcg_ctx, reg, reg, tmp);
+        tcg_temp_free(tcg_ctx, tmp);
         break;
     case OS_WORD:
         tcg_gen_andi_i32(tcg_ctx, reg, reg, 0xffff0000);
         tmp = tcg_temp_new(tcg_ctx);
         tcg_gen_ext16u_i32(tcg_ctx, tmp, val);
         tcg_gen_or_i32(tcg_ctx, reg, reg, tmp);
+        tcg_temp_free(tcg_ctx, tmp);
         break;
     case OS_LONG:
     case OS_SINGLE:
@@ -1115,12 +1117,20 @@ static void gen_jmp(DisasContext *s, TCGv dest)
     s->is_jmp = DISAS_JUMP;
 }
 
-static void gen_exception(DisasContext *s, uint32_t where, int nr)
+static void gen_raise_exception(DisasContext *s, int nr)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
+    TCGv_i32 tmp = tcg_const_i32(tcg_ctx, nr);
+
+    gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, tmp);
+    tcg_temp_free_i32(tcg_ctx, tmp);
+}
+
+static void gen_exception(DisasContext *s, uint32_t where, int nr)
+{
     update_cc_op(s);
     gen_jmp_im(s, where);
-    gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, nr));
+    gen_raise_exception(s, nr);
 }
 
 static inline void gen_addr_fault(DisasContext *s)
@@ -1256,6 +1266,7 @@ DISAS_INSN(mulw)
     tcg_gen_mul_i32(tcg_ctx, tmp, tmp, src);
     tcg_gen_mov_i32(tcg_ctx, reg, tmp);
     gen_logic_cc(s, tmp, OS_LONG);
+    tcg_temp_free(tcg_ctx, tmp);
 }
 
 DISAS_INSN(divw)
@@ -1677,6 +1688,7 @@ static void gen_push(DisasContext *s, TCGv val)
     tcg_gen_subi_i32(tcg_ctx, tmp, QREG_SP, 4);
     gen_store(s, OS_LONG, tmp, val);
     tcg_gen_mov_i32(tcg_ctx, QREG_SP, tmp);
+    tcg_temp_free(tcg_ctx, tmp);
 }
 
 static TCGv mreg(DisasContext *s, int reg)
@@ -2185,10 +2197,14 @@ DISAS_INSN(clr)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     int opsize;
+    TCGv zero;
+
+    zero = tcg_const_i32(tcg_ctx, 0);
 
     opsize = insn_opsize(insn);
-    DEST_EA(env, insn, opsize, tcg_const_i32(tcg_ctx, 0), NULL);
-    gen_logic_cc(s, tcg_const_i32(tcg_ctx, 0), opsize);
+    DEST_EA(env, insn, opsize, zero, NULL);
+    gen_logic_cc(s, zero, opsize);
+    tcg_temp_free(tcg_ctx, zero);
 }
 
 static TCGv gen_get_ccr(DisasContext *s)
@@ -2300,6 +2316,8 @@ DISAS_INSN(swap)
     tcg_gen_shli_i32(tcg_ctx, src1, reg, 16);
     tcg_gen_shri_i32(tcg_ctx, src2, reg, 16);
     tcg_gen_or_i32(tcg_ctx, reg, src1, src2);
+    tcg_temp_free(tcg_ctx, src2);
+    tcg_temp_free(tcg_ctx, src1);
     gen_logic_cc(s, reg, OS_LONG);
 }
 
@@ -2340,6 +2358,7 @@ DISAS_INSN(ext)
     else
         tcg_gen_mov_i32(tcg_ctx, reg, tmp);
     gen_logic_cc(s, tmp, OS_LONG);
+    tcg_temp_free(tcg_ctx, tmp);
 }
 
 DISAS_INSN(tst)
@@ -2376,6 +2395,7 @@ DISAS_INSN(tas)
     gen_logic_cc(s, src1, OS_BYTE);
     tcg_gen_ori_i32(tcg_ctx, dest, src1, 0x80);
     DEST_EA(env, insn, OS_BYTE, dest, &addr);
+    tcg_temp_free(tcg_ctx, dest);
 }
 
 DISAS_INSN(mull)
@@ -2490,6 +2510,7 @@ DISAS_INSN(unlk)
     tmp = gen_load(s, OS_LONG, src, 0);
     tcg_gen_mov_i32(tcg_ctx, reg, tmp);
     tcg_gen_addi_i32(tcg_ctx, QREG_SP, src, 4);
+    tcg_temp_free(tcg_ctx, src);
 }
 
 DISAS_INSN(nop)
@@ -2569,7 +2590,9 @@ DISAS_INSN(addsubq)
         }
         gen_update_cc_add(s, dest, val, opsize);
     }
+    tcg_temp_free(tcg_ctx, val);
     DEST_EA(env, insn, opsize, dest, &addr);
+    tcg_temp_free(tcg_ctx, dest);
 }
 
 DISAS_INSN(tpf)
@@ -2624,11 +2647,9 @@ DISAS_INSN(branch)
 DISAS_INSN(moveq)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
-    uint32_t val;
 
-    val = (int8_t)insn;
-    tcg_gen_movi_i32(tcg_ctx, DREG(insn, 9), val);
-    gen_logic_cc(s, tcg_const_i32(tcg_ctx, val), OS_LONG);
+    tcg_gen_movi_i32(tcg_ctx, DREG(insn, 9), (int8_t)insn);
+    gen_logic_cc(s, DREG(insn, 9), OS_LONG);
 }
 
 DISAS_INSN(mvzs)
@@ -2670,6 +2691,7 @@ DISAS_INSN(or)
         gen_partset_reg(s, opsize, DREG(insn, 9), dest);
     }
     gen_logic_cc(s, dest, opsize);
+    tcg_temp_free(tcg_ctx, dest);
 }
 
 DISAS_INSN(suba)
@@ -2774,6 +2796,7 @@ DISAS_INSN(mov3q)
     src = tcg_const_i32(tcg_ctx, val);
     gen_logic_cc(s, src, OS_LONG);
     DEST_EA(env, insn, OS_LONG, src, NULL);
+    tcg_temp_free(tcg_ctx, src);
 }
 
 DISAS_INSN(cmp)
@@ -2837,6 +2860,7 @@ DISAS_INSN(eor)
     tcg_gen_xor_i32(tcg_ctx, dest, src, DREG(insn, 9));
     gen_logic_cc(s, dest, opsize);
     DEST_EA(env, insn, opsize, dest, &addr);
+    tcg_temp_free(tcg_ctx, dest);
 }
 
 static void do_exg(TCGContext *tcg_ctx, TCGv reg1, TCGv reg2)
@@ -2894,8 +2918,8 @@ DISAS_INSN(and)
         tcg_gen_and_i32(tcg_ctx, dest, src, reg);
         gen_partset_reg(s, opsize, reg, dest);
     }
-    tcg_temp_free(tcg_ctx, dest);
     gen_logic_cc(s, dest, opsize);
+    tcg_temp_free(tcg_ctx, dest);
 }
 
 DISAS_INSN(adda)