diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c
index 8c3c8f04..6e6417b6 100644
--- a/qemu/target-arm/unicorn_arm.c
+++ b/qemu/target-arm/unicorn_arm.c
@@ -42,7 +42,7 @@ int arm_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
 
     mycpu = first_cpu;
 
-    if (mode & ~UC_MODE_ARM_MASK) {
+    if (uc->mode & ~UC_MODE_ARM_MASK) {
         if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
             *(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0];
         else {
@@ -78,7 +78,7 @@ int arm_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
 {
     CPUState *mycpu = first_cpu;
 
-    if (mode & ~UC_MODE_ARM_MASK) {
+    if (uc->mode & ~UC_MODE_ARM_MASK) {
         if (regid >= UC_ARM_REG_R0 && regid <= UC_ARM_REG_R12)
             ARM_CPU(uc, mycpu)->env.regs[regid - UC_ARM_REG_R0] = *(uint32_t *)value;
         else {
diff --git a/uc.c b/uc.c
index 0fdf25b0..5ec5e48a 100644
--- a/uc.c
+++ b/uc.c
@@ -183,7 +183,7 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result)
             case UC_ARCH_X86:
                 if ((mode & ~UC_MODE_X86_MASK) ||
                 	(mode & UC_MODE_BIG_ENDIAN) ||
-                	!(mode & (UC_MODE_16|UC_MODE_32|UC_MODE_64)) {
+                	!(mode & (UC_MODE_16|UC_MODE_32|UC_MODE_64))) {
                     free(uc);
                     return UC_ERR_MODE;
                 }
@@ -217,7 +217,7 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result)
 #if defined(UNICORN_HAS_MIPS) || defined(UNICORN_HAS_MIPSEL) || defined(UNICORN_HAS_MIPS64) || defined(UNICORN_HAS_MIPS64EL)
             case UC_ARCH_MIPS:
                 if ((mode & ~UC_MODE_MIPS_MASK) ||
-                	!(mode & (UC_MODE_MIPS32|UC_MODE_MIPS64)) {
+                	!(mode & (UC_MODE_MIPS32|UC_MODE_MIPS64))) {
                     free(uc);
                     return UC_ERR_MODE;
                 }