From 6c33ec25fc3825463fbe074420a7f271fbfcd93d Mon Sep 17 00:00:00 2001 From: Greg Bellows Date: Mon, 12 Feb 2018 10:27:06 -0500 Subject: [PATCH] target-arm: Fix RVBAR_EL1 register encoding Fix the RVBAR_EL1 CP register opc2 encoding from 2 to 1 Backports commit 569b49f864e7593a14182acae5a7f5981f6ec24f from qemu --- qemu/target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c index b889a91c..15d6c70b 100644 --- a/qemu/target-arm/helper.c +++ b/qemu/target-arm/helper.c @@ -2601,7 +2601,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) REGINFO_SENTINEL }; ARMCPRegInfo rvbar = { - "RVBAR_EL1", 0,12,0, 3,0,2, ARM_CP_STATE_AA64, + "RVBAR_EL1", 0,12,0, 3,0,1, ARM_CP_STATE_AA64, ARM_CP_CONST, PL1_R, 0, NULL, cpu->rvbar }; define_one_arm_cp_reg(cpu, &rvbar);