From 6d0dae872d941d3d6428bccc3658ab81cbfb1b60 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Sat, 17 Feb 2018 17:23:33 -0500 Subject: [PATCH] target-i386: tcg: Accept clwb instruction Accept the clwb instruction (66 0F AE /6) if its corresponding feature flag is enabled on CPUID[7]. Backports commit 5e1fac2dba7780e0cb2c022d4b39586af70bea0d from qemu --- qemu/target-i386/translate.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/qemu/target-i386/translate.c b/qemu/target-i386/translate.c index 7d7c266c..3f2e4340 100644 --- a/qemu/target-i386/translate.c +++ b/qemu/target-i386/translate.c @@ -8377,10 +8377,21 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } break; case 5: /* lfence */ - case 6: /* mfence */ if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2)) goto illegal_op; break; + case 6: /* mfence/clwb */ + if (s->prefix & PREFIX_DATA) { + /* clwb */ + if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB)) + goto illegal_op; + gen_nop_modrm(env, s, modrm); + } else { + /* mfence */ + if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2)) + goto illegal_op; + } + break; case 7: /* sfence / clflush */ if ((modrm & 0xc7) == 0xc0) { /* sfence */