From 74daefe28b7d412328b380393435d2dd1a2634e2 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Tue, 13 Feb 2018 08:04:32 -0500 Subject: [PATCH] target-arm: Add TTBR0_EL2 Backports commit a57633c08fa861807a0713505785bd4d441d7df8 from qemu --- qemu/target-arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c index c80182b7..132e9cf7 100644 --- a/qemu/target-arm/helper.c +++ b/qemu/target-arm/helper.c @@ -2186,6 +2186,10 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = { PL2_RW, 0, NULL, 0 }, { "TPIDR_EL2", 0,13,0, 3,4,2, ARM_CP_STATE_BOTH, ARM_CP_CONST, PL2_RW, 0, NULL, 0 }, + { "TTBR0_EL2", 0,2,0, 3,4,0, ARM_CP_STATE_AA64, ARM_CP_CONST, + PL2_RW, 0, NULL, 0 }, + { "HTTBR", 15,0,2, 0,4,0, 0, ARM_CP_64BIT | ARM_CP_CONST, + PL2_RW, 0, NULL, 0 }, REGINFO_SENTINEL }; @@ -2251,6 +2255,10 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { NULL, NULL, sctlr_write, NULL, raw_write }, { "TPIDR_EL2", 0,13,0, 3,4,2, ARM_CP_STATE_BOTH, 0, PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.tpidr_el[2]) }, + { "TTBR0_EL2", 0,2,0, 3,4,0, ARM_CP_STATE_AA64, 0, + PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.ttbr0_el[2]) }, + { "HTTBR", 15,0,2, 0,4,0, 0, ARM_CP_64BIT | ARM_CP_ALIAS, + .access = PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.ttbr0_el[2]) }, REGINFO_SENTINEL };