From 7b4b5ac249ee3f9e91d324035f2ff6c80c765539 Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@twiddle.net>
Date: Sat, 10 Nov 2018 10:08:19 -0500
Subject: [PATCH] target/arm: Use gvec for NEON_3R_VADD_VSUB insns

Backports commit e4717ae02dd0c2e544a07302c1ed473775209aba from qemu
---
 qemu/target/arm/translate.c | 29 ++++++++++-------------------
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c
index 601a13ed..2e3e6b3c 100644
--- a/qemu/target/arm/translate.c
+++ b/qemu/target/arm/translate.c
@@ -6113,6 +6113,16 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
                 break;
             }
             return 0;
+
+        case NEON_3R_VADD_VSUB:
+            if (u) {
+                tcg_gen_gvec_sub(tcg_ctx, size, rd_ofs, rn_ofs, rm_ofs,
+                                 vec_size, vec_size);
+            } else {
+                tcg_gen_gvec_add(tcg_ctx, size, rd_ofs, rn_ofs, rm_ofs,
+                                 vec_size, vec_size);
+            }
+            return 0;
         }
         if (size == 3) {
             /* 64-bit element instructions. */
@@ -6170,13 +6180,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
                                                   s->V1, s->V0);
                     }
                     break;
-                case NEON_3R_VADD_VSUB:
-                    if (u) {
-                        tcg_gen_sub_i64(tcg_ctx, CPU_V001);
-                    } else {
-                        tcg_gen_add_i64(tcg_ctx, CPU_V001);
-                    }
-                    break;
                 default:
                     abort();
                 }
@@ -6311,18 +6314,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
             tmp2 = neon_load_reg(s, rd, pass);
             gen_neon_add(s, size, tmp, tmp2);
             break;
-        case NEON_3R_VADD_VSUB:
-            if (!u) { /* VADD */
-                gen_neon_add(s, size, tmp, tmp2);
-            } else { /* VSUB */
-                switch (size) {
-                case 0: gen_helper_neon_sub_u8(tcg_ctx, tmp, tmp, tmp2); break;
-                case 1: gen_helper_neon_sub_u16(tcg_ctx, tmp, tmp, tmp2); break;
-                case 2: tcg_gen_sub_i32(tcg_ctx, tmp, tmp, tmp2); break;
-                default: abort();
-                }
-            }
-            break;
         case NEON_3R_VTST_VCEQ:
             if (!u) { /* VTST */
                 switch (size) {