From 7db1bffdee717c3d7d40d79887d4f82c9ce4c379 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Llu=C3=ADs=20Vilanova?= Date: Tue, 20 Feb 2018 22:53:46 -0500 Subject: [PATCH] tcg: Add type for vCPU pointers Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The tracing infrastructure later needs to differentiate between regular pointers and pointers to vCPUs. Also changes all targets to use the new 'TCGv_env' type instead of the generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env' translates into 'TCGv_ptr'), but that could change in the future to enforce the difference. Note that a 'TCGv_env' type (for 'CPUState') is not added, since all helpers currently receive the architecture-specific pointer ('CPUArchState'). Backports commit 1bcea73e13b2b059d0cb3301aeaca43e5656ef57 from qemu --- qemu/target-sparc/translate.c | 2 +- qemu/tcg/tcg.h | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/qemu/target-sparc/translate.c b/qemu/target-sparc/translate.c index 7553ca2e..039cf875 100644 --- a/qemu/target-sparc/translate.c +++ b/qemu/target-sparc/translate.c @@ -2432,7 +2432,7 @@ static void gen_fmovq(DisasContext *dc, DisasCompare *cmp, int rd, int rs) gen_update_fprs_dirty(dc, qd); } -static inline void gen_load_trap_state_at_tl(DisasContext *dc, TCGv_ptr r_tsptr, TCGv_ptr cpu_env) +static inline void gen_load_trap_state_at_tl(DisasContext *dc, TCGv_ptr r_tsptr, TCGv_env cpu_env) { TCGContext *tcg_ctx = dc->uc->tcg_ctx; TCGv_i32 r_tl = tcg_temp_new_i32(tcg_ctx); diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index 31821924..71cd0840 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -311,6 +311,7 @@ typedef tcg_target_ulong TCGArg; typedef struct TCGv_i32_d *TCGv_i32; typedef struct TCGv_i64_d *TCGv_i64; typedef struct TCGv_ptr_d *TCGv_ptr; +typedef TCGv_ptr TCGv_env; static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i) { @@ -719,7 +720,7 @@ struct TCGContext { // Unicorn engine variables struct uc_struct *uc; /* qemu/target-i386/translate.c: global register indexes */ - TCGv_ptr cpu_env; + TCGv_env cpu_env; TCGv_i32 cpu_cc_op; void *cpu_regs[16]; // 16 GRP for X86-64 void *cpu_seg_base[6]; // Actually an array of TCGv