diff --git a/qemu/target-arm/translate-a64.c b/qemu/target-arm/translate-a64.c
index 89eac7bf..27b379d1 100644
--- a/qemu/target-arm/translate-a64.c
+++ b/qemu/target-arm/translate-a64.c
@@ -3789,26 +3789,15 @@ static void handle_rev16(DisasContext *s, unsigned int sf,
     TCGv_i64 tcg_rd = cpu_reg(s, rd);
     TCGv_i64 tcg_tmp = tcg_temp_new_i64(tcg_ctx);
     TCGv_i64 tcg_rn = read_cpu_reg(s, rn, sf);
+    TCGv_i64 mask = tcg_const_i64(tcg_ctx, sf ? 0x00ff00ff00ff00ffull : 0x00ff00ff);
 
-    tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_rn, 0xffff);
-    tcg_gen_bswap16_i64(tcg_ctx, tcg_rd, tcg_tmp);
-
-    tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 16);
-    tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_tmp, 0xffff);
-    tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
-    tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 16, 16);
-
-    if (sf) {
-        tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 32);
-        tcg_gen_andi_i64(tcg_ctx, tcg_tmp, tcg_tmp, 0xffff);
-        tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
-        tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 32, 16);
-
-        tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 48);
-        tcg_gen_bswap16_i64(tcg_ctx, tcg_tmp, tcg_tmp);
-        tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, 48, 16);
-    }
+    tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_rn, 8);
+    tcg_gen_and_i64(tcg_ctx, tcg_rd, tcg_rn, mask);
+    tcg_gen_and_i64(tcg_ctx, tcg_tmp, tcg_tmp, mask);
+    tcg_gen_shli_i64(tcg_ctx, tcg_rd, tcg_rd, 8);
+    tcg_gen_or_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp);
 
+    tcg_temp_free_i64(tcg_ctx, mask);
     tcg_temp_free_i64(tcg_ctx, tcg_tmp);
 }
 
diff --git a/qemu/target-arm/translate.c b/qemu/target-arm/translate.c
index 931265fe..9db59a2d 100644
--- a/qemu/target-arm/translate.c
+++ b/qemu/target-arm/translate.c
@@ -248,11 +248,13 @@ static void gen_rev16(DisasContext *s, TCGv_i32 var)
 {
     TCGContext *tcg_ctx = s->uc->tcg_ctx;
     TCGv_i32 tmp = tcg_temp_new_i32(tcg_ctx);
+    TCGv_i32 mask = tcg_const_i32(tcg_ctx, 0x00ff00ff);
     tcg_gen_shri_i32(tcg_ctx, tmp, var, 8);
-    tcg_gen_andi_i32(tcg_ctx, tmp, tmp, 0x00ff00ff);
+    tcg_gen_and_i32(tcg_ctx, tmp, tmp, mask);
+    tcg_gen_and_i32(tcg_ctx, var, var, mask);
     tcg_gen_shli_i32(tcg_ctx, var, var, 8);
-    tcg_gen_andi_i32(tcg_ctx, var, var, 0xff00ff00);
     tcg_gen_or_i32(tcg_ctx, var, var, tmp);
+    tcg_temp_free_i32(tcg_ctx, mask);
     tcg_temp_free_i32(tcg_ctx, tmp);
 }