diff --git a/qemu/hw/intc/apic_common.c b/qemu/hw/intc/apic_common.c
index ad7b35aa..d4d8b004 100644
--- a/qemu/hw/intc/apic_common.c
+++ b/qemu/hw/intc/apic_common.c
@@ -161,7 +161,7 @@ void apic_init_reset(struct uc_struct *uc, DeviceState *dev)
     }
 }
 
-void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev)
+void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev, bool bsp)
 {
     APICCommonState *s;
 
@@ -170,7 +170,11 @@ void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev)
     }
 
     s = APIC_COMMON(uc, dev);
-    s->apicbase |= MSR_IA32_APICBASE_BSP;
+    if (bsp) {
+        s->apicbase |= MSR_IA32_APICBASE_BSP;
+    } else {
+        s->apicbase &= ~MSR_IA32_APICBASE_BSP;
+    }
 }
 
 static void apic_reset_common(struct uc_struct *uc, DeviceState *dev)
diff --git a/qemu/include/hw/i386/apic.h b/qemu/include/hw/i386/apic.h
index 42b90b94..9e093439 100644
--- a/qemu/include/hw/i386/apic.h
+++ b/qemu/include/hw/i386/apic.h
@@ -15,7 +15,7 @@ void apic_sipi(DeviceState *s);
 void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
                                    TPRAccess access);
 void apic_poll_irq(DeviceState *d);
-void apic_designate_bsp(struct uc_struct *uc, DeviceState *d);
+void apic_designate_bsp(struct uc_struct *uc, DeviceState *d, bool bsp);
 
 /* pc.c */
 DeviceState *cpu_get_current_apic(struct uc_struct *uc);
diff --git a/qemu/target-i386/cpu.c b/qemu/target-i386/cpu.c
index d368d230..64970562 100644
--- a/qemu/target-i386/cpu.c
+++ b/qemu/target-i386/cpu.c
@@ -2289,9 +2289,7 @@ static void x86_cpu_reset(CPUState *s)
 
 #if !defined(CONFIG_USER_ONLY)
     /* We hard-wire the BSP to the first CPU. */
-    if (s->cpu_index == 0) {
-        apic_designate_bsp(env->uc, cpu->apic_state);
-    }
+    apic_designate_bsp(env->uc, cpu->apic_state, s->cpu_index == 0);
 
     s->halted = !cpu_is_bsp(cpu);
 #endif