From 8f53f09a05fbfe44ae29cec9632b17d379d3a947 Mon Sep 17 00:00:00 2001
From: Richard Henderson <richard.henderson@linaro.org>
Date: Thu, 13 Jun 2019 15:05:34 -0400
Subject: [PATCH] cpu: Introduce CPUNegativeOffsetState

Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.

Backports commit 5b146dc716cfd247f99556c04e6e46fbd67565a0 from qemu
---
 qemu/include/exec/cpu-all.h  | 24 ++++++++++++++++++++++++
 qemu/include/exec/cpu-defs.h |  9 +++++++++
 qemu/target/arm/cpu.h        |  1 +
 qemu/target/i386/cpu.h       |  1 +
 qemu/target/m68k/cpu.h       |  1 +
 qemu/target/mips/cpu.h       |  1 +
 qemu/target/riscv/cpu.h      |  1 +
 qemu/target/sparc/cpu.h      |  1 +
 8 files changed, 39 insertions(+)

diff --git a/qemu/include/exec/cpu-all.h b/qemu/include/exec/cpu-all.h
index ce6cc94e..dd9e3bfe 100644
--- a/qemu/include/exec/cpu-all.h
+++ b/qemu/include/exec/cpu-all.h
@@ -408,4 +408,28 @@ static inline CPUState *env_cpu(CPUArchState *env)
     return &env_archcpu(env)->parent_obj;
 }
 
+/**
+ * env_neg(env)
+ * @env: The architecture environment
+ *
+ * Return the CPUNegativeOffsetState associated with the environment.
+ */
+static inline CPUNegativeOffsetState *env_neg(CPUArchState *env)
+{
+    ArchCPU *arch_cpu = container_of(env, ArchCPU, env);
+    return &arch_cpu->neg;
+}
+
+/**
+ * cpu_neg(cpu)
+ * @cpu: The generic CPUState
+ *
+ * Return the CPUNegativeOffsetState associated with the cpu.
+ */
+static inline CPUNegativeOffsetState *cpu_neg(CPUState *cpu)
+{
+    ArchCPU *arch_cpu = container_of(cpu, ArchCPU, parent_obj);
+    return &arch_cpu->neg;
+}
+
 #endif /* CPU_ALL_H */
diff --git a/qemu/include/exec/cpu-defs.h b/qemu/include/exec/cpu-defs.h
index faf82d5d..9de8f51f 100644
--- a/qemu/include/exec/cpu-defs.h
+++ b/qemu/include/exec/cpu-defs.h
@@ -214,4 +214,13 @@ typedef struct CPUTLBDesc {
     CPU_COMMON_TLB                                                      \
     uint64_t invalid_addr; \
     int invalid_error;
+
+/*
+ * This structure must be placed in ArchCPU immedately
+ * before CPUArchState, as a field named "neg".
+ */
+typedef struct CPUNegativeOffsetState {
+    /* Empty */
+} CPUNegativeOffsetState;
+
 #endif
diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h
index 6ba79bb9..da3806f0 100644
--- a/qemu/target/arm/cpu.h
+++ b/qemu/target/arm/cpu.h
@@ -724,6 +724,7 @@ struct ARMCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUARMState env;
 
     /* Coprocessor information */
diff --git a/qemu/target/i386/cpu.h b/qemu/target/i386/cpu.h
index 4bea4bd3..14169213 100644
--- a/qemu/target/i386/cpu.h
+++ b/qemu/target/i386/cpu.h
@@ -1311,6 +1311,7 @@ struct X86CPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUX86State env;
 
     bool hyperv_vapic;
diff --git a/qemu/target/m68k/cpu.h b/qemu/target/m68k/cpu.h
index f43edb4a..a7c6e21e 100644
--- a/qemu/target/m68k/cpu.h
+++ b/qemu/target/m68k/cpu.h
@@ -164,6 +164,7 @@ struct M68kCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUM68KState env;
 };
 
diff --git a/qemu/target/mips/cpu.h b/qemu/target/mips/cpu.h
index aa0b5e81..f6eca939 100644
--- a/qemu/target/mips/cpu.h
+++ b/qemu/target/mips/cpu.h
@@ -1066,6 +1066,7 @@ struct MIPSCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUMIPSState env;
 };
 
diff --git a/qemu/target/riscv/cpu.h b/qemu/target/riscv/cpu.h
index 2520ab25..345bfcdf 100644
--- a/qemu/target/riscv/cpu.h
+++ b/qemu/target/riscv/cpu.h
@@ -215,6 +215,7 @@ typedef struct RISCVCPU {
     /*< private >*/
     CPUState parent_obj;
     /*< public >*/
+    CPUNegativeOffsetState neg;
     CPURISCVState env;
 } RISCVCPU;
 
diff --git a/qemu/target/sparc/cpu.h b/qemu/target/sparc/cpu.h
index 6f0b38a8..bdcc5fa4 100644
--- a/qemu/target/sparc/cpu.h
+++ b/qemu/target/sparc/cpu.h
@@ -525,6 +525,7 @@ struct SPARCCPU {
     CPUState parent_obj;
     /*< public >*/
 
+    CPUNegativeOffsetState neg;
     CPUSPARCState env;
 };