From 9287750362a4ce0e213d519a7a4c40d582700755 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 24 May 2019 18:01:03 -0400 Subject: [PATCH] target/arm: Simplify BFXIL expansion The mask implied by the extract is redundant with the one implied by the deposit. Also, fix spelling of BFXIL. Backports commit 87eb65a3c45c788a309986d48170a54a0d1c0705 from qemu --- qemu/target/arm/translate-a64.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/qemu/target/arm/translate-a64.c b/qemu/target/arm/translate-a64.c index e4c725d0..091c5462 100644 --- a/qemu/target/arm/translate-a64.c +++ b/qemu/target/arm/translate-a64.c @@ -4126,8 +4126,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) tcg_gen_extract_i64(tcg_ctx, tcg_rd, tcg_tmp, ri, len); return; } - /* opc == 1, BXFIL fall through to deposit */ - tcg_gen_extract_i64(tcg_ctx, tcg_tmp, tcg_tmp, ri, len); + /* opc == 1, BFXIL fall through to deposit */ + tcg_gen_shri_i64(tcg_ctx, tcg_tmp, tcg_tmp, ri); pos = 0; } else { /* Handle the ri > si case with a deposit @@ -4145,7 +4145,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn) len = ri; } - if (opc == 1) { /* BFM, BXFIL */ + if (opc == 1) { /* BFM, BFXIL */ tcg_gen_deposit_i64(tcg_ctx, tcg_rd, tcg_rd, tcg_tmp, pos, len); } else { /* SBFM or UBFM: We start with zero, and we haven't modified