diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c
index f9a2a3a6..30808df9 100644
--- a/qemu/target-arm/helper.c
+++ b/qemu/target-arm/helper.c
@@ -2898,6 +2898,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
       0, PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.far_el[2]) },
     { "SPSR_EL2", 0,4,0, 3,4,0, ARM_CP_STATE_AA64,
       ARM_CP_ALIAS, PL2_RW, 0, NULL, 0, offsetof(CPUARMState, banked_spsr[6]) },
+    { "SPSR_IRQ", 0,4,3, 3,4,0, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
+      PL2_RW, 0, NULL, 0, offsetof(CPUARMState, banked_spsr[4]) },
+    { "SPSR_ABT", 0,4,3, 3,4,1, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
+      PL2_RW, 0, NULL, 0, offsetof(CPUARMState, banked_spsr[2]) },
+    { "SPSR_UND", 0,4,3, 3,4,2, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
+      PL2_RW, 0, NULL, 0, offsetof(CPUARMState, banked_spsr[3]) },
+    { "SPSR_FIQ", 0,4,3, 3,4,3, ARM_CP_STATE_AA64, ARM_CP_ALIAS,
+      PL2_RW, 0, NULL, 0, offsetof(CPUARMState, banked_spsr[5]) },
     { "VBAR_EL2", 0,12,0, 3,4,0, ARM_CP_STATE_AA64,
       0, PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.vbar_el[2]), {0, 0},
       NULL, NULL, vbar_write, },