From 96230470972ac950365b65f888fbe982816c9674 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 2 Mar 2021 13:20:58 -0500 Subject: [PATCH] target/arm: Fix neon VTBL/VTBX for len > 1 The helper function did not get updated when we reorganized the vector register file for SVE. Since then, the neon dregs are non-sequential and cannot be simply indexed. At the same time, make the helper function operate on 64-bit quantities so that we do not have to call it twice. Backports 604cef3e57eaeeef77074d78f6cf2eca1be11c62 --- qemu/target/arm/helper.h | 2 +- qemu/target/arm/op_helper.c | 23 ++++++++------- qemu/target/arm/translate-neon.inc.c | 44 ++++++++++------------------ 3 files changed, 29 insertions(+), 40 deletions(-) diff --git a/qemu/target/arm/helper.h b/qemu/target/arm/helper.h index 11c7b658..87f1b3a7 100644 --- a/qemu/target/arm/helper.h +++ b/qemu/target/arm/helper.h @@ -243,7 +243,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32) DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32) -DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i64, env, i32, i64, i64) DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) diff --git a/qemu/target/arm/op_helper.c b/qemu/target/arm/op_helper.c index 2f2f1e9a..8e1c8b5b 100644 --- a/qemu/target/arm/op_helper.c +++ b/qemu/target/arm/op_helper.c @@ -68,21 +68,24 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome, cpu_loop_exit_restore(cs, ra); } -uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, - uint32_t maxindex) +uint64_t HELPER(neon_tbl)(CPUARMState *env, uint32_t desc, + uint64_t ireg, uint64_t def) { - uint32_t val, shift; - uint64_t *table = vn; + uint64_t tmp, val = 0; + uint32_t maxindex = ((desc & 3) + 1) * 8; + uint32_t base_reg = desc >> 2; + uint32_t shift, index, reg; - val = 0; - for (shift = 0; shift < 32; shift += 8) { - uint32_t index = (ireg >> shift) & 0xff; + for (shift = 0; shift < 64; shift += 8) { + index = (ireg >> shift) & 0xff; if (index < maxindex) { - uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; - val |= tmp << shift; + reg = base_reg + (index >> 3); + tmp = *aa32_vfp_dreg(env, reg); + tmp = ((tmp >> ((index & 7) << 3)) & 0xff) << shift; } else { - val |= def & (0xff << shift); + tmp = def & (0xffull << shift); } + val |= tmp; } return val; } diff --git a/qemu/target/arm/translate-neon.inc.c b/qemu/target/arm/translate-neon.inc.c index 3f54c233..89a261db 100644 --- a/qemu/target/arm/translate-neon.inc.c +++ b/qemu/target/arm/translate-neon.inc.c @@ -2903,9 +2903,8 @@ static bool trans_VEXT(DisasContext *s, arg_VEXT *a) static bool trans_VTBL(DisasContext *s, arg_VTBL *a) { TCGContext *tcg_ctx = s->uc->tcg_ctx; - int n; - TCGv_i32 tmp, tmp2, tmp3, tmp4; - TCGv_ptr ptr1; + TCGv_i64 val, def; + TCGv_i32 desc; if (!arm_dc_feature(s, ARM_FEATURE_NEON)) { return false; @@ -2921,43 +2920,30 @@ static bool trans_VTBL(DisasContext *s, arg_VTBL *a) return true; } - n = a->len + 1; - if ((a->vn + n) > 32) { + if ((a->vn + a->len + 1) > 32) { /* * This is UNPREDICTABLE; we choose to UNDEF to avoid the * helper function running off the end of the register file. */ return false; } - n <<= 3; - tmp = tcg_temp_new_i32(tcg_ctx); - if (a->op) { - read_neon_element32(s, tmp, a->vd, 0, MO_32); - } else { - tcg_gen_movi_i32(tcg_ctx, tmp, 0); - } - tmp2 = tcg_temp_new_i32(tcg_ctx); - read_neon_element32(s, tmp2, a->vm, 0, MO_32); - ptr1 = vfp_reg_ptr(s, true, a->vn); - tmp4 = tcg_const_i32(tcg_ctx, n); - gen_helper_neon_tbl(tcg_ctx, tmp2, tmp2, tmp, ptr1, tmp4); + desc = tcg_const_i32(tcg_ctx, (a->vn << 2) | a->len); + def = tcg_temp_new_i64(tcg_ctx); if (a->op) { - read_neon_element32(s, tmp, a->vd, 1, MO_32); + read_neon_element64(s, def, a->vd, 0, MO_64); } else { - tcg_gen_movi_i32(tcg_ctx, tmp, 0); + tcg_gen_movi_i64(tcg_ctx, def, 0); } - tmp3 = tcg_temp_new_i32(tcg_ctx); - read_neon_element32(s, tmp3, a->vm, 1, MO_32); - gen_helper_neon_tbl(tcg_ctx, tmp3, tmp3, tmp, ptr1, tmp4); - tcg_temp_free_i32(tcg_ctx, tmp); - tcg_temp_free_i32(tcg_ctx, tmp4); - tcg_temp_free_ptr(tcg_ctx, ptr1); + val = tcg_temp_new_i64(tcg_ctx); + read_neon_element64(s, val, a->vm, 0, MO_64); - write_neon_element32(s, tmp2, a->vd, 0, MO_32); - write_neon_element32(s, tmp3, a->vd, 1, MO_32); - tcg_temp_free_i32(tcg_ctx, tmp2); - tcg_temp_free_i32(tcg_ctx, tmp3); + gen_helper_neon_tbl(tcg_ctx, val, tcg_ctx->cpu_env, desc, val, def); + write_neon_element64(s, val, a->vd, 0, MO_64); + + tcg_temp_free_i64(tcg_ctx, def); + tcg_temp_free_i64(tcg_ctx, val); + tcg_temp_free_i32(tcg_ctx, desc); return true; }