From 9e23308b6625b210d257b42a9b8e1cf0b47b093a Mon Sep 17 00:00:00 2001 From: Peter Crosthwaite Date: Wed, 14 Feb 2018 14:13:43 -0500 Subject: [PATCH] cpu: Change cpu_exec_init() arg to cpu, not env The callers (most of them in target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from core code (in exec.c). Backports commit 4bad9e392e788a218967167a38ce2ae7a32a6231 from qemu --- qemu/exec.c | 5 ++--- qemu/include/exec/exec-all.h | 2 +- qemu/target-arm/cpu.c | 2 +- qemu/target-i386/cpu.c | 2 +- qemu/target-m68k/cpu.c | 2 +- qemu/target-mips/cpu.c | 2 +- qemu/target-sparc/cpu.c | 2 +- 7 files changed, 8 insertions(+), 9 deletions(-) diff --git a/qemu/exec.c b/qemu/exec.c index a477e2e6..edb5ce6e 100644 --- a/qemu/exec.c +++ b/qemu/exec.c @@ -402,10 +402,10 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as) } #endif -void cpu_exec_init(CPUArchState *env, void *opaque) +void cpu_exec_init(CPUState *cpu, void *opaque) { struct uc_struct *uc = opaque; - CPUState *cpu = ENV_GET_CPU(env); + CPUArchState *env = cpu->env_ptr; cpu->uc = uc; env->uc = uc; @@ -627,7 +627,6 @@ void cpu_single_step(CPUState *cpu, int enabled) { #if defined(TARGET_HAS_ICE) if (cpu->singlestep_enabled != enabled) { - CPUArchState *env; cpu->singlestep_enabled = enabled; /* must flush all the translated code to avoid inconsistencies */ /* XXX: only flush what is necessary */ diff --git a/qemu/include/exec/exec-all.h b/qemu/include/exec/exec-all.h index 9b96da51..afc3889e 100644 --- a/qemu/include/exec/exec-all.h +++ b/qemu/include/exec/exec-all.h @@ -83,7 +83,7 @@ void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, int flags, int cflags); -void cpu_exec_init(CPUArchState *env, void *opaque); +void cpu_exec_init(CPUState *env, void *opaque); void QEMU_NORETURN cpu_loop_exit(CPUState *cpu); #if !defined(CONFIG_USER_ONLY) diff --git a/qemu/target-arm/cpu.c b/qemu/target-arm/cpu.c index 5c2c23b5..345658d1 100644 --- a/qemu/target-arm/cpu.c +++ b/qemu/target-arm/cpu.c @@ -334,7 +334,7 @@ static void arm_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque) uint32_t Aff1, Aff0; cs->env_ptr = &cpu->env; - cpu_exec_init(&cpu->env, opaque); + cpu_exec_init(cs, opaque); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/qemu/target-i386/cpu.c b/qemu/target-i386/cpu.c index c7543650..ebbbff78 100644 --- a/qemu/target-i386/cpu.c +++ b/qemu/target-i386/cpu.c @@ -2409,7 +2409,7 @@ static void x86_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque) CPUX86State *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env, opaque); + cpu_exec_init(cs, opaque); object_property_add(obj, "family", "int", x86_cpuid_version_get_family, diff --git a/qemu/target-m68k/cpu.c b/qemu/target-m68k/cpu.c index f000648f..9d25b270 100644 --- a/qemu/target-m68k/cpu.c +++ b/qemu/target-m68k/cpu.c @@ -166,7 +166,7 @@ static void m68k_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque) CPUM68KState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env, opaque); + cpu_exec_init(cs, opaque); if (tcg_enabled(uc)) { m68k_tcg_init(uc); diff --git a/qemu/target-mips/cpu.c b/qemu/target-mips/cpu.c index 3b0d422f..c4cce168 100644 --- a/qemu/target-mips/cpu.c +++ b/qemu/target-mips/cpu.c @@ -110,7 +110,7 @@ static void mips_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque) CPUMIPSState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env, opaque); + cpu_exec_init(cs, opaque); if (tcg_enabled(uc)) { mips_tcg_init(uc); diff --git a/qemu/target-sparc/cpu.c b/qemu/target-sparc/cpu.c index 9c9c5ead..662bbda2 100644 --- a/qemu/target-sparc/cpu.c +++ b/qemu/target-sparc/cpu.c @@ -849,7 +849,7 @@ static void sparc_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque) CPUSPARCState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(env, opaque); + cpu_exec_init(cs, opaque); if (tcg_enabled(uc)) { gen_intermediate_code_init(env);