From a0c86a34094bd1bbb0f83586ccf4a0357ad09bf6 Mon Sep 17 00:00:00 2001
From: Laurent Vivier <laurent@vivier.eu>
Date: Thu, 15 Mar 2018 16:12:14 -0400
Subject: [PATCH] target/m68k: implement fsincos

using floatx80_sin() and floatx80_cos()

Backports commit 47446c9ce34b6685ffe20e829ff6c9aaefd3af0a from qemu
---
 qemu/target/m68k/fpu_helper.c | 11 +++++++++++
 qemu/target/m68k/helper.h     |  1 +
 qemu/target/m68k/translate.c  |  8 ++++++++
 3 files changed, 20 insertions(+)

diff --git a/qemu/target/m68k/fpu_helper.c b/qemu/target/m68k/fpu_helper.c
index d7687889..46cd33ae 100644
--- a/qemu/target/m68k/fpu_helper.c
+++ b/qemu/target/m68k/fpu_helper.c
@@ -618,3 +618,14 @@ void HELPER(fcos)(CPUM68KState *env, FPReg *res, FPReg *val)
 {
     res->d = floatx80_cos(val->d, &env->fp_status);
 }
+
+void HELPER(fsincos)(CPUM68KState *env, FPReg *res0, FPReg *res1, FPReg *val)
+{
+    floatx80 a = val->d;
+    /* If res0 and res1 specify the same floating-point data register,
+     * the sine result is stored in the register, and the cosine
+     * result is discarded.
+     */
+    res1->d = floatx80_cos(a, &env->fp_status);
+    res0->d = floatx80_sin(a, &env->fp_status);
+}
diff --git a/qemu/target/m68k/helper.h b/qemu/target/m68k/helper.h
index 757fa795..ad2f373d 100644
--- a/qemu/target/m68k/helper.h
+++ b/qemu/target/m68k/helper.h
@@ -80,6 +80,7 @@ DEF_HELPER_3(ftentox, void, env, fp, fp)
 DEF_HELPER_3(ftan, void, env, fp, fp)
 DEF_HELPER_3(fsin, void, env, fp, fp)
 DEF_HELPER_3(fcos, void, env, fp, fp)
+DEF_HELPER_4(fsincos, void, env, fp, fp, fp)
 
 DEF_HELPER_3(mac_move, void, env, i32, i32)
 DEF_HELPER_3(macmulf, i64, env, i32, i32)
diff --git a/qemu/target/m68k/translate.c b/qemu/target/m68k/translate.c
index 42e4995d..000178bd 100644
--- a/qemu/target/m68k/translate.c
+++ b/qemu/target/m68k/translate.c
@@ -5393,6 +5393,14 @@ DISAS_INSN(fpu)
     case 0x6c: /* fdsub */
         gen_helper_fdsub(tcg_ctx, uc->cpu_env, cpu_dest, cpu_src, cpu_dest);
         break;
+    case 0x30: case 0x31: case 0x32:
+    case 0x33: case 0x34: case 0x35:
+    case 0x36: case 0x37: {
+            TCGv_ptr cpu_dest2 = gen_fp_ptr(s, REG(ext, 0));
+            gen_helper_fsincos(tcg_ctx, uc->cpu_env, cpu_dest, cpu_dest2, cpu_src);
+            tcg_temp_free_ptr(tcg_ctx, cpu_dest2);
+        }
+        break;
     case 0x38: /* fcmp */
         gen_helper_fcmp(tcg_ctx, uc->cpu_env, cpu_src, cpu_dest);
         return;