diff --git a/qemu/target-mips/translate.c b/qemu/target-mips/translate.c
index 0b670b19..9ad47b60 100644
--- a/qemu/target-mips/translate.c
+++ b/qemu/target-mips/translate.c
@@ -1420,6 +1420,7 @@ typedef struct DisasContext {
     bool vp;
     bool cmgcr;
     bool mrp;
+    bool abs2008;
     // Unicorn engine
     struct uc_struct *uc;
 } DisasContext;
@@ -8960,7 +8961,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_abs_s(tcg_ctx, fp0, fp0);
+            if (ctx->abs2008) {
+                tcg_gen_andi_i32(tcg_ctx, fp0, fp0, 0x7fffffffUL);
+            } else {
+                gen_helper_float_abs_s(tcg_ctx, fp0, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -8979,7 +8984,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i32 fp0 = tcg_temp_new_i32(tcg_ctx);
 
             gen_load_fpr32(ctx, fp0, fs);
-            gen_helper_float_chs_s(tcg_ctx, fp0, fp0);
+            if (ctx->abs2008) {
+                tcg_gen_xori_i32(tcg_ctx, fp0, fp0, 1UL << 31);
+            } else {
+                gen_helper_float_chs_s(tcg_ctx, fp0, fp0);
+            }
             gen_store_fpr32(ctx, fp0, fd);
             tcg_temp_free_i32(tcg_ctx, fp0);
         }
@@ -9450,7 +9459,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_abs_d(tcg_ctx, fp0, fp0);
+            if (ctx->abs2008) {
+                tcg_gen_andi_i64(tcg_ctx, fp0, fp0, 0x7fffffffffffffffULL);
+            } else {
+                gen_helper_float_abs_d(tcg_ctx, fp0, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -9471,7 +9484,11 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
             TCGv_i64 fp0 = tcg_temp_new_i64(tcg_ctx);
 
             gen_load_fpr64(ctx, fp0, fs);
-            gen_helper_float_chs_d(tcg_ctx, fp0, fp0);
+            if (ctx->abs2008) {
+                tcg_gen_xori_i64(tcg_ctx, fp0, fp0, 1ULL << 63);
+            } else {
+                gen_helper_float_chs_d(tcg_ctx, fp0, fp0);
+            }
             gen_store_fpr64(ctx, fp0, fd);
             tcg_temp_free_i64(tcg_ctx, fp0);
         }
@@ -19911,6 +19928,7 @@ void gen_intermediate_code(CPUMIPSState *env, struct TranslationBlock *tb)
              (env->insn_flags & (INSN_LOONGSON2E | INSN_LOONGSON2F));
     ctx.vp = (env->CP0_Config5 >> CP0C5_VP) & 1;
     ctx.mrp = (env->CP0_Config5 >> CP0C5_MRP) & 1;
+    ctx.abs2008 = (env->active_fpu.fcr31 >> FCR31_ABS2008) & 1;
     restore_cpu_state(env, &ctx);
 #ifdef CONFIG_USER_ONLY
         ctx.mem_idx = MIPS_HFLAG_UM;