From a417227674a555e82ab6270628a232293047d385 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 21 May 2020 17:45:00 -0400 Subject: [PATCH] softfloat: Replace flag with bool We have had this on the to-do list for quite some time. Backports commit c120391c0090d9c40425c92cdb00f38ea8588ff6 from qemu --- qemu/fpu/softfloat-specialize.inc.c | 16 +-- qemu/fpu/softfloat.c | 190 +++++++++++++-------------- qemu/include/fpu/softfloat-helpers.h | 14 +- qemu/include/fpu/softfloat-macros.h | 24 ++-- qemu/include/fpu/softfloat-types.h | 14 +- qemu/include/fpu/softfloat.h | 10 +- qemu/target/arm/sve_helper.c | 8 +- qemu/target/arm/vfp_helper.c | 8 +- qemu/target/m68k/softfloat.c | 70 +++++----- qemu/target/mips/msa_helper.c | 10 +- 10 files changed, 174 insertions(+), 190 deletions(-) diff --git a/qemu/fpu/softfloat-specialize.inc.c b/qemu/fpu/softfloat-specialize.inc.c index 4f7e0735..44e32743 100644 --- a/qemu/fpu/softfloat-specialize.inc.c +++ b/qemu/fpu/softfloat-specialize.inc.c @@ -93,7 +93,7 @@ this code that are retained. * 2008 revision and backward compatibility with their original choice. * Thus for MIPS we must make the choice at runtime. */ -static inline flag snan_bit_is_one(float_status *status) +static inline bool snan_bit_is_one(float_status *status) { #if defined(TARGET_MIPS) return status->snan_bit_is_one; @@ -114,7 +114,7 @@ static bool parts_is_snan_frac(uint64_t frac, float_status *status) #ifdef NO_SIGNALING_NANS return false; #else - flag msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); + bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1); return msb == snan_bit_is_one(status); #endif } @@ -236,7 +236,7 @@ void float_raise(uint8_t flags, float_status *status) | Internal canonical NaN format. *----------------------------------------------------------------------------*/ typedef struct { - flag sign; + bool sign; uint64_t high, low; } commonNaNT; @@ -374,7 +374,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status) *----------------------------------------------------------------------------*/ static int pickNaN(FloatClass a_cls, FloatClass b_cls, - flag aIsLargerSignificand) + bool aIsLargerSignificand) { #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take @@ -576,7 +576,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint32_t av, bv; FloatClass a_cls, b_cls; @@ -714,7 +714,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_status *status) static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; uint64_t av, bv; FloatClass a_cls, b_cls; @@ -882,7 +882,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float_status *status) floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; /* This is not complete, but is good enough for pickNaN. */ @@ -1030,7 +1030,7 @@ static float128 commonNaNToFloat128(commonNaNT a, float_status *status) static float128 propagateFloat128NaN(float128 a, float128 b, float_status *status) { - flag aIsLargerSignificand; + bool aIsLargerSignificand; FloatClass a_cls, b_cls; /* This is not complete, but is good enough for pickNaN. */ diff --git a/qemu/fpu/softfloat.c b/qemu/fpu/softfloat.c index 6621bd91..4c44da1e 100644 --- a/qemu/fpu/softfloat.c +++ b/qemu/fpu/softfloat.c @@ -424,7 +424,7 @@ static inline int extractFloat32Exp(float32 a) | Returns the sign bit of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -static inline flag extractFloat32Sign(float32 a) +static inline bool extractFloat32Sign(float32 a) { return float32_val(a) >> 31; } @@ -451,7 +451,7 @@ static inline int extractFloat64Exp(float64 a) | Returns the sign bit of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -static inline flag extractFloat64Sign(float64 a) +static inline bool extractFloat64Sign(float64 a) { return float64_val(a) >> 63; } @@ -3289,10 +3289,11 @@ float64 float64_squash_input_denormal(float64 a, float_status *status) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status) +static int32_t roundAndPackInt32(bool zSign, uint64_t absZ, + float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; int32_t z; @@ -3346,11 +3347,11 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status | returned. *----------------------------------------------------------------------------*/ -static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1, +static int64_t roundAndPackInt64(bool zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; int64_t z; roundingMode = status->float_rounding_mode; @@ -3404,11 +3405,11 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1, | exception is raised and the largest unsigned integer is returned. *----------------------------------------------------------------------------*/ -static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0, +static int64_t roundAndPackUint64(bool zSign, uint64_t absZ0, uint64_t absZ1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment; + bool roundNearestEven, increment; roundingMode = status->float_rounding_mode; roundNearestEven = (roundingMode == float_round_nearest_even); @@ -3492,13 +3493,13 @@ static void | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, +static float32 roundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int8_t roundIncrement, roundBits; - flag isTiny; + bool isTiny; roundingMode = status->float_rounding_mode; roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -3579,7 +3580,7 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32(flag zSign, int zExp, uint32_t zSig, + normalizeRoundAndPackFloat32(bool zSign, int zExp, uint32_t zSig, float_status *status) { int8_t shiftCount; @@ -3619,7 +3620,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig) +static inline float64 packFloat64(bool zSign, int zExp, uint64_t zSig) { return make_float64( @@ -3649,13 +3650,13 @@ static inline float64 packFloat64(flag zSign, int zExp, uint64_t zSig) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, +static float64 roundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t roundingMode; - flag roundNearestEven; + bool roundNearestEven; int roundIncrement, roundBits; - flag isTiny; + bool isTiny; roundingMode = status->float_rounding_mode; roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -3735,7 +3736,7 @@ static float64 roundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64(flag zSign, int zExp, uint64_t zSig, + normalizeRoundAndPackFloat64(bool zSign, int zExp, uint64_t zSig, float_status *status) { int8_t shiftCount; @@ -3787,12 +3788,12 @@ void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr, | Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; int64_t roundIncrement, roundMask, roundBits; roundingMode = status->float_rounding_mode; @@ -3986,7 +3987,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, *----------------------------------------------------------------------------*/ floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { @@ -4045,11 +4046,9 @@ static inline int32_t extractFloat128Exp( float128 a ) | Returns the sign bit of the quadruple-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -static inline flag extractFloat128Sign( float128 a ) +static inline bool extractFloat128Sign( float128 a ) { - - return a.high>>63; - + return a.high >> 63; } /*---------------------------------------------------------------------------- @@ -4107,14 +4106,13 @@ static void *----------------------------------------------------------------------------*/ static inline float128 - packFloat128( flag zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1 ) +packFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1) { float128 z; z.low = zSig1; - z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0; + z.high = ((uint64_t)zSign << 63) + ((uint64_t)zExp << 48) + zSig0; return z; - } /*---------------------------------------------------------------------------- @@ -4138,12 +4136,12 @@ static inline float128 | overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float128 roundAndPackFloat128(flag zSign, int32_t zExp, +static float128 roundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2, float_status *status) { int8_t roundingMode; - flag roundNearestEven, increment, isTiny; + bool roundNearestEven, increment, isTiny; roundingMode = status->float_rounding_mode; roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -4263,7 +4261,7 @@ static float128 roundAndPackFloat128(flag zSign, int32_t zExp, | point exponent. *----------------------------------------------------------------------------*/ -static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp, +static float128 normalizeRoundAndPackFloat128(bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status) { @@ -4299,7 +4297,7 @@ static float128 normalizeRoundAndPackFloat128(flag zSign, int32_t zExp, floatx80 int32_to_floatx80(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig; @@ -4321,7 +4319,7 @@ floatx80 int32_to_floatx80(int32_t a, float_status *status) float128 int32_to_float128(int32_t a, float_status *status) { - flag zSign; + bool zSign; uint32_t absA; int8_t shiftCount; uint64_t zSig0; @@ -4344,7 +4342,7 @@ float128 int32_to_float128(int32_t a, float_status *status) floatx80 int64_to_floatx80(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; @@ -4364,7 +4362,7 @@ floatx80 int64_to_floatx80(int64_t a, float_status *status) float128 int64_to_float128(int64_t a, float_status *status) { - flag zSign; + bool zSign; uint64_t absA; int8_t shiftCount; int32_t zExp; @@ -4413,7 +4411,7 @@ float128 uint64_to_float128(uint64_t a, float_status *status) floatx80 float32_to_floatx80(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; @@ -4449,7 +4447,7 @@ floatx80 float32_to_floatx80(float32 a, float_status *status) float128 float32_to_float128(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; @@ -4480,7 +4478,7 @@ float128 float32_to_float128(float32 a, float_status *status) float32 float32_rem(float32 a, float32 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; @@ -4615,7 +4613,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2(float32 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint32_t aSig; float64 r, x, xn; @@ -4665,7 +4663,7 @@ float32 float32_exp2(float32 a, float_status *status) *----------------------------------------------------------------------------*/ float32 float32_log2(float32 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint32_t aSig, zSig, i; @@ -4741,7 +4739,7 @@ int float32_eq(float32 a, float32 b, float_status *status) int float32_le(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a = float32_squash_input_denormal(a, status); b = float32_squash_input_denormal(b, status); @@ -4770,7 +4768,7 @@ int float32_le(float32 a, float32 b, float_status *status) int float32_lt(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a = float32_squash_input_denormal(a, status); b = float32_squash_input_denormal(b, status); @@ -4845,7 +4843,7 @@ int float32_eq_quiet(float32 a, float32 b, float_status *status) int float32_le_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a = float32_squash_input_denormal(a, status); b = float32_squash_input_denormal(b, status); @@ -4877,7 +4875,7 @@ int float32_le_quiet(float32 a, float32 b, float_status *status) int float32_lt_quiet(float32 a, float32 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint32_t av, bv; a = float32_squash_input_denormal(a, status); b = float32_squash_input_denormal(b, status); @@ -4933,7 +4931,7 @@ int float32_unordered_quiet(float32 a, float32 b, float_status *status) floatx80 float64_to_floatx80(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig; @@ -4970,7 +4968,7 @@ floatx80 float64_to_floatx80(float64 a, float_status *status) float128 float64_to_float128(float64 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; @@ -5003,7 +5001,7 @@ float128 float64_to_float128(float64 a, float_status *status) float64 float64_rem(float64 a, float64 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; @@ -5090,7 +5088,7 @@ float64 float64_rem(float64 a, float64 b, float_status *status) *----------------------------------------------------------------------------*/ float64 float64_log2(float64 a, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int aExp; uint64_t aSig, aSig0, aSig1, zSig, i; a = float64_squash_input_denormal(a, status); @@ -5166,7 +5164,7 @@ int float64_eq(float64 a, float64 b, float_status *status) int float64_le(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a = float64_squash_input_denormal(a, status); b = float64_squash_input_denormal(b, status); @@ -5195,7 +5193,7 @@ int float64_le(float64 a, float64 b, float_status *status) int float64_lt(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a = float64_squash_input_denormal(a, status); @@ -5273,7 +5271,7 @@ int float64_eq_quiet(float64 a, float64 b, float_status *status) int float64_le_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a = float64_squash_input_denormal(a, status); b = float64_squash_input_denormal(b, status); @@ -5305,7 +5303,7 @@ int float64_le_quiet(float64 a, float64 b, float_status *status) int float64_lt_quiet(float64 a, float64 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; uint64_t av, bv; a = float64_squash_input_denormal(a, status); b = float64_squash_input_denormal(b, status); @@ -5364,7 +5362,7 @@ int float64_unordered_quiet(float64 a, float64 b, float_status *status) int32_t floatx80_to_int32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; @@ -5395,7 +5393,7 @@ int32_t floatx80_to_int32(floatx80 a, float_status *status) int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, savedASig; int32_t z; @@ -5446,7 +5444,7 @@ int32_t floatx80_to_int32_round_to_zero(floatx80 a, float_status *status) int64_t floatx80_to_int64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig, aSigExtra; @@ -5487,7 +5485,7 @@ int64_t floatx80_to_int64(floatx80 a, float_status *status) int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig; int64_t z; @@ -5534,7 +5532,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, float_status *status) float32 floatx80_to_float32(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -5568,7 +5566,7 @@ float32 floatx80_to_float32(floatx80 a, float_status *status) float64 floatx80_to_float64(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, zSig; @@ -5602,7 +5600,7 @@ float64 floatx80_to_float64(floatx80 a, float_status *status) float128 floatx80_to_float128(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int aExp; uint64_t aSig, zSig0, zSig1; @@ -5648,7 +5646,7 @@ floatx80 floatx80_round(floatx80 a, float_status *status) floatx80 floatx80_round_to_int(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; floatx80 z; @@ -5745,7 +5743,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_status *status) | Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5825,7 +5823,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, +static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -5894,7 +5892,7 @@ static floatx80 subFloatx80Sigs(floatx80 a, floatx80 b, flag zSign, floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5919,7 +5917,7 @@ floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -5944,7 +5942,7 @@ floatx80 floatx80_sub(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; @@ -6006,7 +6004,7 @@ floatx80 floatx80_mul(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; uint64_t rem0, rem1, rem2, term0, term1, term2; @@ -6093,7 +6091,7 @@ floatx80 floatx80_div(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t q, term0, term1, alternateASig0, alternateASig1; @@ -6192,7 +6190,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_sqrt(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -6293,7 +6291,7 @@ int floatx80_eq(floatx80 a, floatx80 b, float_status *status) int floatx80_le(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) == 0x7FFF @@ -6327,7 +6325,7 @@ int floatx80_le(floatx80 a, floatx80 b, float_status *status) int floatx80_lt(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b) || (extractFloatx80Exp(a) == 0x7FFF @@ -6415,7 +6413,7 @@ int floatx80_eq_quiet(floatx80 a, floatx80 b, float_status *status) int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6455,7 +6453,7 @@ int floatx80_le_quiet(floatx80 a, floatx80 b, float_status *status) int floatx80_lt_quiet(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -6524,7 +6522,7 @@ int floatx80_unordered_quiet(floatx80 a, floatx80 b, float_status *status) int32_t float128_to_int32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; @@ -6553,7 +6551,7 @@ int32_t float128_to_int32(float128 a, float_status *status) int32_t float128_to_int32_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1, savedASig; int32_t z; @@ -6603,7 +6601,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, float_status *status) int64_t float128_to_int64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; @@ -6646,7 +6644,7 @@ int64_t float128_to_int64(float128 a, float_status *status) int64_t float128_to_int64_round_to_zero(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, shiftCount; uint64_t aSig0, aSig1; int64_t z; @@ -6711,7 +6709,7 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *status) uint64_t float128_to_uint64(float128 a, float_status *status) { - flag aSign; + bool aSign; int aExp; int shiftCount; uint64_t aSig0, aSig1; @@ -6822,7 +6820,7 @@ uint32_t float128_to_uint32(float128 a, float_status *status) float32 float128_to_float32(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; uint32_t zSig; @@ -6857,7 +6855,7 @@ float32 float128_to_float32(float128 a, float_status *status) float64 float128_to_float64(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; @@ -6890,7 +6888,7 @@ float64 float128_to_float64(float128 a, float_status *status) floatx80 float128_to_floatx80(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; @@ -6928,7 +6926,7 @@ floatx80 float128_to_floatx80(float128 a, float_status *status) float128 float128_round_to_int(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t lastBitMask, roundBitsMask; float128 z; @@ -7083,7 +7081,7 @@ float128 float128_round_to_int(float128 a, float_status *status) | Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float128 addFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 addFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7174,7 +7172,7 @@ static float128 addFloat128Sigs(float128 a, float128 b, flag zSign, | Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float128 subFloat128Sigs(float128 a, float128 b, flag zSign, +static float128 subFloat128Sigs(float128 a, float128 b, bool zSign, float_status *status) { int32_t aExp, bExp, zExp; @@ -7262,7 +7260,7 @@ static float128 subFloat128Sigs(float128 a, float128 b, flag zSign, float128 float128_add(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; aSign = extractFloat128Sign( a ); bSign = extractFloat128Sign( b ); @@ -7283,7 +7281,7 @@ float128 float128_add(float128 a, float128 b, float_status *status) float128 float128_sub(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; aSign = extractFloat128Sign( a ); bSign = extractFloat128Sign( b ); @@ -7304,7 +7302,7 @@ float128 float128_sub(float128 a, float128 b, float_status *status) float128 float128_mul(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; @@ -7367,7 +7365,7 @@ float128 float128_mul(float128 a, float128 b, float_status *status) float128 float128_div(float128 a, float128 b, float_status *status) { - flag aSign, bSign, zSign; + bool aSign, bSign, zSign; int32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7454,7 +7452,7 @@ float128 float128_div(float128 a, float128 b, float_status *status) float128 float128_rem(float128 a, float128 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; uint64_t allZero, alternateASig0, alternateASig1, sigMean1; @@ -7561,7 +7559,7 @@ float128 float128_rem(float128 a, float128 b, float_status *status) float128 float128_sqrt(float128 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; @@ -7657,7 +7655,7 @@ int float128_eq(float128 a, float128 b, float_status *status) int float128_le(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if ( ( ( extractFloat128Exp( a ) == 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) @@ -7690,7 +7688,7 @@ int float128_le(float128 a, float128 b, float_status *status) int float128_lt(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if ( ( ( extractFloat128Exp( a ) == 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) @@ -7773,7 +7771,7 @@ int float128_eq_quiet(float128 a, float128 b, float_status *status) int float128_le_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if ( ( ( extractFloat128Exp( a ) == 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) @@ -7809,7 +7807,7 @@ int float128_le_quiet(float128 a, float128 b, float_status *status) int float128_lt_quiet(float128 a, float128 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if ( ( ( extractFloat128Exp( a ) == 0x7FFF ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) @@ -7862,7 +7860,7 @@ int float128_unordered_quiet(float128 a, float128 b, float_status *status) static inline int floatx80_compare_internal(floatx80 a, floatx80 b, int is_quiet, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (floatx80_invalid_encoding(a) || floatx80_invalid_encoding(b)) { float_raise(float_flag_invalid, status); @@ -7919,7 +7917,7 @@ int floatx80_compare_quiet(floatx80 a, floatx80 b, float_status *status) static inline int float128_compare_internal(float128 a, float128 b, int is_quiet, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; if (( ( extractFloat128Exp( a ) == 0x7fff ) && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) ) || @@ -7962,7 +7960,7 @@ int float128_compare_quiet(float128 a, float128 b, float_status *status) floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -8001,7 +7999,7 @@ floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status) float128 float128_scalbn(float128 a, int n, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig0, aSig1; diff --git a/qemu/include/fpu/softfloat-helpers.h b/qemu/include/fpu/softfloat-helpers.h index e0baf24c..528d7ebd 100644 --- a/qemu/include/fpu/softfloat-helpers.h +++ b/qemu/include/fpu/softfloat-helpers.h @@ -74,22 +74,22 @@ static inline void set_floatx80_rounding_precision(int val, status->floatx80_rounding_precision = val; } -static inline void set_flush_to_zero(flag val, float_status *status) +static inline void set_flush_to_zero(bool val, float_status *status) { status->flush_to_zero = val; } -static inline void set_flush_inputs_to_zero(flag val, float_status *status) +static inline void set_flush_inputs_to_zero(bool val, float_status *status) { status->flush_inputs_to_zero = val; } -static inline void set_default_nan_mode(flag val, float_status *status) +static inline void set_default_nan_mode(bool val, float_status *status) { status->default_nan_mode = val; } -static inline void set_snan_bit_is_one(flag val, float_status *status) +static inline void set_snan_bit_is_one(bool val, float_status *status) { status->snan_bit_is_one = val; } @@ -114,17 +114,17 @@ static inline int get_floatx80_rounding_precision(float_status *status) return status->floatx80_rounding_precision; } -static inline flag get_flush_to_zero(float_status *status) +static inline bool get_flush_to_zero(float_status *status) { return status->flush_to_zero; } -static inline flag get_flush_inputs_to_zero(float_status *status) +static inline bool get_flush_inputs_to_zero(float_status *status) { return status->flush_inputs_to_zero; } -static inline flag get_default_nan_mode(float_status *status) +static inline bool get_default_nan_mode(float_status *status) { return status->default_nan_mode; } diff --git a/qemu/include/fpu/softfloat-macros.h b/qemu/include/fpu/softfloat-macros.h index 8d3c2e51..40c735c5 100644 --- a/qemu/include/fpu/softfloat-macros.h +++ b/qemu/include/fpu/softfloat-macros.h @@ -756,11 +756,9 @@ static inline uint32_t estimateSqrt32(int aExp, uint32_t a) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) +static inline bool eq128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1) { - - return ( a0 == b0 ) && ( a1 == b1 ); - + return a0 == b0 && a1 == b1; } /*---------------------------------------------------------------------------- @@ -769,11 +767,9 @@ static inline flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) +static inline bool le128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1) { - - return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); - + return a0 < b0 || (a0 == b0 && a1 <= b1); } /*---------------------------------------------------------------------------- @@ -782,11 +778,9 @@ static inline flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) | returns 0. *----------------------------------------------------------------------------*/ -static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) +static inline bool lt128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1) { - - return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); - + return a0 < b0 || (a0 == b0 && a1 < b1); } /*---------------------------------------------------------------------------- @@ -795,11 +789,9 @@ static inline flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -static inline flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) +static inline bool ne128(uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1) { - - return ( a0 != b0 ) || ( a1 != b1 ); - + return a0 != b0 || a1 != b1; } #endif diff --git a/qemu/include/fpu/softfloat-types.h b/qemu/include/fpu/softfloat-types.h index 2aae6a89..619b875d 100644 --- a/qemu/include/fpu/softfloat-types.h +++ b/qemu/include/fpu/softfloat-types.h @@ -80,12 +80,6 @@ this code that are retained. #ifndef SOFTFLOAT_TYPES_H #define SOFTFLOAT_TYPES_H -/* This 'flag' type must be able to hold at least 0 and 1. It should - * probably be replaced with 'bool' but the uses would need to be audited - * to check that they weren't accidentally relying on it being a larger type. - */ -typedef uint8_t flag; - /* * Software IEC/IEEE floating-point types. */ @@ -169,12 +163,12 @@ typedef struct float_status { uint8_t float_exception_flags; signed char floatx80_rounding_precision; /* should denormalised results go to zero and set the inexact flag? */ - flag flush_to_zero; + bool flush_to_zero; /* should denormalised inputs go to zero and set the input_denormal flag? */ - flag flush_inputs_to_zero; - flag default_nan_mode; + bool flush_inputs_to_zero; + bool default_nan_mode; /* not always used -- see snan_bit_is_one() in softfloat-specialize.h */ - flag snan_bit_is_one; + bool snan_bit_is_one; } float_status; #endif /* SOFTFLOAT_TYPES_H */ diff --git a/qemu/include/fpu/softfloat.h b/qemu/include/fpu/softfloat.h index fc1ac2b0..59405b89 100644 --- a/qemu/include/fpu/softfloat.h +++ b/qemu/include/fpu/softfloat.h @@ -444,7 +444,7 @@ static inline float32 float32_set_sign(float32 a, int sign) | significand. *----------------------------------------------------------------------------*/ -static inline float32 packFloat32(flag zSign, int zExp, uint32_t zSig) +static inline float32 packFloat32(bool zSign, int zExp, uint32_t zSig) { return make_float32( (((uint32_t)zSign) << 31) + (((uint32_t)zExp) << 23) + zSig); @@ -726,7 +726,7 @@ static inline int32_t extractFloatx80Exp(floatx80 a) | `a'. *----------------------------------------------------------------------------*/ -static inline flag extractFloatx80Sign(floatx80 a) +static inline bool extractFloatx80Sign(floatx80 a) { return a.high >> 15; } @@ -736,7 +736,7 @@ static inline flag extractFloatx80Sign(floatx80 a) | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -static inline floatx80 packFloatx80(flag zSign, int32_t zExp, uint64_t zSig) +static inline floatx80 packFloatx80(bool zSign, int32_t zExp, uint64_t zSig) { floatx80 z; @@ -787,7 +787,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status); | Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, +floatx80 roundAndPackFloatx80(int8_t roundingPrecision, bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); @@ -801,7 +801,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecision, flag zSign, *----------------------------------------------------------------------------*/ floatx80 normalizeRoundAndPackFloatx80(int8_t roundingPrecision, - flag zSign, int32_t zExp, + bool zSign, int32_t zExp, uint64_t zSig0, uint64_t zSig1, float_status *status); diff --git a/qemu/target/arm/sve_helper.c b/qemu/target/arm/sve_helper.c index 8381fbdd..f5d2176a 100644 --- a/qemu/target/arm/sve_helper.c +++ b/qemu/target/arm/sve_helper.c @@ -3200,7 +3200,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vg, void *status, uint32_t desc) \ */ static inline float32 sve_f16_to_f32(float16 f, float_status *fpst) { - flag save = get_flush_inputs_to_zero(fpst); + bool save = get_flush_inputs_to_zero(fpst); float32 ret; set_flush_inputs_to_zero(false, fpst); @@ -3211,7 +3211,7 @@ static inline float32 sve_f16_to_f32(float16 f, float_status *fpst) static inline float64 sve_f16_to_f64(float16 f, float_status *fpst) { - flag save = get_flush_inputs_to_zero(fpst); + bool save = get_flush_inputs_to_zero(fpst); float64 ret; set_flush_inputs_to_zero(false, fpst); @@ -3222,7 +3222,7 @@ static inline float64 sve_f16_to_f64(float16 f, float_status *fpst) static inline float16 sve_f32_to_f16(float32 f, float_status *fpst) { - flag save = get_flush_to_zero(fpst); + bool save = get_flush_to_zero(fpst); float16 ret; set_flush_to_zero(false, fpst); @@ -3233,7 +3233,7 @@ static inline float16 sve_f32_to_f16(float32 f, float_status *fpst) static inline float16 sve_f64_to_f16(float64 f, float_status *fpst) { - flag save = get_flush_to_zero(fpst); + bool save = get_flush_to_zero(fpst); float16 ret; set_flush_to_zero(false, fpst); diff --git a/qemu/target/arm/vfp_helper.c b/qemu/target/arm/vfp_helper.c index b1da5f6a..a62b9204 100644 --- a/qemu/target/arm/vfp_helper.c +++ b/qemu/target/arm/vfp_helper.c @@ -537,7 +537,7 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, void *fpstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst = fpstp; - flag save = get_flush_inputs_to_zero(fpst); + bool save = get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float32 r = float16_to_float32(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -551,7 +551,7 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, void *fpstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst = fpstp; - flag save = get_flush_to_zero(fpst); + bool save = get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r = float32_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); @@ -565,7 +565,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, void *fpstp, uint32_t ahp_mode) * it would affect flushing input denormals. */ float_status *fpst = fpstp; - flag save = get_flush_inputs_to_zero(fpst); + bool save = get_flush_inputs_to_zero(fpst); set_flush_inputs_to_zero(false, fpst); float64 r = float16_to_float64(a, !ahp_mode, fpst); set_flush_inputs_to_zero(save, fpst); @@ -579,7 +579,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode) * it would affect flushing output denormals. */ float_status *fpst = fpstp; - flag save = get_flush_to_zero(fpst); + bool save = get_flush_to_zero(fpst); set_flush_to_zero(false, fpst); float16 r = float64_to_float16(a, !ahp_mode, fpst); set_flush_to_zero(save, fpst); diff --git a/qemu/target/m68k/softfloat.c b/qemu/target/m68k/softfloat.c index 24c313ed..9f120cf1 100644 --- a/qemu/target/m68k/softfloat.c +++ b/qemu/target/m68k/softfloat.c @@ -49,7 +49,7 @@ static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *status) floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) { - flag aSign, zSign; + bool aSign, zSign; int32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t qTemp, term0, term1; @@ -132,7 +132,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_getman(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -166,7 +166,7 @@ floatx80 floatx80_getman(floatx80 a, float_status *status) floatx80 floatx80_getexp(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -202,7 +202,7 @@ floatx80 floatx80_getexp(floatx80 a, float_status *status) floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status) { - flag aSign, bSign; + bool aSign, bSign; int32_t aExp, bExp, shiftCount; uint64_t aSig, bSig; @@ -258,7 +258,7 @@ floatx80 floatx80_scale(floatx80 a, floatx80 b, float_status *status) floatx80 floatx80_move(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -306,7 +306,7 @@ static int32_t floatx80_make_compact(int32_t aExp, uint64_t aSig) floatx80 floatx80_lognp1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; @@ -505,7 +505,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *status) floatx80 floatx80_logn(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig, fSig; @@ -673,7 +673,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) floatx80 floatx80_log10(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -730,7 +730,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *status) floatx80 floatx80_log2(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -797,7 +797,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status) floatx80 floatx80_etox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -805,7 +805,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) int32_t compact, n, j, k, m, m1; floatx80 fp0, fp1, fp2, fp3, l2, scale, adjscale; - flag adjflag; + bool adjflag; aSig = extractFloatx80Frac(a); aExp = extractFloatx80Exp(a); @@ -981,7 +981,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) floatx80 floatx80_twotox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -1131,7 +1131,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *status) floatx80 floatx80_tentox(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -1286,7 +1286,7 @@ floatx80 floatx80_tentox(floatx80 a, float_status *status) floatx80 floatx80_tan(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; @@ -1295,7 +1295,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, invtwopi, twopi1, twopi2; float32 twoto63; - flag endflag; + bool endflag; aSig = extractFloatx80Frac(a); aExp = extractFloatx80Exp(a); @@ -1344,10 +1344,10 @@ floatx80 floatx80_tan(floatx80 a, float_status *status) xExp -= 0x3FFF; if (xExp <= 28) { l = 0; - endflag = 1; + endflag = true; } else { l = xExp - 27; - endflag = 0; + endflag = false; } invtwopi = packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */ @@ -1372,7 +1372,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status) fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */ fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */ - if (endflag > 0) { + if (endflag) { n = floatx80_to_int32(fp2, status); goto tancont; } @@ -1496,7 +1496,7 @@ floatx80 floatx80_tan(floatx80 a, float_status *status) floatx80 floatx80_sin(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; @@ -1505,7 +1505,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; aSig = extractFloatx80Frac(a); aExp = extractFloatx80Exp(a); @@ -1554,10 +1554,10 @@ floatx80 floatx80_sin(floatx80 a, float_status *status) xExp -= 0x3FFF; if (xExp <= 28) { l = 0; - endflag = 1; + endflag = true; } else { l = xExp - 27; - endflag = 0; + endflag = false; } invtwopi = packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */ @@ -1582,7 +1582,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status) fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */ fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */ - if (endflag > 0) { + if (endflag) { n = floatx80_to_int32(fp2, status); goto sincont; } @@ -1735,7 +1735,7 @@ floatx80 floatx80_sin(floatx80 a, float_status *status) floatx80 floatx80_cos(floatx80 a, float_status *status) { - flag aSign, xSign; + bool aSign, xSign; int32_t aExp, xExp; uint64_t aSig, xSig; @@ -1744,7 +1744,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status) int32_t compact, l, n, j; floatx80 fp0, fp1, fp2, fp3, fp4, fp5, x, invtwopi, twopi1, twopi2; float32 posneg1, twoto63; - flag endflag; + bool endflag; aSig = extractFloatx80Frac(a); aExp = extractFloatx80Exp(a); @@ -1793,10 +1793,10 @@ floatx80 floatx80_cos(floatx80 a, float_status *status) xExp -= 0x3FFF; if (xExp <= 28) { l = 0; - endflag = 1; + endflag = true; } else { l = xExp - 27; - endflag = 0; + endflag = false; } invtwopi = packFloatx80(0, 0x3FFE - l, UINT64_C(0xA2F9836E4E44152A)); /* INVTWOPI */ @@ -1821,7 +1821,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status) fp1 = floatx80_sub(fp1, fp4, status); /* FP1 is a := r - p */ fp0 = floatx80_add(fp0, fp1, status); /* FP0 is R := A+a */ - if (endflag > 0) { + if (endflag) { n = floatx80_to_int32(fp2, status); goto sincont; } @@ -1972,7 +1972,7 @@ floatx80 floatx80_cos(floatx80 a, float_status *status) floatx80 floatx80_atan(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -2169,7 +2169,7 @@ floatx80 floatx80_atan(floatx80 a, float_status *status) floatx80 floatx80_asin(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -2234,7 +2234,7 @@ floatx80 floatx80_asin(floatx80 a, float_status *status) floatx80 floatx80_acos(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -2303,7 +2303,7 @@ floatx80 floatx80_acos(floatx80 a, float_status *status) floatx80 floatx80_atanh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -2368,7 +2368,7 @@ floatx80 floatx80_atanh(floatx80 a, float_status *status) floatx80 floatx80_etoxm1(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; @@ -2620,7 +2620,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *status) floatx80 floatx80_tanh(floatx80 a, float_status *status) { - flag aSign, vSign; + bool aSign, vSign; int32_t aExp, vExp; uint64_t aSig, vSig; @@ -2735,7 +2735,7 @@ floatx80 floatx80_tanh(floatx80 a, float_status *status) floatx80 floatx80_sinh(floatx80 a, float_status *status) { - flag aSign; + bool aSign; int32_t aExp; uint64_t aSig; diff --git a/qemu/target/mips/msa_helper.c b/qemu/target/mips/msa_helper.c index 8a6f2bd0..2cb4b3c3 100644 --- a/qemu/target/mips/msa_helper.c +++ b/qemu/target/mips/msa_helper.c @@ -2757,7 +2757,7 @@ static inline int get_enabled_exceptions(const CPUMIPSState *env, int c) return c & enable; } -static inline float16 float16_from_float32(int32_t a, flag ieee, float_status *status) +static inline float16 float16_from_float32(int32_t a, bool ieee, float_status *status) { float16 f_val; @@ -2775,7 +2775,7 @@ static inline float32 float32_from_float64(int64_t a, float_status *status) return a < 0 ? (f_val | (1 << 31)) : f_val; } -static inline float32 float32_from_float16(int16_t a, flag ieee, float_status *status) +static inline float32 float32_from_float16(int16_t a, bool ieee, float_status *status) { float32 f_val; @@ -3811,7 +3811,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16); MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16); @@ -4425,7 +4425,7 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32); } @@ -4461,7 +4461,7 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32); }